JPS62193278A - Solid-state image pickup device - Google Patents

Solid-state image pickup device

Info

Publication number
JPS62193278A
JPS62193278A JP61036015A JP3601586A JPS62193278A JP S62193278 A JPS62193278 A JP S62193278A JP 61036015 A JP61036015 A JP 61036015A JP 3601586 A JP3601586 A JP 3601586A JP S62193278 A JPS62193278 A JP S62193278A
Authority
JP
Japan
Prior art keywords
well
solid
grooves
substrate
sidewalls
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61036015A
Other languages
Japanese (ja)
Inventor
Toshihiro Kuriyama
俊寛 栗山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP61036015A priority Critical patent/JPS62193278A/en
Publication of JPS62193278A publication Critical patent/JPS62193278A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14831Area CCD imagers

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To contract the picture element per unit while reducing the smear by a method wherein a vertical signal transfer part is formed on the opposing sidewalls of two grooves etched into a substrate and the main surface connecting to the sidewalls. CONSTITUTION:An N-type Si substrate 1 is ion-implanted with boron to form a P well 2 by drive-in process. Next, the P well is selectively ion-implanted with boron to form a P<+> well 3 by the drive-in process and after forming an N-type diffused layer 4 and a channel stopper 5, two grooves at least deeper than the N-type diffused layer 4 are formed on both sides of a region to be VCCD. Then a CCD filled-in channel region 6 is formed on the opposing sidewalls of two grooves and the surface connecting to the sidewalls and then a gate oxide film is formed to form polysilicon gate electrodes 7. Finally, an interlayer insulating film is grown to form an aluminium layer 8 for intercepting light to finish the process.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、インターライン型固体撮像装置に関する。[Detailed description of the invention] Industrial applications The present invention relates to an interline solid-state imaging device.

従来の技術 最近の実用化している固体撮像装置は、総合特待性から
Pウェル インターライン型固体撮像装置が主流となっ
ている。
BACKGROUND OF THE INVENTION P-well interline type solid-state imaging devices have become mainstream among solid-state imaging devices that have recently been put into practical use due to their comprehensive benefits.

第2図はインターライン型固体撮像装置の1画素部分の
構造を示す断面図である。21はn型シリコン基板Si
、22はPウェル、25はチャンネルストッパ、24は
n型拡散層で、Pウェル22とのPn接合によるフォト
ダイオードPD部を形成している。また、26は垂直C
OD (電荷転送素子)部を形成する埋め込みチャンネ
ル領域、27はポリシリコンゲート電極、28はアルミ
等の遮光層で、このような単位構造を1画素として、固
体撮像素子は、約60朋に約20〜30万個の画素が集
積されている。また9は電源を示す。
FIG. 2 is a cross-sectional view showing the structure of one pixel portion of an interline solid-state imaging device. 21 is an n-type silicon substrate Si
, 22 is a P-well, 25 is a channel stopper, and 24 is an n-type diffusion layer, which forms a photodiode PD section by a Pn junction with the P-well 22. Also, 26 is vertical C
A buried channel region forming an OD (charge transfer device) section, 27 a polysilicon gate electrode, and 28 a light-shielding layer made of aluminum or the like.With such a unit structure as one pixel, a solid-state image sensor has approximately 60 pixels. 200,000 to 300,000 pixels are integrated. Further, 9 indicates a power source.

基本的動作は、Pウェル2とn型シリコン基板21との
間に、電源9により逆バイアスを印加して、PD部とな
るn型拡散層24下のPウェル22を完全空乏化するこ
とによりプルーミング機能を有する。)(例えば、〔ア
イニスニスシーシーダイジェスト オブ テクニカル 
ペーパーズ〕(I S Sec  Digest of
 Technical Papers)。
The basic operation is to apply a reverse bias from the power supply 9 between the P well 2 and the n-type silicon substrate 21, and completely deplete the P well 22 under the n-type diffusion layer 24, which will become the PD section. It has a pluming function. ) (for example,
Papers] (I S Sec Digest of
Technical Papers).

ppl θa 、 1982 ) 発明が解決しようとする問題点 このような構造の固体撮像装置では、高集積が進み単位
画素が縮小化するとvCCD(垂直C0D)のチャンネ
ル幅が制限を受け、取り扱い電荷量が低下するという問
題点と、スミア低減には、限界があるという欠点があっ
た。
ppl θa, 1982) Problems to be Solved by the Invention In solid-state imaging devices with such a structure, as the unit pixel becomes smaller due to higher integration, the channel width of vCCD (vertical C0D) is restricted, and the amount of charge handled becomes smaller. There was a problem that the amount of smear decreased, and that there was a limit to smear reduction.

本発明は上述の従来技術の欠点に鑑みて成されたもので
、VCCDの断面構造を変えることで、単位画素の縮小
化およびスミア低減が図れる固体撮像装置を提供するこ
とを目的としたものである。
The present invention has been made in view of the above-mentioned drawbacks of the prior art, and aims to provide a solid-state imaging device that can reduce unit pixel size and reduce smear by changing the cross-sectional structure of a VCCD. be.

問題点を解決するための手段 上記の従来技術の問題点を解決するため本発明の固体撮
像装置は、垂直信号転送部(vccn)を、基板をエツ
チングした2つの溝の向い合う側面およびそれらを結ぶ
主表面に形成するものである。
Means for Solving the Problems In order to solve the problems of the prior art described above, the solid-state imaging device of the present invention has a vertical signal transfer section (VCCN) formed by forming a vertical signal transfer section (VCCN) on the opposite sides of two grooves etched in the substrate, and on the opposite sides of two grooves etched in the substrate. It is formed on the main surface to be tied.

作用 本発明は上記した構成をとることにより、平面的なりc
cnの専有面積を減少させ、かつ有効面積増大が図れ、
しかも、構造上、VCCDへの直接入射光が減少するた
めスミアの低減される固体撮像装置となる。
Function The present invention has the above-described configuration, so that it is possible to
Reduce the exclusive area of CN and increase the effective area,
Moreover, since the amount of light directly incident on the VCCD is reduced due to its structure, the solid-state imaging device has reduced smear.

実施例 第1図は本発明の一実施例を示す断面図であり、1はn
型Si基板、2はPウェル、3はP+ウェル、4はPD
となるn型拡散層、6はチャンネルストッパ、6はCO
Dの埋め込みチャンネル領域、7はポリシリコンゲート
電極、8はアルミ遮光層である。
Embodiment FIG. 1 is a sectional view showing an embodiment of the present invention, where 1 is n
type Si substrate, 2 is P well, 3 is P+ well, 4 is PD
n-type diffusion layer, 6 is a channel stopper, 6 is CO
D is a buried channel region, 7 is a polysilicon gate electrode, and 8 is an aluminum light-shielding layer.

この構造の固体撮像装置は次のように形成される。はじ
めに、n型Si基板1にボロンをイオン注入、ドライブ
インによってPウェル2を形成する。次に、選択的にポ
ロンをイオン注入、ドライブインによってP+ウェル3
を形成し、さらに、n型拡散層4、チャンネルストッパ
6を形成後、VCCDとなる領域の両側に2つの溝を少
なくとも、n型拡散層4よりも深く形成する。そして、
2つの溝の向い合う側壁とそれらを結ぶ表面に、COD
の埋め込みチャンネル領域6を形成した後、ゲート酸化
膜を形成して、ポリシリコンゲート電極7を形成する。
A solid-state imaging device having this structure is formed as follows. First, boron ions are implanted into an n-type Si substrate 1 and a P well 2 is formed by drive-in. Next, selectively implant poron into the P+ well 3 by drive-in.
After forming the n-type diffusion layer 4 and the channel stopper 6, at least two grooves are formed deeper than the n-type diffusion layer 4 on both sides of the region that will become the VCCD. and,
COD is applied to the opposing side walls of the two grooves and the surface connecting them.
After forming a buried channel region 6, a gate oxide film is formed and a polysilicon gate electrode 7 is formed.

後は、層間絶縁膜を成長させ、アルミじゃ光層8を形成
すると完成する。
After that, an interlayer insulating film is grown and an aluminum reflective layer 8 is formed to complete the process.

なお、上述の実施例では、n型拡散層4は、溝形成前に
行なったが、ポリシリコンゲート電極形成後でも良い。
In the above embodiment, the n-type diffusion layer 4 was formed before forming the groove, but it may be formed after forming the polysilicon gate electrode.

以上一実施例を説明したが、上述から明らかなように本
発明の固体撮像装置は、vccnは側壁をも利用して形
成されているため、単位面積当りの有効面積は増大して
おり、vGGDの空乏層は、アルミじゃ光層8の端から
空間的にへだたっているため、スミアの低減効果も大き
くなる。
One embodiment has been described above, but as is clear from the above, in the solid-state imaging device of the present invention, since the vccn is formed also using the side wall, the effective area per unit area is increased, and the vGGD Since the depletion layer is spatially separated from the edge of the aluminum reflective layer 8, the effect of reducing smear is also increased.

発明の詳細 な説明して明らかなように本発明は、垂直CODを溝の
側面にも形成することで、有効面積の増大を平面積を増
大させずに行なえ、かつ、垂直CODを受光部より空間
的に離すように2つの溝に囲まれた配置にすることによ
り、スミアの低減も図れるなど、大きな効果が得られる
As is clear from the detailed description of the invention, the present invention is capable of increasing the effective area without increasing the planar area by forming the vertical COD on the side surface of the groove, and also allows the vertical COD to be formed from the light receiving part. By arranging the grooves so as to be surrounded by two grooves that are spatially separated from each other, great effects such as reduction of smear can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の固体撮像装置の一実施例を示す断面図
、第2図は従来例を示すインタライン型の固体撮像装置
の断面図である。 1・・・・・・n型Si基板、2・・・・・・Pウェル
、3・・・・・・P+ウェル、4・・・・・・n型拡散
層、6・・・・・・チャンネルストッパ、6・・・・・
・CCDの埋め込みチャンネル領域、7・・・・・・ポ
リシリコンゲート電極、8・・・・・・アルミしや光層
FIG. 1 is a sectional view showing an embodiment of the solid-state imaging device of the present invention, and FIG. 2 is a sectional view of an interline type solid-state imaging device showing a conventional example. 1...N-type Si substrate, 2...P-well, 3...P+ well, 4...n-type diffusion layer, 6...・Channel stopper, 6...
・Embedded channel region of CCD, 7...Polysilicon gate electrode, 8...Aluminum film and optical layer.

Claims (2)

【特許請求の範囲】[Claims] (1)一導電型基板の主表面に反対導電型の領域が形成
され、この領域内に受光部と信号転送部とが二次元的に
配列され、上記信号転送部は、上記反対導電型の領域に
形成された溝の側面と主表面に形成されていることを特
徴とする固体撮像装置。
(1) A region of an opposite conductivity type is formed on the main surface of a substrate of one conductivity type, a light receiving section and a signal transfer section are arranged two-dimensionally within this region, and the signal transfer section is of the opposite conductivity type. A solid-state imaging device characterized in that a groove is formed on a side surface and a main surface of a groove formed in a region.
(2)信号転送部の両端に溝が形成され、実効的な転送
部が、上記2つの溝の向い合う側壁とそれらを結ぶ表面
に形成されていることを特徴とする特許請求の範囲第1
項記載の固体撮像装置。
(2) Grooves are formed at both ends of the signal transfer section, and the effective transfer section is formed on the opposing side walls of the two grooves and the surface connecting them.
The solid-state imaging device described in .
JP61036015A 1986-02-20 1986-02-20 Solid-state image pickup device Pending JPS62193278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61036015A JPS62193278A (en) 1986-02-20 1986-02-20 Solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61036015A JPS62193278A (en) 1986-02-20 1986-02-20 Solid-state image pickup device

Publications (1)

Publication Number Publication Date
JPS62193278A true JPS62193278A (en) 1987-08-25

Family

ID=12457919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61036015A Pending JPS62193278A (en) 1986-02-20 1986-02-20 Solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS62193278A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005123538A (en) * 2003-10-20 2005-05-12 Sony Corp Solid imaging device and its manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005123538A (en) * 2003-10-20 2005-05-12 Sony Corp Solid imaging device and its manufacturing method
JP4496753B2 (en) * 2003-10-20 2010-07-07 ソニー株式会社 Solid-state imaging device and manufacturing method thereof

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