JPS62192416U - - Google Patents
Info
- Publication number
- JPS62192416U JPS62192416U JP7998786U JP7998786U JPS62192416U JP S62192416 U JPS62192416 U JP S62192416U JP 7998786 U JP7998786 U JP 7998786U JP 7998786 U JP7998786 U JP 7998786U JP S62192416 U JPS62192416 U JP S62192416U
- Authority
- JP
- Japan
- Prior art keywords
- time constant
- transistor
- constant circuit
- microcomputer
- turned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000014759 maintenance of location Effects 0.000 claims 1
Landscapes
- Microcomputers (AREA)
Description
図は本考案の一実施例を示すものである。
１……第１時定数回路、５……第１のトランジ
スタ、６……第２時定数回路、１１……第２のト
ランジスタ、１３……マイクロコンピユーター。
The figure shows one embodiment of the present invention. 1 ...First time constant circuit, 5...First transistor, 6 ...Second time constant circuit, 11...Second transistor, 13...Microcomputer.
Claims (1)
、この第１の時定数回路の出力に基づき制御され
る第１のトランジスタと、この第１のトランジス
タがオンのとき充電電流が供給される第２の時定
数回路と、この第２の時定数回路の出力に基づき
制御され且つマイクロコンピユーターに制御信号
を与える第２のトランジスタとを備え、電源オン
時には前記第１の時定数回路にて定まる時間経過
後、前記第１のトランジスタをオンせしめること
により前記第２の時定数回路を充電せしめると共
に前記第２のトランジスタをオンせしめ、以つて
マイクロコンピユーターを能動状態に設定し、電
源オフ時には前記第２の時定数回路にて前記第２
のトランジスタを逆バイアスすることにより直ち
にオフせしめ、以つてマイクロコンピユーターを
不能状態若しくはメモリ保持状態に設定するよう
にしたことを特徴とするマイクロコンピユーター
の制御回路。 a first time constant circuit connected to the power supply line; a first transistor controlled based on the output of the first time constant circuit; and a charging current supplied when the first transistor is on. It comprises a second time constant circuit and a second transistor that is controlled based on the output of the second time constant circuit and gives a control signal to the microcomputer, and when the power is turned on, the time constant is determined by the first time constant circuit. After a period of time has elapsed, the first transistor is turned on to charge the second time constant circuit and the second transistor is turned on, thereby setting the microcomputer to an active state. The second time constant circuit
1. A control circuit for a microcomputer, characterized in that the microcomputer is immediately turned off by reverse biasing the transistor, thereby setting the microcomputer to a disabled state or a memory retention state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7998786U JPH054022Y2 (en) | 1986-05-27 | 1986-05-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7998786U JPH054022Y2 (en) | 1986-05-27 | 1986-05-27 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62192416U true JPS62192416U (en) | 1987-12-07 |
| JPH054022Y2 JPH054022Y2 (en) | 1993-02-01 |
Family
ID=30930377
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7998786U Expired - Lifetime JPH054022Y2 (en) | 1986-05-27 | 1986-05-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH054022Y2 (en) |
-
1986
- 1986-05-27 JP JP7998786U patent/JPH054022Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH054022Y2 (en) | 1993-02-01 |