JPS62191437U - - Google Patents
Info
- Publication number
- JPS62191437U JPS62191437U JP7962986U JP7962986U JPS62191437U JP S62191437 U JPS62191437 U JP S62191437U JP 7962986 U JP7962986 U JP 7962986U JP 7962986 U JP7962986 U JP 7962986U JP S62191437 U JPS62191437 U JP S62191437U
- Authority
- JP
- Japan
- Prior art keywords
- led array
- chip
- row
- insulating substrate
- common electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims 5
- 239000002356 single layer Substances 0.000 claims 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Dot-Matrix Printers And Others (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
Description
第１図は本考案のＬＥＤアレイチツプの一実施
例を示す斜視図、第２図は従来のＬＥＤアレイプ
リントヘツドの斜視図、第３図は第２図のプリン
トヘツドの一部を拡大して示す斜視図、第４図は
第１図のプリントヘツドの一部を拡大して示す平
面図、第５図は本考案の他の実施例の、第４図と
同様の部分を示す平面図である。
１１…ＬＥＤアレイ、１１ａ，１１ｂ，…１１
ｎ…ＬＥＤアレイチツプ、１２…セラミツクベー
ス、１３…駆動用ＩＣチツプ、１４…個別電極側
配線群、１５…金属ワイヤ、１６…共通電極側電
源配線部、１７…導電性接着剤層。
Fig. 1 is a perspective view showing an embodiment of the LED array chip of the present invention, Fig. 2 is a perspective view of a conventional LED array print head, and Fig. 3 is an enlarged view of a part of the print head shown in Fig. 2. FIG. 4 is an enlarged plan view of a part of the print head shown in FIG. 1, and FIG. 5 is a plan view of another embodiment of the present invention showing the same portion as FIG. 4. . 11...LED array, 11a, 11b,...11
n...LED array chip, 12...ceramic base, 13...driving IC chip, 14...individual electrode side wiring group, 15...metal wire, 16...common electrode side power wiring section, 17...conductive adhesive layer.
Claims (1)
、各々その両側に個別電極を有し、前記絶縁基板
に接する側に共通電極を有する複数のＬＥＤアレ
イチツプの列と、前記ＬＥＤアレイチツプの列の
両側に配置されたＬＥＤ駆動用ＩＣチツプと、前
記ＬＥＤアレイチツプの個別電極と前記駆動用Ｉ
Ｃチツプとの接続のため前記絶縁基板上に形成さ
れた個別電極接続用配線パターンと、前記ＬＥＤ
アレイチツプの共通電極に接続された共通電極接
続用配線パターンとを有し、前記共通電極接続用
配線パターンは、前記ＬＥＤアレイチツプの列に
沿つて延びた部分と、該列の途中から該列の延び
た方向に交差する方向に延びた部分とを有するこ
とを特徴とするＬＥＤアレイプリントヘツド。 ２ 前記絶縁基板上の配線パターンは一層で構成
されていることを特徴とする実用新案登録請求の
範囲第１項記載のＬＥＤアレイプリントヘツド。 ３ 各ＬＥＤアレイチツプの各側の個別電極に対
応して１つの駆動用ＩＣチツプが設けられ、これ
らを互いに接続する個別電極接続用パターンが、
各ＬＥＤアレイチツプの長さ内に配設され、ＬＥ
Ｄアレイチツプ同士の継ぎ目の部分から、前記共
通電極接続用パターンが、前記ＬＥＤアレイの延
びた方向に交差する方向に延び出していることを
特徴とする実用新案登録請求の範囲第１項記載の
ＬＥＤアレイプリントヘツド。[Claims for Utility Model Registration] 1. An insulating substrate, and a plurality of LED array chips arranged linearly on the insulating substrate, each having individual electrodes on both sides thereof, and having a common electrode on the side in contact with the insulating substrate. a row of LED array chips, an IC chip for driving LEDs arranged on both sides of the row of LED array chips, an individual electrode of the LED array chip and the IC chip for driving the LED array chip.
A wiring pattern for connecting individual electrodes formed on the insulating substrate for connection with the C chip, and the LED
a wiring pattern for common electrode connection connected to the common electrode of the array chip, and the wiring pattern for common electrode connection includes a portion extending along the row of the LED array chips, and a portion extending from the middle of the row to a portion extending from the row. What is claimed is: 1. An LED array printhead having a portion extending in a direction intersecting the direction of the LED array printhead. 2. The LED array print head according to claim 1, wherein the wiring pattern on the insulating substrate is composed of a single layer. 3. One driving IC chip is provided corresponding to the individual electrodes on each side of each LED array chip, and the individual electrode connection patterns that connect these chips to each other are
disposed within the length of each LED array chip,
The LED according to claim 1, wherein the common electrode connection pattern extends from the joint between the D-array chips in a direction intersecting the extending direction of the LED array. Array print head.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7962986U JPS62191437U (en) | 1986-05-28 | 1986-05-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7962986U JPS62191437U (en) | 1986-05-28 | 1986-05-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62191437U true JPS62191437U (en) | 1987-12-05 |
Family
ID=30929669
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7962986U Pending JPS62191437U (en) | 1986-05-28 | 1986-05-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62191437U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60183752A (en) * | 1984-03-01 | 1985-09-19 | Ricoh Co Ltd | Long electronic device |
| JPS6170772A (en) * | 1984-09-14 | 1986-04-11 | Hitachi Ltd | Head of light-emitting diode array |
-
1986
- 1986-05-28 JP JP7962986U patent/JPS62191437U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60183752A (en) * | 1984-03-01 | 1985-09-19 | Ricoh Co Ltd | Long electronic device |
| JPS6170772A (en) * | 1984-09-14 | 1986-04-11 | Hitachi Ltd | Head of light-emitting diode array |