JPS6218988A - Speed controller for motor - Google Patents

Abstract

PURPOSE:To largely reduce the irregular rotation of a motor by cancelling the detecting error of the rotating speed by correction data. CONSTITUTION:A speed control system and a phase control system are composed of a motor 11, the first pulse generator 12, a speed detector 13, the second pulse generator 14, a phase difference detector 16, a calculation compensator 21 and a power amplifier 18, and the rotating speed and phase of the motor 11 are controlled to the prescribed values. Switches SW1, SW2 are closed to measure the irregular rotation of one revolution of the motor 11. Then, the motor 11 is stopped, the second memory 25 is electrically separated from an arithmetic unit 22, a switch SW3 is closed to write the correction data of a correction data writer 33. Thereafer, a correction data forming unit 31 is not necessary, the switches SW1, SW2, SW3 are opened to separate the unit 31 from a speed controller.

Description

[Detailed description of the invention] Industrial applications The present invention relates to a motor speed control device.

Conventional Technology A motor speed control device that detects the rotational speed and rotational phase of a motor using a speed detector and a phase difference detector and controls the power supplied to the motor using the detection signal is used for the cylinder motor of a video tape recorder or the like. It is widely used in capstan motors and the like (see, for example, Japanese Patent Application No. 188778/1989 proposed by the present applicant). Such a speed control device controls not only the rotational speed of the motor but also the rotational phase, so it has very good control performance against fluctuations in load torque. However, since the sensor attached to the motor also responds to a detection error (alternating current error), this detection error causes speed fluctuations of the motor. This will be explained below with reference to the drawings.

The configuration of a conventional motor speed control device is shown in FIG. A first pulse generator 12 is constituted by a frequency generator directly connected to the motor 11, a waveform shaping circuit, and a frequency dividing circuit, and generates a first pulse signal a having a frequency compared to the rotational speed of the motor 11. . Similarly, a second pulse generator 14 is configured by a rotational phase detection element and a waveform shaping circuit that are directly connected to the motor 11, and generates one pulse signal (second pulse signal small) at a predetermined rotational phase of the motor 11. occurs.

The speed detector 13 detects the zero cross time of the first pulse signal a, obtains a digital signal corresponding to the instantaneous rotational speed of the motor 11 from the time interval, and detects the next detection point 1.
Hold. The reference signal generator 15 generates a frequency signal C that serves as a phase reference for the motor 11. The phase difference detector 16 obtains a digital signal corresponding to the phase difference between the reference frequency signal C and the second pulse signal S, and holds it until the next detection time. That is, the time interval from the zero-crossing time of the reference frequency signal C to the zero-crossing time of the second pulse signal (or the time interval vice versa) is detected.

Digital signal of speed detector 13 and phase difference detector 16
The digital signal 1 is input to the compensator 17, and a control signal g corresponding to both is output. The power amplifier 18 amplifies the power of the control signal g to supply power to the motor, increases or decreases the torque generated by the motor 11, and controls the rotational speed and rotational phase of the motor 11.

Problem to be Solved by the Invention In this conventional speed control device, in order to reduce rotational speed fluctuations of the motor 11 due to torque fluctuations of the load applied to the motor 11, the gain of the compensator 1T is set large and the motor It is necessary to widen the frequency band (control band) of the speed side leg No. 11.

Usually, the control band is set to about five times the rotational frequency of the motor 11. As a result, if an error (detection error) is included in the detection of the rotational speed of the motor 11 by the first pulse generator 12, the rotational speed of the motor 11 will fluctuate (uneven rotation) due to the operation of the control system.

This will be explained in more detail. The frequency generator of the first pulse generator 12 has a configuration in which a cylindrical magnet attached to the rotor is magnetized with multiple poles at equal angular intervals, and a magnetic head is placed on the stator facing the magnetic poles of the magnet. In a frequency generator with this type of configuration in which a The period of the signal changes in synchronization with the rotation of the motor 11. That is, the period of the first pulse signal hole of the first pulse generator 12 is
It fluctuates in synchronization with the rotation of 1. In this way, the motor 11
The variation in the period of the first pulse signal hole when the is rotated at a constant rotational speed is called the detection error.

On the other hand, if the period fluctuates due to a detection error, if the motor 11 is rotating at a constant rotational speed, the digital signal of the speed detector 13 should fluctuate accordingly. However, the first pulse generator 1
2, the speed detector 13, the compensator 17, the power amplifier 18, and the operation of the speed control system including the motor 11, the digital signal of the speed detector 13 becomes a predetermined constant value (a value corresponding to the reference rotational speed). It's like there's a lot of control. In order for the digital signal of the speed detector 13 to be constant, the actual rotational speed of the motor 11 needs to fluctuate in the opposite direction to the detection error of the first pulse generator 12. That is, the actual rotational speed of the motor 11 fluctuates due to the detection error of the first pulse generator 12, causing rotational unevenness.

In the cylinder motor of a video tape recorder, such rotational unevenness causes jitter and distortion of reproduced images, which has become a problem.

The present invention takes these points into consideration and is devised to significantly reduce uneven rotation of the motor 11 due to detection errors of the first pulse generator 12.

Means for Solving the Problems The present invention provides a first pulse generating means for generating a first pulse signal whose frequency changes according to the rotational speed of the motor, and a first pulse generating means for generating a first pulse signal whose frequency changes according to the rotational speed of the motor; speed detecting means for obtaining a first digital signal corresponding to the rotational speed of the motor twice per rotation of the motor (Z is an integer of 2 or more); a second pulse generating means for generating 91 pulses per revolution of the motor; a reference frequency signal generating means for generating a reference frequency signal; It has a phase difference detection means for obtaining a second digital signal, and a memory storing correction data, and the first digital signal of the speed detection means, the second digital signal of the phase difference detection means, and the correction data are combined. comprising a computation compensation means for generating a responsive control signal, and a power amplification means for supplying power to the motor according to the control signal of the computation compensation means; Based on the rotational unevenness data detected by the rotational unevenness measuring means for measuring the actual rotational unevenness of the motor, the speed detecting means generates a new first digital signal based on the second pulse signal of the second pulse generating means. The rotation unevenness data at the time synchronized with the timing of obtaining the motor is converted into a digital value, and
The correction data for the rotational unevenness of the rotation is stored in advance in the correction data memory area of the calculation compensating means, and further, the calculation compensating means receives the first digital signal every time the speed detecting means obtains a new first digital signal. a counting means for counting up; a clearing means for clearing the count value of the counting means according to the timing of a second pulse signal of the second pulse generating means; and the correction data at an address corresponding to the count value of the counting means. the correction data value in the memory area for combining the correction data value, the value of the first digital signal of the speed detection means, and the value of the second digital signal of the phase detection means; The above object is achieved by using the combined signal of the combining means as the control signal of the computation compensation means.

Furthermore, the present invention includes a first pulse generating means for generating a first pulse signal whose frequency changes according to the rotational speed of the motor, and a first pulse generating means that generates a first pulse signal whose frequency changes according to the rotational speed of the motor; speed detecting means for obtaining a first digital signal twice per revolution of the motor (Z is an integer of 2 or more); a second pulse generating means for generating a reference frequency signal, a second pulse generating means for generating a reference frequency signal, and a second digital pulse generator corresponding to a phase difference between the reference frequency signal and the second pulse signal; A control signal comprising a phase difference detection means for obtaining a signal and a memory storing correction data, and responsive to a first digital signal of the speed detection means, a second digital signal of the phase difference detection means, and the correction data. and a power amplification means for supplying electric power to the motor according to a control signal of the calculation compensation means, and the electric power amplification means generates a substantial power of the motor that occurs when the correction data of the calculation compensation means is set to 0. The rotational unevenness component of a specific frequency is extracted from the rotational unevenness data detected by the rotational unevenness measuring means for measuring rotational unevenness, and a digital value corresponding to the amplitude of the rotational unevenness component and the second pulse generating means are extracted. A digital value corresponding to the phase of the rotational unevenness component when using the second pulse signal as a reference, and a digital value corresponding to the order of the rotational unevenness component using the rotational frequency of the motor as a reference, are calculated by the calculation compensation means. The calculation compensating means is stored in a memory area for correction data in advance, and the calculation compensating means includes a counting means for counting up each time the speed detecting means obtains a new first digital signal, and a counting means for counting up each time the speed detecting means obtains a new first digital signal; clearing means for clearing the count value of the counting means according to the timing of the second pulse signal of the generating means; a correction value calculation means for calculating a correction value corresponding to a magnitude at a time; and a combination of the correction value, the value of the first digital signal of the speed detection means, and the value of the second digital signal of the phase difference detection means. The above object is achieved by having a synthesizing means for calculating the compensating means, and using the synthesized signal of the synthesizing means as a control signal for the calculation compensating means.

Effect: By having the above-described structure, the present invention allows the compensating means to perform correction calculations on the detection error generated by the first pulse generating means, so that the detection error does not appear in the control signal. As a result, fluctuations in the rotational speed of the motor due to detection errors of the first pulse generating means are sufficiently reduced.

Example FIG. 1 shows a configuration diagram representing an embodiment of the present invention.

In FIG. 1, a first pulse generator 12 is configured by a frequency generator, a waveform shaping circuit, and a frequency dividing circuit that are directly connected to the motor 11, and generates a first pulse signal with a frequency proportional to the rotational speed of the motor 11. Generate a. The first pulse signal has 5z pulses per revolution of the motor 11 (Z must be an integer of 2 or more; in a cylinder motor of a video recorder, etc., usually Z=1Qo). Similarly, a second pulse generator 14 is configured by a rotational phase detector and a waveform shaping circuit that are directly connected to the motor 11.
A 1-north signal (second pulse signal b) is generated at a predetermined rotational phase.

The speed detector 13 detects the zero cross time of the first pulse signal a, obtains a digital signal corresponding to the instantaneous rotational speed of the motor 11 from the time interval, and holds it until the next detection time. When a new digital signal is obtained by the speed detector 13, the state determination signal j (output of the flip-flop for state determination) is set to "H'", and the reset signal 1 of the calculation compensator 21 is set to "'H". When the state determination flip-flop is set, the state determination signal j becomes L''.Here, "H11" represents a high potential state, and "LIT" represents a low potential state.In other words, the speed detector 13 When a new digital signal is obtained, the state determination signal j becomes "H", and after inputting the digital signal, the compensator 21 keeps the reset signal 1 at 1 for a predetermined period of time.
1 HIT and reset the status determination signal to L'' to prepare for the next speed detection operation.

The reference signal generator 15 generates a frequency signal C serving as a phase reference for the motor 11 (for example, an A-divided signal of the vertical synchronization signal of the reproduced image signal). The phase difference detector 16 obtains a digital signal i corresponding to the phase difference between the reference frequency signal C and the second pulse signal S, and holds it until the next detection point. That is, the time interval from the zero-crossing time of the reference frequency signal C to the zero-crossing time of the second pulse signal C is detected. When a new digital signal 1 is obtained by the phase difference detector 16, the state discrimination signal k (output of the state discrimination flip-flop) is set to "I H+", and the reset signal m of the calculation compensator 21 becomes +1 HIT. Then, the state determination flip-flop is reset and the state determination signal becomes LI+. That is, phase difference detector 1
3 obtains a new digital signal 1, the state determination signal becomes "H", and after inputting the digital signal i, the operational compensator 21 sets the reset signal m to "H" for a predetermined period of time to generate the state determination signal. k is reset to "l L I" in preparation for the next phase detection operation.

The calculation compensator 21 is composed of a calculation unit 22, a D/A converter 23, a first memory 24, and a second memory 25,
Digital signal of speed detector 13 and phase difference detector 16
A digital signal i and a correction value to be described later are synthesized by a built-in program, and a control signal g is output. The control signal g of the operational compensator 21 is input to the power amplifier 18, and the power amplified drive signal is supplied to the motor 11.

Therefore, the motor 11, the first pulse generator 12, the speed detector 13, the second pulse generator 14, and the phase difference detector 16
A speed control system and a phase control system are constituted by the compensator 21 and the power amplifier 18, and the rotational speed and rotational phase of the motor 11 are controlled to predetermined values.

The first memory 24 of the compensator 21 is divided into a ROM area (read-only memory area) in which predetermined programs and constants are stored, and a RAM area (random access memory area) in which necessary values are stored at any time. Arithmetic compensator 21
performs predetermined operations and calculations according to programs in the ROM area. Figure 2 shows a specific sequence of the program. The second memory 25 is composed of a PROM (electrically writable read-only memory), and all digital values in the second memory 25 are initially cleared to 0, and are cleared by the write operation described later. Correction data is memorized and stored.

Next, the operation of the program of the calculation compensator 21 shown in FIG. 2 will be explained in detail.

(1) First, the arithmetic unit 22 inputs the state determination signal j of the speed detector 13 and the state determination signal k of the phase difference detector 16, and waits for the signal j to become H''.

That is, the speed detector 13 detects the period of the first pulse signal B and monitors the output of a new digital signal.

(2) When the signal becomes II H"', read the digital signal of the speed detector 13, change it to the speed detection value S (digital value) corresponding to the digital signal, and keep the reset signal 1 "H" for a predetermined period of time. ''' speed detector 13
Reset the status determination signal.

(3) Subtract a predetermined reference value Sr from the detected speed value S to calculate the current speed error E (g=s-3r) of the motor 11 (speed error calculation means).

(4) Next, check the state of the signal input in (1). If k is HII, read the digital signal i of the phase difference detector 16 and convert it to the phase detection value P (digital value) corresponding to digital signal 1, and set the reset signal m to II Hl+ for a predetermined time to detect the phase difference. vessel 16
The state determination signal k is reset. By subtracting a predetermined reference value Pr from the phase detection value P, the phase error F (F
=P-Pr) (phase error calculation means). Furthermore, the counting variable is cleared to Q (clearing means).

Next, go to (6).

(5) When k is not +1 H"', count up the counting variable (counting means).

(6) Read the correction data M(1) at the address corresponding to the value of the counting variable from among the correction data stored in the FROM area of the second memory 25 (correction data retrieval means).

(A) Combine speed error E and phase error F, create first composite value Data M(I) is synthesized to create a second synthesized value Y (Y=X-1-B-M (engineering) (B is a constant)) (synthesis means).

(8) Output the composite signal Y to the D/A converter 23 and convert it into a control signal corresponding to the digital value of Y.

After that, the operation returns to (1).

Next, how to create correction data to be written into the FROM of the second memory 25 will be explained. The correction data generator 31 shown in FIG. It is composed of a correction data writer 33 that writes into the memory 25. When creating correction data, switches SW1 and SW2 in FIG. 1 are closed, and switch SW3 is open. Therefore, the reset signals 1 and m of the calculation compensator 21 are input to the rotational unevenness measuring device 32. moreover,
A periodic signal X corresponding to the actual rotational speed of the motor 11 is input to the input terminal 36 of the rotational unevenness measuring device 32 .

The periodic signal X can be obtained by temporarily attaching another highly accurate pulse generator to the motor 11, or by using the horizontal synchronization signal of the reproduced image signal in the cylinder motor of the video tape recorder.

In this state, the motor 11 is rotated and the control operation according to the program shown in FIG. 2 is performed. Rotation unevenness measuring device 3
2 detects the actual speed error of the motor 11 every moment from the disturbance in the period of the periodic signal X. In addition, rotation unevenness measuring device 3
2) The rising edge of the reset signal m (the phase difference detector 16 obtains a new digital signal i, and the arithmetic compensator 21
The rising edge of the reset signal 1 (the speed detector 13 obtains a new digital signal and the calculation compensator 21 Each time the rotational unevenness measuring device 3 arrives,
The measured value of No. 2 is stored in the correction data writer 33 as correction data. That is, the count variable field is cleared to 0 at the rising edge of the reset signal m, and the variable field is counted up every time the rising edge of the reset signal 1 arrives (L=L-1-1). The measured value of the rotational unevenness measuring device 32 at the time of start-up is stored as correction data M(L) in the address corresponding to the variable number in the RAM area for storing correction data of the correction data writer 33. . Such an operation is performed for one revolution of the motor 11 to create correction data for one revolution of the motor 11 (correction data may also be created by taking the average value of 100 revolutions of the motor 11).

Once the correction data M(L) is generated by the rotational unevenness measuring device 32, the motor 11 is stopped and the second memory 25 is electrically separated from the computing unit 22. Next, the switch SW3 is closed, and the RA for storing correction data of the correction data writer 33 is closed.
The correction data M(L) in the M area is aligned in a predetermined order and sequentially written into the FROM area of the second memory 25.

Through the above operations, the correction data has been created in the second memory 25, so the correction data generator 31 is no longer necessary after this, and the switch SW1. Open SW2゜SW3,
The correction data generator 31 is separated from the speed control device. That is, the correction data writing operation by the correction data generator 31 only needs to be performed once during the adjustment stage of the speed control device of the present motor.

Next, the influence of detection error in this implementation will be explained. The calculation compensator 21 combines the digital signal of the speed detector 13, the digital signal of the phase difference detector 16, and the correction data M (1) of the second memory 25, and generates a composite value Y.
=E+A -F+B -M (I) and Y is D/A
A converter 23 converts it into a control signal g. Therefore, when the correction data M(I) are all O (at the time of correction data creation), YwE+A−F is converted to the control signal g. Now, if there is a detection error in the first pulse generator 12, the rotational speed of the motor 11 will vary depending on the detection error, as in the case of the conventional train. In the cylinder motor of a video tape recorder, the speed fluctuation due to this detection error is the largest and is the main cause of jitter. Therefore, the speed fluctuation of the motor 11 is measured by the rotational unevenness measuring device 32, and the rotational unevenness is measured every time the speed detector 13 obtains a new digital value based on the generation timing of the second pulse signal. By converting it into a digital value and using it as correction data M(I), it is possible to obtain correction data corresponding to the dowel detection error (M(Z) may be obtained by multiplying the rotational unevenness by a constant). After obtaining the correction data for one rotation, it is stored in the second memory 25 and used from the next control.

During control using the correction data M(1), the speed control system operates so that the composite value Y becomes a constant value (0).

That is, Y=00. Here, assuming that the phase error F due to the digital signal 1 of the phase difference detector 16 is 0 (the value of F does not change in one rotation of the motor 11, this may be assumed). , E-1-B-M(1)-〇. Speed error E due to digital value of speed detector 13
includes the detection error of the first pulse generator 12.

Now, if the actual speed error of the motor 11 is EX and the detection error is G (I) (the detection error changes depending on the rotational position of the motor 11, it is a function of the count variable), then Ex = - G (I) −B −M (I). Therefore, as correction data M (I) : G (
I)/B, Ex=O, υ, and the actual speed fluctuation of the motor 11 becomes 0. That is, the speed fluctuation of the speed control device of this embodiment is significantly reduced.

Additionally, in general, the detection error is unrelated to the load torque;
It depends only on the processing and assembly accuracy of the first pulse generator, and does not change once the assembly is completed.

In the program of the above-mentioned implementation sequence shown in FIG. was needed. This is possible when the arithmetic unit 22, D/A converter 23, first memory 24, and second memory 26 of the arithmetic compensator 21 shown in FIG. However, the disadvantage is that the chip area increases significantly. FIG. 3 shows a series of programs that have improved these drawbacks.

Next, the operation will be explained in detail.

(11) First, the calculator 22 inputs the state discrimination signal J of the speed detector 13 and the state discrimination signal k of the phase difference detector 16,
It is waiting for the signal F to become H". In other words, the speed detector 13 detects the period of the first pulse signal B and monitors the output of a new digital signal.

(12) When j becomes 11 H"", read the digital signal of the speed detector 13 and convert it to the speed detection value S (digital value) corresponding to the digital signal, and
The state determination signal of the speed detector 13 is reset by setting the reset signal 1 to 11H"' for a predetermined period of time.

(13) Subtract a predetermined reference value Sr from the detected speed value S,
Current speed error E(1!:=s−sr
) (speed error calculation means).

(14) Next, check the state of the input signal in (11). If k is H'', the digital signal i of the phase difference detector 16 is read and converted to the phase detection value P (digital value) corresponding to the digital signal 1, and the reset signal m is set to 11 H++ for a predetermined period of time to calculate the phase difference. Detector 1
The state determination signal k of No. 6 is reset. The phase error F of the motor 11 is obtained by subtracting a predetermined reference value Pr from the phase detection value P.
(F=P-Pr) (phase error calculation means). Furthermore, the generation timing of the second pulse signal S is detected by reading the new digital signal l of the phase difference detector 16, and the counting variable is cleared to N' (i-0 (clearing means). , go to (16).

(15) When k is not H11, count variable N
is counted up with H as mod (first counting means). Here, H is a divisor of Z greater than or equal to 2. N-N+1
(nod H) sets the value of H plus 1 to new H, and if N=H, sets N to O. After this, if N is not 0, go directly to (16).

If N=◯, count up the counting variable (second counting means) and go to (16).

(16) Read the correction data M(I) at the address corresponding to the value of the counting variable from among the correction data stored in the FROM area of the second memory 25 (correction data retrieval means).

(17) Combine speed error E and phase error F to create the first composite value
・decreases the multiplication)), the first composite value X and the correction data M
(I) to create the second composite value Y (Y,...
X-1-B-M (I) (B is a constant)) (synthesis means).

(18) Output the composite signal Y to the D/person converter 23 and convert it into a control signal corresponding to the digital value of Y.

After that, the operation returns to (11).

Corresponding to the above-mentioned operation of the calculation compensator 21, the operation of the correction data generator 31 shown in FIG. be. That is, each time the speed detector 13 receives a new digital signal H times, the correction data M (I) is created. Other operations are the same as those in the above-described embodiments, and their explanation will be omitted.

With this configuration, the number of correction data is reduced to 1/H, and the FROM area of the second memory 25 becomes much smaller. For example, if Z=100°H=s,
Z/H=20, which is 1/5. Even if the number of pieces of correction data is reduced in this way, detection errors at low frequencies, such as the rotational frequency of the motor 11, can be sufficiently reduced.

Note that it is also possible to realize the operations of the first counting means and the second counting means in this embodiment using one counting variable. Even in that case, there is no difference in the effect obtained, and it goes without saying that it is included in the present invention.

In the programs of the above-mentioned implementation series shown in FIGS. 2 and 3, the waveform of the rotational unevenness of the motor 11, which is the measurement result of the rotational unevenness measuring device 32, is stored as correction data as it is, but the present invention However, the rotational unevenness component of a specific frequency may be extracted by frequency analysis, and digital values corresponding to the amplitude, phase, and order may be stored in the second memory 25. The fourth line of programs like this
As shown in the figure.

Next, the operation will be explained in detail.

(21) First, the calculator 22 inputs the state discrimination signal k of the speed detector 13 and the state discrimination signal k of the phase difference detector 16,
Waiting for the signal to become "H". That is, the speed detector 13 detects the period of the first pulse signal B and monitors the output of a new digital signal.

(22) When j becomes "H++", the digital signal of the speed detector 13 is read, the speed detection value S (digital value) corresponding to the digital signal is restored, and the reset signal 1 is kept at "H'' for a predetermined period of time. speed detector 13
The state determination signal j is reset.

(23) Subtract a predetermined reference value Sr from the detected speed value S,
The current speed error E (E=S-3r) of the motor 11 is calculated (speed error calculation means).

(24) Next, check the state of the input signal in (21). If k is "Hu," read the digital signal i of the phase difference detector 16, convert it to the phase detection value P (digital value) corresponding to the digital signal i, and set the reset signal m to "Hu" for a predetermined period of time to calculate the phase difference. The state determination signal k of the detector 16 is reset. Subtracting a predetermined reference value Pr from the phase detection value P, the phase error F (F
=P-Pr) (phase error calculation means). Furthermore, the generation timing of the second pulse signal S is detected by the reading operation on the new digital signal of the phase difference detector 16, and the counting variables and N are cleared to 0 (clearing means). Next, go to (26).

(25) When k is not "HI+", count up the counting variable (counting means).

(26) The timing at which the phase difference detector 16 obtains a digital value T corresponding to the amplitude of a specific rotational unevenness component from among the correction data stored in the FROM area of the second memory 26 and a new digital signal. (pulse generation timing of the second pulse signal) is a digital value V corresponding to the phase of the rotational unevenness component when the rotational frequency of the motor 11 is used as the reference, and the order of the rotational unevenness component when the rotational frequency of the motor 11 is used as the reference. A digital value W corresponding to the correction data is read (correction data generating means). ' From the values of r, v, w and the counting variables, the correction value M=T-sru (2π·W.

Calculate (I+V)/Z). (Correction value calculation means).

(27) Combine the speed error E and the phase error F to create the first composite value X and the correction value M are combined to create a second combined value Y (Y, = X-1-B.M (B is a constant)) (synthesis means).

(28) Output the composite signal Y to the D/A converter 23 and convert it into a control signal corresponding to the digital value of Y.

After that, the operation returns to (21).

Corresponding to the above-mentioned operation of the calculation compensator 21, the operation of the correction data generator 31 shown in FIG.
It is necessary to provide r, v, and w as correction data.

Normally, the detection error at the same frequency as the rotational frequency of the motor 11 is the largest, so it is sufficient to correct only the rotational unevenness component of order W = 1 (if necessary, calculate correction values for multiple rotational unevenness components). good). The other operations are the same as those of the previous embodiment, and the explanation will be omitted.

With this configuration, the number of correction data may be three, and the FROM area of the second memory 26 becomes significantly smaller.

Note that in each of the above embodiments, the speed control band was described as being sufficiently wider than the rotational frequency of the motor, but the present invention is not limited to such a case.

If the speed control device is narrow, correction data may be created by multiplying the measurement value of the rotation unevenness measuring device by a frequency characteristic for compensation according to the speed control characteristic. Furthermore, the output of the arithmetic compensator may be a digital signal or a PWM signal (pulse width modulation signal), and the output signal of the power amplifier may also be a PWM signal. Further, a brushless DC motor may be used as the motor. Furthermore, the arithmetic compensator may be configured entirely in hardware and may perform the same operations as those performed by the program described above. In addition, various modifications can be made without changing the gist of the present invention.

Effects of the Invention Since the motor speed control device of the present invention cancels the detection error of the first pulse generator using correction data, speed fluctuations are extremely small.

Therefore, if the cylinder motor of a video tape recorder is constructed based on the present invention, jitter can be significantly reduced and reproduced images of extremely high quality can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a motor speed control device according to an embodiment of the present invention, FIG. 2 is a flow diagram of a built-in program of the compensator, and FIG. 3 is a flow diagram of another built-in program of the compensator shown in FIG. FIG. 4 is another flow diagram of the built-in program of the compensator of FIG. 1, and FIG. 6 is a block diagram of a conventional motor speed side leg device. 11...Motor, 12...First pulse generator, 13...Speed detector, 14...Second pulse generator, 16...Reference Signal generator, 1e・
... Phase difference detector, 18 ... Power amplifier,
21... Arithmetic compensator, 22... Arithmetic unit, 2
3...D/A converter, 24...first memory,
25...Second memory, 31...Correction data creator, 32...Rotation unevenness measuring device, 33.
...Correction data writer, 35...Input terminal.

Claims (3)

[Claims] (1) first pulse generating means for generating a first pulse signal whose frequency changes according to the rotational speed of the motor;
speed detection means for obtaining a first digital signal corresponding to the rotational speed of the motor based on the first pulse signal Z times per rotation of the motor (Z is an integer of 2 or more); and a rotational phase of the motor. a second pulse generating means for generating a second pulse signal corresponding to once per rotation of the motor, a reference frequency signal generating means for generating a reference frequency signal, and a second pulse signal corresponding to the reference frequency signal and the second pulse signal. a phase difference detection means for obtaining a second digital signal corresponding to the phase difference between the first digital signal of the speed detection means and a second digital signal of the phase difference detection means; a calculation compensation means for generating a control signal in response to the second digital signal and the correction data; and a power amplification means for supplying the motor with electric power according to the control signal of the calculation compensation means. The rotational unevenness data detected by the rotational unevenness measuring means that measures the actual rotational unevenness of the motor that occurs when the correction data is set to 0 is calculated based on the second pulse signal of the second pulse generating means. The detection means converts the rotational unevenness data at a time synchronized with the timing at which a new first digital signal is obtained into a digital value, and uses the rotational unevenness data for one rotation of the motor as correction data for the calculation compensation means. The arithmetic compensating means includes a counting means for counting up each time the speed detecting means obtains a new first digital signal, and a second pulse signal of the second pulse generating means. a clearing means for clearing the count value of the counting means at a timing of; and a clearing means for retrieving the correction data value in the correction data memory area at an address corresponding to the count value of the counting means, and the correction data value and the speed detection means. and a synthesis means for synthesizing the value of the first digital signal of the phase difference detection means and the value of the second digital signal of the phase difference detection means,
A speed control device for a motor, characterized in that a synthesized signal from the synthesizing means is used as a control signal for the calculation compensating means. (2) The motor speed control device according to claim (1), wherein the number of correction data is Z/H (H is a divisor of Z of 2 or more). (3) first pulse generating means for generating a first pulse signal whose frequency changes according to the rotational speed of the motor;
speed detection means for obtaining a first digital signal corresponding to the rotational speed of the motor based on the first pulse signal Z times per rotation of the motor (Z is an integer of 2 or more); and a rotational phase of the motor. a second pulse generating means for generating a second pulse signal corresponding to once per rotation of the motor, a reference frequency signal generating means for generating a reference frequency signal, and a second pulse signal corresponding to the reference frequency signal and the second pulse signal. a phase difference detection means for obtaining a second digital signal corresponding to the phase difference between the first digital signal of the speed detection means and a second digital signal of the phase difference detection means; a calculation compensation means for generating a control signal in response to the second digital signal and the correction data; and a power amplification means for supplying the motor with electric power according to the control signal of the calculation compensation means. A rotational unevenness component of a specific frequency is extracted from the rotational unevenness data detected by a rotational unevenness measuring means that measures the actual rotational unevenness of the motor that occurs when the correction data is set to 0, and the rotational unevenness component is determined according to the amplitude of the rotational unevenness component. a digital value corresponding to the phase of the rotational unevenness component when using the second pulse signal of the second pulse generating means as a reference, and the rotational unevenness component using the rotational frequency of the motor as a reference. A digital value corresponding to the order of is stored in advance in a memory area for correction data of the arithmetic compensating means, and furthermore, the arithmetic compensating means counts every time the speed detecting means obtains a new first digital signal. a clearing means for clearing the count value of the counting means according to the timing of the second pulse signal of the second pulse generating means; and storing the count value of the counting means in the correction data memory area. correction value calculating means for calculating a correction value corresponding to the magnitude of the rotational unevenness component at that time from the digital value obtained by the rotational unevenness; and detecting the phase difference between the correction value and the value of the first digital signal of the speed detection means. 1. A speed control device for a motor, comprising a synthesizing means for synthesizing the values of the second digital signals of the means, and a synthesized signal of the synthesizing means being used as a control signal for the calculation compensating means.