JPS62188273A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the element characteristics while reducing the capacity of depletion layer and restraining the inversion voltage and the junction voltage of a field from declining by a method wherein a high concentration region is formed on the part where a gate region, a source region and a drain region are in contact with a field oxide film. CONSTITUTION:P-type high concentration impurity regions 15 slightly larger than a gate region are formed in a semiconductor substrate 10 immediately below a gate electrode 14 while the impurity regions are extended over the regions including the boundary parts between field oxide films 11 and element regions. Besides, N-type impurity regions 16 to be source region and a drain region in the diffusion depth less than that of high impurity regions 15 are formed in the element region parts halved by the gate region below the gate electrode 14. In other words, the peripheral regions of impurity regions 16 are included in the high concentration impurity regions 15.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a semiconductor device.

(Conventional technology and its problems) sz^er all car: # I-←j top 1iB
n) +A Δ jet h・71 1r:: one f+
The higher the impurity concentration implanted into the n/field,
The field inversion voltage increases and the junction breakdown voltage decreases. In other words, the concentration of the impurity to be implanted under the field oxide film is determined within a range where the field inversion voltage shown by the open solid line matches the field edge junction breakdown voltage.

As shown in FIG. 4, in the dirt region of the MO8 type semiconductor device, a highly concentrated impurity region 1 is formed in a slightly larger region. However, the impurities forming the high concentration impurity region 1 also diffuse into the edge portion 1a of the field oxide film 2.

Therefore, considering the portion where the high concentration impurity region 1 extends to the edge portion 1a, as shown in FIG.
A region 4 is formed in which the impurity in the impurity region 3 formed in advance overlaps with the impurity directly under the impurity region 3 . As a result, when the impurity concentration implanted into the dirt region increases, the impurity concentration at the edge portion 1a of the field oxide film 2 increases as a result.

Because of this, there is only one company, one company, and one company, Baishun Play.
The down voltage decreases. Since the field inversion voltage shown in FIG. 3 increases and the field edge junction breakdown voltage decreases, the relationship between the two and the impurity concentration under the field oxide film 2 is shown by the broken line in the figure. . Therefore, the impurity concentration under the field oxide film 1 where the pressure on both sides can be matched is from the intersection a1 of the solid line to the intersection a of the broken line in the figure.
It decreases by the amount moved to 2. In other words, the impurity concentration implanted into the gate region becomes higher due to the miniaturization of devices, and as a result, the field reversal voltage becomes higher than the concentration of the impurity region 3 under the field oxide film 2. The concentration largely depends on the concentration of the impurity region 1. Therefore, considering a region 1b in which the high concentration impurity region 1 does not extend to the edge portion ZaK, a field oxidation is performed in which the high concentration impurity region 1 under the dirt region does not exist and only the impurity region 3 under the field oxide film 2 exists. Edge part 1 of membrane 2
b (see FIG. 4), the field inversion voltage becomes low. Therefore, it is conceivable to form a high concentration impurity region not only under the f-) region but also over the entire region where the source/drain impurity regions are to be formed. However, if a highly concentrated impurity region is formed throughout the device region consisting of the dirt region and source/drain region in this way, the following problems will occur as the device becomes finer and the impurity regions that make up the source/drain become shallower. .

That is, as the impurity regions of the source and drain become shallower, the high concentration impurity region 1 extends directly below the source/drain impurity regions, thereby increasing the impurity concentration on the substrate 5 side. Finally, the PN junction formed by the shallower source/drain impurity region and the correspondingly extended high concentration impurity region 1 is formed by the source/drain impurity region being sufficiently deep to form the substrate immediately below it. In the case of the PN junction formed with 5 and 5, 5 and 5 are also pulled up to the main surface side. Therefore, the depletion layer does not spread in the direction of the substrate 5, and the capacitance of the depletion layer increases, resulting in insufficient improvement of device characteristics.

[Structure of the invention]

(Means for Solving the Problems) The present invention includes an element region provided in a predetermined region of a semiconductor substrate of a -conductivity type, and an impurity region of an opposite conductivity type that is divided into two parts via a dirt region. a source region and a drain region formed in the semiconductor substrate; and a high concentration impurity region of the same conductivity type extending from the main surface into the semiconductor substrate.

(Function) According to the semiconductor device according to the present invention, the depletion layer capacity 1 can be reduced because the high concentration region is provided in the portion where the gate region, the source region, and the drain region are in contact with the field oxide film. Therefore, it is possible to suppress a decrease in field inversion voltage and junction breakdown voltage, and improve device characteristics.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a schematic configuration of an embodiment of the present invention. Reference numeral 10 in the figure indicates a semiconductor substrate of P-type. In a predetermined region of the semiconductor substrate 100, an element region surrounded by a field oxide film 1 is provided. Field oxide film 1
A P-type impurity region 12 is formed directly under the P-type impurity region 1 .

A gate electrode 14 is formed in a predetermined region on the element region with a dirt oxide film 13 interposed therebetween. In the semiconductor substrate 10 directly under the r-1 electric box 14, there is a P-type high concentration impurity region 15.
The dirt region is also formed slightly larger than the dirt region, and the high concentration impurity 15 extends to a region including the boundary between the field oxide film 11 and the element region. Furthermore, in the part of the element region divided into two by the date region under the f-) electrode 14, an N-type impurity region 16 which becomes a source region and a drain region has a shallower expansion depth than the high concentration impurity region 15. is formed. The peripheral region of the impurity region 16 is included in the high concentration impurity region 15 .

Here, the formation of the high concentration impurity region 15 is shown in FIG.
As shown in B), a resist film 17 having a slightly smaller shape is placed on the portion where the impurity region which will become the source/drain region in the element region is to be formed.
Using 7 as a mask, impurities 18 such as zolon are applied to the semiconductor substrate 1.
It can be easily formed by injecting into the 0.

According to the semiconductor device 20 configured in this manner, channel ion implantation is no longer performed in most of the impurity regions 16 constituting the source and drain regions, and the impurity concentration of the semiconductor substrate 10 is not increased. , an increase in depletion layer capacitance can be prevented.

In addition, since the channel ion implantation is uniformly performed at the edge of the field oxide film 1, the impurity concentration implanted into the channel becomes high due to the miniaturization of the device, and the impurity concentration implanted into the field oxide film 11 side is increased. Even if the voltage becomes low, by matching the field inversion voltage at the edge portion of the field oxide film 11 with the junction breakdown voltage, it is possible to prevent both voltages from decreasing.

As a result, by applying the present invention to a transistor that selects a column, access time can be shortened by reducing the depletion layer capacitance of the transistor while maintaining consistency with peripheral transistors without lowering the field inversion voltage. be able to. Furthermore, if the contact can be made only in part of the source and drain regions, it becomes necessary to increase the area of the source and drain in order to reduce the diffusion resistance. An increase in the depletion layer capacity 1 due to an increase in the area of can be suppressed to a small value.

〔Effect of the invention〕

As explained above, according to the semiconductor device according to the present invention,
without reducing inversion voltage and junction breakdown voltage in the field.
This makes it possible to reduce the depletion layer capacitance and improve device characteristics.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing a schematic configuration of an embodiment of the present invention,
FIG. 2 is an explanatory diagram showing the method of forming the high concentration impurity region of the same embodiment, FIG. 3 is a characteristic diagram showing the relationship between voltage and impurity concentration under the field oxide film, and FIGS. The figure is an explanatory diagram showing problems of a conventional semiconductor device. 10... Semiconductor substrate, 11... Field oxide film,
12... P-type impurity region, 13... dirt oxide film,
14...? -) electrode, 15...high concentration impurity region,
16... Impurity region, 17... Resist film, 18...
...Impurity, 20...Semiconductor device applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2

Claims (1)

[Claims] An element region provided in a predetermined region of a semiconductor substrate of one conductivity type, the element region divided into two by a gate region, and a lease region and a drain region formed of impurity regions of the opposite conductivity type, and the gate region and extends into the semiconductor substrate from the main surface in a slightly wider region, and extends into the semiconductor substrate from the main surface including peripheral regions of the source region and the drain region. 1. A semiconductor device comprising: a high-concentration impurity region of the same conductivity type.