JPS62181468A - Flip-flop composed of resonant tunneling transistor - Google Patents

Abstract

PURPOSE:To enable the high-speed operation by simplifying a constitution by providing a current source inserted between a base and an emitter of an active element and a means for selectively giving signals to said active element. CONSTITUTION:This device comprises an active element QR, a resistor RB connected between base and emitter in order to cause the base of said active element QR to obtain two stable states, a power source for supplying a positive side power source level VCC1, and a static element QS for selectively giving signals in order to cause said active element QR to obtain either of two stable states. Consequently, the resonant tunneling effect generated in an RHET as an active element becomes to be able to realize two stable states of the base and these two stable states can be transferred arbitrarily by signals from the base side or the collector side. Accordingly, the constitution by use of a small number of active elements is possible and it is effective for attaining high integration and high speed of a flip-flop.

Description

Detailed Description of the Invention [Summary] The present invention provides an active element in which carriers resonantly tunnel through a superlattice layer formed between an emitter layer and a base layer in a flip-flop; By adopting a configuration comprising a current source inserted between the base and emitter of the element and means for selectively applying a signal to the active element, it is possible to determine which of the two stable states the active element is in. Either one can be selected arbitrarily, and the configuration is simple and high-speed operation is possible.

[Industrial application field]

The present invention describes a hot electron transistor (resonant-tunnel) that utilizes the resonant tunneling effect.
neltng hot electron tr
bipolar transistor (RHET) or bipolar transistor (reson transistor) that utilizes resonant tunneling effect.
ant-tunneling bipolar t
ransist.

The present invention relates to a flip-flop whose active element is a resonant tunneling transistor such as r:RBT).

[Conventional technology]

To date, semiconductor memory devices using many types of flip-flops have been put into practical use, but there is no end to the demand for faster speeds and higher integration.

However, due to technical limitations in microfabrication and an increase in delay time due to increased wiring capacity, the ability to meet the above requirements is gradually reaching a plateau.

In order to overcome this problem, it is necessary to improve the structure of the active element itself to improve performance, reduce the number of elements, and increase the speed without impairing the function as a semiconductor memory device.

Incidentally, to construct a practical static memory cell, two transistors for register tt and two transistors for transfer gate are normally required.

[Problem that the invention seeks to solve]

As mentioned above, in the future, flip-flops that will be used in semiconductor storage devices and the like will not only be high-speed, but also have high-speed components.

Examples include those with fewer children.

However, it is believed that the reason why such flip-flops have not been realized is that suitable active devices for constructing them do not exist.

The present invention attempts to obtain a flip-flop with hour wheel configuration and high speed operation by using a resonant tunneling transistor such as RHE T or RBT.

[Means for solving problems]

The present inventor previously provided the RHET as one of the resonant tunneling transistors (if necessary, the patent application
0-160314).

FIG. 8 is a diagram for explaining the RHET, in which (A) is a cutaway side view of the main part, and (B) is an energy band diagram corresponding to FIG. 8 (A).

In FIG. 8(A), ■ is an n+ type GaAs collector layer, 2 is an Al, Ga+-y A3:I collector side potential barrier layer, 3 is an n'' type GaAs base layer, 4 is a superlattice layer, 5 is an n+ type GaAs emitter layer, 6 is an emitter electrode, 7 is a base electrode, and 8 is a collector electrode. In FIG. 8(B), EC is the bottom of the conduction band, EF is the Fermi level, and EX is the bottom of the conduction band. indicate the energy level of each sub-band.

Incidentally, the superlattice layer 4 consists of an A lx Ga +-x A S barrier layer 4A and a GaAs well layer 4B,
Although the illustrated example is composed of two barrier layers and a well layer, a plurality of well layers and barrier layers for forming the well layers may be used if necessary.

Figures 9 (A) to (C) represent energy band diagrams for explaining the operating principle of RHET, and the same symbols as those used in Figure 8 indicate the same parts or have the same meaning. shall have it.

In the figure, q is the charge amount of carriers (electrons), and φC is the conduction band bottom discontinuity value (c) between the collector side potential barrier layer 2 and the base layer 3.

production band discontin
ity) and Vat indicate the base-emitter voltage, respectively. Furthermore, qφ. Let be the barrier height.

FIG. 9(A) is an energy band diagram when the base-emitter voltage VilE is 0 or close to 0.

In the illustrated state, a voltage vci is applied between the collector and emitter, but a voltage v[l! is almost 0, so the energy level in the emitter layer 5 is equal to the energy level of the sub-band in the well layer 4B.
Since the level is different from the level EX, it is impossible for electrons in the emitter layer 5 to tunnel through the superlattice layer 4 and escape to the base layer 3, and therefore no current flows through the RHET.

Figure 9 (B) shows the base-emitter voltage ■, which is 2 EX
/ Energy band when almost equal to q
This is a diagram.

In the illustrated state, the energy level in the emitter layer 5 matches the sub-band energy level Ex in the well layer 4B, so electrons in the emitter layer 5 cross the superlattice N4 due to the resonance tunneling effect. and is injected into the base layer 3, where potential energy (= 2 E
X ) is converted into kinetic energy, so the electrons are in a so-called hot state and pass through the base layer 3 to the barrier ink, and the kinetic energy of the hot electrons at this time increases the barrier height qφ. If the current is large compared to , it reaches the collector layer 1 and becomes a collector current, and if it is small, it cannot reach the collector layer 1 and becomes a base current.

FIG. 9(C) shows the base-emitter voltage Vll! is 2
This is an energy band diagram in the case where EX/q is larger.

In the illustrated state, the energy level in the emitter layer 5 is higher than the sub-band energy level Ex in the well layer 4B, so no resonant tunneling effect occurs, and the energy level from the emitter layer 5 to the base layer is increased again. There are no more electrons that escape to 3, and the collector current or base current described above is reduced.

FIG. 10 is a diagram explaining the relationship between the base-emitter voltage V and the emitter current IE measured with the collector open of the prototype RHET, and the symbols used in FIGS. 8 and 9 are used. Identical symbols indicate the same parts or have the same meaning.

In the figure, the horizontal axis represents the base-emitter voltage VB! , and the emitter current (6) is plotted on the vertical axis. still,
This data was obtained at a temperature of 77 (K).

As is clear from the figure, VB! in RHET! vs. 1E
In this relationship, there exists a differential negative resistance region due to the so-called resonance tunneling effect.

Now, the present invention will be explained in detail based on the above-mentioned matters.

FIG. 1 shows a circuit diagram of essential parts for explaining the principle of a flip-flop according to the present invention.

In the figure, QR is an active element that is RHET, RC is a load resistance, RB is a current source resistance, N1 and N2 are connection points, and V
CCI and v ccz each indicate the positive power supply level.

As shown, the current source resistor RB is connected to the base of the active element QR.
When connected to a power supply that supplies the positive power supply level Veal via , it is equivalent to inserting a kind of constant current source between the base and emitter, and the base-emitter voltage VIIE and base current ■.

The relationship between the base-emitter voltage VIIE and the collector current 2 is as shown in FIGS. 2(A) and 2(B).

Such a relationship occurs particularly when the kinetic energy of the hot electrons is small compared to the barrier height qφ0 of the collector side potential barrier layer.

In FIG. 2(A), the horizontal axis represents the base-emitter voltage VIIE, and the vertical axis represents the base current l.

In FIG. 2(B), the horizontal axis represents the base-emitter voltage V0, and the vertical axis represents the collector current IC.

In the figure, CLI is the characteristic line, LL is the load line, A and B
indicates a stable point, RP indicates a resonance peak point, and C and D indicate points corresponding to stable points A and B, respectively.

By the way, in the circuit shown in Figure 1, the connection point N
The operation of inputting a signal to connection point N2 and outputting a signal from connection point N2, and the operation of inputting a signal to connection point N2 and outputting a signal from connection point N2.
Any operation of outputting a signal from 2 can be realized.

The operation of the circuit shown in FIG. 1 will be explained with reference to FIGS. 2(A) and 2(B).

As is clear from the figure, the active element QR has stable points A and B.
Two stable states can be maintained as shown in .

First, a case will be described in which a signal is input to the connection point N1 and a signal is output from the connection point N2.

Now, by some means, a high level (
If a pulse signal of "H" level) is input manually, the operating point of the active element QR transitions from stable point A to stable point B, or remains at stable point B.

Similarly, by some means, a low
If a pulse signal of a level (“S” level) is input manually, the operating point of the active element QR remains at a stable point, or transitions from a stable point B to a stable point A.

As can be seen from the above description, the operating point of the active element QR takes one of the two stable points A and B depending on the level at the connection point N1.

It goes without saying that the value of the collector current 1c changes in response to such an operating point, and this is shown in FIG. 2(B).

As is clear from the figure, since a large collector current flows at the point corresponding to stable point B, the voltage drop due to the load resistance RC is also large, and the signal output from the connection point N2 is "L". At point C, which corresponds to stable point A, only a small collector current flows, so the voltage drop due to the load resistance RC is small, and the signal output from connection point N2 is at the "H" level. becomes.

In this way, if the operating point of the active element QR can take two stable points A and B, it is natural that the semiconductor memory device can perform write and read operations. This is explained in detail in the Example section.

Next, a case will be described in which a signal is input to the connection point N2 and a signal is also output from the connection point N2.

In this case, by changing the collector current by 1°, the base current can be changed to 1°. The operation is similar to that in which a signal is input to the connection point N1 and a signal is output from the connection point N2 as described above.

Figures 3 (A) and (B) are active elements Q corresponding to Figure 2.
This represents an energy hand diagram for explaining the operation of R, and the same symbols as those used in FIG. 9 represent the same parts or have the same meaning.

The state seen in FIG. 3(A) corresponds to stable point A shown in FIG. 2, and the state seen in FIG. 3(B) corresponds to stable point B shown in FIG. It corresponds to

In each state of FIGS. 3(A) and 3(B), the sub-fields generated in the well layer reflect the fact that the stable points A and B seen in FIG. 2 are shifted from the resonance point RP. The energy level EX of the hand is the bottom E of the conduction band in the emitter layer 5.
Although the energy level is slightly higher or lower than that of c, in any state, the energy level from the emitter layer 5 to the base layer 3
Alternatively, a corresponding current (electron current) can be passed through the collector layer 1. That is, in the case of FIG. 3(A), since the barrier height in the collector side potential barrier layer is high, the electrons passing from the emitter layer 5 to the base layer 3 become a base current. In the case of FIG. 3(B), since the base-emitter voltages v and E are large, direct tunneling or resonant tunneling (if a second sub-hand exists) from the emitter layer 5 is performed to Since the kinetic energy of the hot electrons is sufficiently large, the hot electrons pass through the collector side potential barrier layer 2 and become a collector current.

FIGS. 4(A) and 4(B) show the flip curve corresponding to the collector-emitter voltage VCE in the active element QR.
This represents an energy band diagram for explaining the operation of a flop, and the same symbols as those used in FIGS. 3 and 9 indicate the same parts or have the same meaning.

This case corresponds to the case where a signal is input to the connection point N2 described above and an output is similarly obtained from the connection point N2.

Fig. 4 (A) shows the energy band when a signal of level I (") is inputted to the connection point N2, and therefore when the collector-emitter voltage ■ is greatly swung to the positive side.
This is a diagram.

As can be seen from the figure, the slope of the bottom E of the conduction band in the potential barrier layer 2 on the collector side becomes steep as shown by the dashed line, so that until then the barrier reaches the collector layer l. The electrons that were not able to do so can also tunnel and flow as shown by arrow e. In this case, the base current (2) decreases, so the base-emitter voltage (2) increases. In other words, the state of stable point B shown in Fig. 2 is reached, and a large collector current flows.As a result, the voltage drop due to the load resistance RC also becomes large, so the signal output from the connection point N2 is "L". ``It's a level.

FIG. 4(B) shows that when a "L" level signal is input to the connection point N2, the collector-emitter voltage . The energy band when is almost 0 (V)
This is a diagram.

In this case, the slope of the bottom Ec of the conduction band in the potential barrier layer 2 on the collector side is in the opposite direction as shown by the broken line, so that until then it has not reached the collector layer 1 beyond the barrier. Also, the electrons are reflected as shown by arrow e. In this case, the base current (1) increases, so that the base-emitter voltage VIIK decreases. In other words, the state is at the stable point A shown in Figure 2, and only a small collector current flows, so the voltage drop due to the load resistance RC is small, and the signal output from the connection point N2 is at the "H" level. become.

In this way, in the flip-flop shown in Figure 1, depending on the potential on the base side or the collector side, the base potential is changed by flowing or drawing current to the base of the active element QR, and the two Steady state can be controlled.

Incidentally, as a technique similar to the present invention, it is possible to use a diode having negative resistance as an active element.

Figure 11 shows a circuit diagram of the main parts of a semiconductor memory device using a diode with negative resistance, and the same symbols as those used in Figure 1 indicate the same parts or have the same meaning. .

In the figure, DN indicates a diode having negative resistance.

Although this semiconductor memory device is of course capable of memory operation, the stored information becomes unstable because current is drawn from or flowed into the diode DN itself during reading. However, in the flip-flop explained with reference to FIG. 1, when reading, current is supplied from a power supply on the collector side that is independent from the current circuit for maintaining memory, so the memory state can be maintained stably. Leave it there,
Can be read.

From the above, in the flip-flop of the present invention, the emitter side consists of a superlattice layer formed between the emitter layer (for example, the n+ type GaAs emitter layer 5) and the base N (for example, the n+ type GaAs base layer 3). potential·
A barrier layer (for example, superlattice layer 4) and a collector side potential barrier layer (for example, /l) formed between the base layer and the collector layer (for example, n+ type GaAs collector layer 1)
.

Ga1-As collector side potential barrier layer 2)
(e.g., active element QR), and a current source (e.g., resistor RB and positive power supply level VCCI) connected between the base and emitter to allow the base of the active element to take two stable states. (a power source for supplying the active element) and means (for example, a static element QS) for selectively applying a signal to the active element to make it adopt one of the two stable states.

Although the flip-flop of the present invention has been mainly described with reference to its application to semiconductor memory devices, it is of course applicable to logic circuits without being limited thereto, and can also be applied to active elements. As, RH
In addition to the ET, it is also possible to use a resonant tunneling transistor, ie, an RBT, in which the collector side potential barrier in FIGS. 8A and 8B is a pn junction.

[Effect]

By adopting the above method, the resonance tunneling effect generated in the RHET, which is an active element, can cause two stable states to appear at its base, and these two stable states can be changed from the base side or the collector side. Arbitrary transitions can be made using signals, and if this is used to configure a semiconductor memory device, the number of cells in a flip-flop, which conventionally consisted of at least two transistors, can be reduced to half, that is, one. This can be realized only by using transistors, and its operation is stable.

〔Example〕

FIG. 5 shows a main circuit diagram for explaining an embodiment in which a signal is input to the connection point Nl and a signal is output from the connection point N2, and the same symbols as those used in FIG. 1 refer to the same parts. or have the same meaning.

In the figure, MC is a unit memory circuit (memory cell), Q
S is a switching element, CC is a coupling capacitor, WL is a word line, BLW is a write bit line, BL
R indicates the read pitch H, 51, respectively.

In this embodiment, the word IWL is at the 'L' level,
That is, when no address signal is applied, switching element QS is off, and active element QR is in either stable point A or B.

Further, when the word line WL is temporarily at the "H" level, that is, when an address signal is applied, the switching element QS changes from the off state to the on state and then to the off state again, and at this time, the write bit line BLW goes to "H" level. level, the operating point of the active element QR transitions to the stable point B or remains at the stable point B.Furthermore, as above, when the address signal is applied to the word line WL, the switching element Assume that QS goes from off state to on state and then goes back to auto state, and at that time, write bit line BLW goes low.
``level, the operating point of the active element QR remains at the stable point A, or transitions from the stable point B to the stable point A.

As can be seen from the above description, the active element QR can take one of the two stable points A and B depending on the on/off state of the switching element QS and the level of the write bit line BLW. .

Since the operation described above is possible, writing is
This is executed by setting the word line WL connected to a specific memory cell and the read bit vABLR to "H" level, and then setting the write bit line BLW to "H" level or "L" level. Also, for reading, the word line WL is set to "H" level, the switching element QS is turned on, and the level of the write bit line BLW is set to the active element Q.
It is sufficient to change the operating point of R within a range that does not cause a transition, and read the potential change at the collector of the active element QR, that is, the connection point N2, through the coupling capacitor CC and the read bit vABLR. Note that the coupling capacitor CC in the embodiment shown in FIG. 5 is changed to a transistor, and its on/off control is controlled by the word line
It can also be performed at the L level, but even in that case, only one memory transistor is sufficient, so it can be configured with a smaller number of active elements than in the past.

Figure 6 shows that a signal is input to the connection point N2 and the signal is input to the connection point N2.
This is a circuit diagram of a main part for explaining an embodiment in which a signal is output from a circuit, and the same symbols as those used in FIGS. 1 and 5 indicate the same parts or have the same meanings. Note that BL indicates a bit line.

In this embodiment, no signal is input to the base of the active element QR, and the switching element QS connects the collector to the bit line BL.
The base of the switching element QS is controlled by the address signal of the word line WL.

FIG. 7 shows a timing chart of the potentials at the bit line BL, word line WL, and connection point N2 shown in FIG. 6, and the same symbols as those used in FIG. 6 refer to the same parts. or have the same meaning.

The data shown in FIG. 7 is obtained by giving constants as shown in the following example to the various elements in the embodiment shown in FIG. This was obtained through observation.

RB: 1.5 (KΩ) RC: 10 (KΩ) Vcc+: 1 (V) VCC2: 1 (V) In Figure 7, time t is plotted on the horizontal axis and voltage ■ is plotted on the vertical axis. Yes, at time ■, 0.5 (V) for human cotton BL and 1.0 for word'!fAWL.
(V) is applied to turn on the switching element QS, and the potential at the connection point N2 becomes 0.4 [
V), and the collector-emitter voltage VCE is greatly swung to the positive side.At time (3), the bit line BL is at 0 [V] and the word WL is at 1. O
(V) is applied and the switching element QS turns on, but since the i position of the bit cotton BL is 40 (V), the potential of the connection point N2 is about o,1 (V), Collector-emitter voltage ■. , is approximately 0 (V).

From the illustrated potential waveform, it can be seen that the active element QR is definitely performing a memory operation.

〔Effect of the invention〕

The flip-flop according to the present invention includes an active element in which carriers resonantly tunnel through a superlattice layer formed between an emitter layer and a base layer, and an active element inserted between the base and emitter of the active element. The active element is configured to include a current source and means for selectively applying a signal to the active element.

According to this configuration, the active element, which is a resonant tunneling transistor such as RHET or RBT, can realize two stable states at the base by its resonant tunneling effect, and these two stable states are at the base. It is possible to arbitrarily select either the signal from the side or the collector side, and even though it is configured using a small number of active elements, it can be used as a stable static memory cell, for example. It is effective for increasing the integration and speed of flip-flops.

[Brief explanation of drawings]

Fig. 1 is a main circuit diagram for explaining the principle of a flip-flop according to the present invention, and Fig. 2 (A) and CB) are idealized RHET base-emitter voltage ■□ and base current II+ and the base-emitter voltage V[l
A diagram showing the relationship between K and collector current Ic, Figure 3 (A
) and (B) are energy band diagrams for explaining the operation of the active element corresponding to FIG. 2, and FIG. 4 (A
) and (B) are energy band diagrams for explaining the operation of a flip-flop as a semiconductor memory device depending on the collector-emitter voltage VCE, and FIG. 5 is a main part of an embodiment of the present invention. Circuit diagram, FIG. 6 is a main part circuit diagram of another embodiment 1. FIG. 7 is a timing chart for explaining the memory operation of a semiconductor storage device, and FIG. 8 (
A) and (B) are main part cutaway side views and energy band diagrams for explaining RHET, Figure 9 (A)
to (C) are energy band diagrams for explaining the operating principle of the RHET, and FIG. 10 is a diagram for explaining the relationship between the base-emitter voltage ■ and the emitter current IE in the RHET. FIG. 11 shows main part circuit diagrams illustrating a circuit using a negative resistance diode. In the figure, QR is an active element which is RHET, QS is a switching element, RC is a load resistance, RB is a current source resistance,
WL is a word line, BL is a bit line, BLW is a write bit line, BLR is a read bit line, N1 and N2 are contact points, ■60. and VCC2 respectively indicate the positive power supply level. Patent Applicant Fujitsu Ltd. Representative Patent Attorney Akira Aitani Representative Patent Attorney Hiroshi Watanabe - Figure 3 Main part circuit diagram for explaining the embodiment Figure 5 Essential part for explaining the embodiment of the present invention Circuit diagram Fig. 6 Fig. 7 ψ ψ kukux〒 Energy band tire crumm to explain the operation of RHET Fig. 9 Ic (mA) Fig. 11

Claims (1)

[Claims] It has an emitter-side potential barrier layer made of a superlattice layer formed between an emitter layer and a base layer, and a collector-side potential barrier layer formed between a base layer and a collector layer. a current source connected between the base and emitter of the active element to cause the base of the active element to assume two stable states; A flip-flop comprising a resonant tunneling transistor, characterized in that the flip-flop comprises means for selectively applying a signal to cause the resonant tunneling transistor to be picked up.