JPS62180643A - Pulse transmission system - Google Patents

Pulse transmission system

Info

Publication number
JPS62180643A
JPS62180643A JP61021902A JP2190286A JPS62180643A JP S62180643 A JPS62180643 A JP S62180643A JP 61021902 A JP61021902 A JP 61021902A JP 2190286 A JP2190286 A JP 2190286A JP S62180643 A JPS62180643 A JP S62180643A
Authority
JP
Japan
Prior art keywords
signal
transmission
vref
potential
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61021902A
Other languages
Japanese (ja)
Other versions
JPH07118725B2 (en
Inventor
Takashi Matsumoto
隆 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP61021902A priority Critical patent/JPH07118725B2/en
Publication of JPS62180643A publication Critical patent/JPS62180643A/en
Publication of JPH07118725B2 publication Critical patent/JPH07118725B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the change in delay time and the deterioration in noise margin due to ground potential difference between the sending side and receiving side at pulse signal transmission by generating both a signal pulse and its comparison potential at the transmission side and sending them to the reception side. CONSTITUTION:A pulse signal is sent in the order of points A, B and C through a unipolar amplifier of an ECL circuit both for transmission and reception. In the transmission, a comparison potential Vref is sent with respect to a ground in addition to the pulse signal. The sent pulse signal and the potential Vref are terminated by a resistor RT. As the resistor RT, a resistor having the same resistance as the impedance of the transmission line is used. The ECL circuit is a circuit switched depending on whether the potential of an input signal is higher or lower then the level of the signal Vref and the reference in considering the delay time is a point of time when the signal passes through the level Vref. Since the signal Vref being the reference of the delay time is sent by the same condition as the signal, the effect of ground potential difference between the transmission and reception is not given and since a common mode noise is given to the same condition between the signal and the level Vref, the effect of improving the noise margin is given.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明ばECL 、CML回路でのパルス伝送10に好
適なパルス伝送方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a pulse transmission system suitable for pulse transmission 10 in ECL and CML circuits.

〔発明の背景〕[Background of the invention]

従来□のECL 、CML回路のパルス伝送は、゛グラ
シトと共にパルス信号の、みを伝送していた6しかし、
送信、受信側のグラシト電位に差が15ある場合、この
電位の分、信号比較電位が変化。
Conventionally, the pulse transmission of ECL and CML circuits transmitted only the pulse signal along with the graphite.6 However,
If there is a difference of 15 in the graphite potential between the transmitting and receiving sides, the signal comparison potential changes by this potential.

したことになり、第3図に示すように、受信側。As shown in Figure 3, the receiving side.

が信号変化(’H’レベル→%L#レベル、1L#し。The signal changes ('H' level → %L# level, 1L#.

ベル→蟻Hlレベル)を検出する時刻が変わる。。The time to detect the bell→ant Hl level) changes. .

これは送信側からの遅延時間が変化するどい520こと
である。
This is because the delay time from the sending side changes 520.

第3図で信号はA点、B点、0点の順に伝送゛され、0
点の波形は送栖、受信側めグランド電。
In Figure 3, the signal is transmitted in the order of point A, point B, and point 0.
The waveform at the point is the ground voltage on the sending and receiving side.

位差ΔVが0〔v〕のときCとな:す、×〔v〕のと。When the potential difference ΔV is 0 [v], let it be C: x [v].

きCxとなる。このときB点の橋号変化時間と゛比較電
位の差(X (V:] )’から 時間差△tpdが生
becomes Cx. At this time, a time difference △tpd is generated from the bridge number change time at point B and the comparison potential difference (X (V:))'.

する。つまり比較電位が正常時(ΔV=O(Vl ) 
do. In other words, when the comparison potential is normal (ΔV=O(Vl)
.

の遅延時間tpdからΔtpdだけ遅延時間が変化。The delay time changes by Δtpd from the delay time tpd.

したことになる。That's what I did.

これは特に同種のi号を4数あ受信点へ伝送10する場
合、各受信点の間で□信号受信時間差が生。
This is especially true when transmitting the same type of signal to four receiving points, there will be a difference in signal reception time between each receiving point.

することになり問題と々る。I have to do this, and there are a lot of problems.

また比較電位が変化しン外、伝送系のノイズ。Also, the comparison potential changes, which causes noise in the transmission system.

マージンを低下させたこパーな6曲題であったらこの対
策として従来は、′第4図に示すように15送信側の両
極出力とブラシl−”の3本を伝送して・いた。しかし
、伝送したー檜号の辷倍の信号線。
Conventionally, as a countermeasure for six small songs with lower margins, three lines were transmitted: the bipolar output of the 15 transmitter and the brush l-'' as shown in Figure 4. The signal line of Hinoki was transmitted.

数が必要なため、伝送する信号数が多くなると・実現す
るのが困難であった。 ′ なお、従来の伝送に関するものは例えば1977nフェ
アチャイルドカメラ アンド インスツルメント コー
ポレーション イージーエル デ。
This is difficult to achieve when the number of signals to be transmitted increases. ' For example, regarding conventional transmission, see 1977n Fairchild Camera and Instrument Corporation E.L.D.

−タ プクク5−21 ノイズ5−22 (1977’
Fairchild Camera and Inst
rument CorporationECL  DA
TA  BOOK5−21  Ftg5”−22)が挙
げられる。
-Ta Pukuku 5-21 Noise 5-22 (1977'
Fairchild Camera and Instrument
rument CorporationECL DA
TA BOOK5-21 Ftg5''-22).

〔発明の目的〕[Purpose of the invention]

本発明の目的は、パルス信号伝送時の送信側、。 An object of the present invention is to provide a transmission side during pulse signal transmission.

受信側のグランド電位差によれ遅延時間の変化、゛ノイ
ズマージンの低下を防ぐパルス伝送方式を10提供する
ことにある。
It is an object of the present invention to provide a pulse transmission system 10 that prevents changes in delay time and reduction in noise margin due to ground potential differences on the receiving side.

〔発明の概要〕[Summary of the invention]

本発明は従来の問題点であるグランド電位差゛により、
受信側の比較電位が変化するとv5の゛は信号パルス作
成時の基準点(送信側グランド15)と、比較電位の基
準点(受信側グランド)が・異なることが原因であるこ
とに着目し、受信側・の比較電位の基準を送信側の基準
と同じにする。
The present invention solves the problem of the conventional problem of ground potential difference.
Focusing on the fact that when the comparison potential on the receiving side changes, the cause of v5 is that the reference point when creating the signal pulse (transmitting side ground 15) and the reference point for the comparison potential (receiving side ground) are different. Make the reference potential reference on the receiving side the same as the reference on the transmitting side.

つ棟り送受信とも同じ基準電位に対し、信号を・作り比
較電圧を作ることでグランド電位差の影20.6+ 響をなくすことが可能となる。
It is possible to eliminate the effects of ground potential differences by creating signals and comparing voltages with respect to the same reference potential for both transmission and reception.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一実施例を第1図、第2図により説明す
る。
An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

第1図は従来例を示す第3図に対する図で、信号作成の
基準電源Vrefが送信側のみで、受゛信側は送信側の
Vrefを使用している点が異なるg第2図は第1図を
実際の回路で記述したもの。
Fig. 1 is a diagram corresponding to Fig. 3 showing a conventional example, and the difference is that the reference power supply Vref for signal generation is only on the transmitting side, and the receiving side uses Vref of the transmitting side. Figure 1 is described using an actual circuit.

である。It is.

本実施例は、送信受信ともECL回路の同極10性アン
プで、パルス信号はA点、B点、0点の順で伝送される
In this embodiment, both transmission and reception are performed using homopolar 10-polarity amplifiers of ECL circuits, and pulse signals are transmitted in the order of A point, B point, and 0 point.

伝送はパルス信号の他に比較電位Vrefとグラ。In addition to the pulse signal, the transmission uses the comparison potential Vref and graph.

ンドを行う。perform the command.

伝送されるパルス信号と、Vrefは受信側でRTIF
The transmitted pulse signal and Vref are RTIF on the receiving side.
.

により終端される。このRTは伝送線のインピーダンス
と同じ値の抵抗を使用する。
terminated by This RT uses a resistor with the same value as the impedance of the transmission line.

ECL回路は、公知の如(vrefに対し入力信。The ECL circuit uses a known method (input signal for vref).

号の電位が高電位か低電位かによりスイッチす・る回路
であり、遅延時間を考える場合の基準は8・()、4 
It is a circuit that switches depending on whether the potential of the signal is high or low, and when considering the delay time, the criteria are 8・(), 4
.

Vrefを信号が通過した時点である。This is the time when the signal passes through Vref.

本実施例ではこの遅延時間の基準となるVref’が信
号と同じ条件で伝送されるため、送受信間゛のグランド
電位差の影響を受けず、またコモン。
In this embodiment, Vref', which is the reference for this delay time, is transmitted under the same conditions as the signal, so it is not affected by the ground potential difference between transmitting and receiving, and is common.

モードノイズに対しても信号とVrefに同じ条件5で
ノイズが乗ることに々るため、ノイズマージ。
For mode noise, noise often appears on the signal and Vref under the same condition 5, so noise merge is performed.

ンを応げる効果がある。It has the effect of responding to people's needs.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、伝送系でのグランド電位差゛が遅延時
間に与える影響を無視でき、またコモ10ンモードノイ
ズに対するノイズマージンを広げ。
According to the present invention, the influence of the ground potential difference in the transmission system on the delay time can be ignored, and the noise margin against common mode noise can be widened.

ることか可能なため、ノイズマージンの広い高゛精度な
信号伝送が行える。
This allows highly accurate signal transmission with a wide noise margin.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の伝送概念図、第152図は
同じ〈実施例の回路図、第5図は従来の伝送概念図、第
4図は従来の両極性伝送図であ。 る。
FIG. 1 is a transmission conceptual diagram of an embodiment of the present invention, FIG. 152 is a circuit diagram of the same embodiment, FIG. 5 is a conventional transmission conceptual diagram, and FIG. 4 is a conventional bipolar transmission diagram. Ru.

Claims (1)

【特許請求の範囲】[Claims] 1、パルス伝送を行う場合において、送信側で信号パル
スと、その比較電位の両方を作成し、共に受信側へ伝送
することを特徴とするパルス伝送方式。
1. When performing pulse transmission, a pulse transmission method is characterized in that both a signal pulse and its comparison potential are created on the transmitting side, and both are transmitted to the receiving side.
JP61021902A 1986-02-05 1986-02-05 Pulse transmission method Expired - Lifetime JPH07118725B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61021902A JPH07118725B2 (en) 1986-02-05 1986-02-05 Pulse transmission method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61021902A JPH07118725B2 (en) 1986-02-05 1986-02-05 Pulse transmission method

Publications (2)

Publication Number Publication Date
JPS62180643A true JPS62180643A (en) 1987-08-07
JPH07118725B2 JPH07118725B2 (en) 1995-12-18

Family

ID=12068036

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61021902A Expired - Lifetime JPH07118725B2 (en) 1986-02-05 1986-02-05 Pulse transmission method

Country Status (1)

Country Link
JP (1) JPH07118725B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996031038A1 (en) * 1995-03-24 1996-10-03 Hitachi, Ltd. Data transmitting method and transmission/reception circuit used therefor, and signal processor
US5856750A (en) * 1996-02-28 1999-01-05 Nec Corporation Interface circuit having receiving side circuit for controlling logical threshold values
JP2001007865A (en) * 1999-04-21 2001-01-12 Matsushita Electric Ind Co Ltd Signal transmitter-receiver

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5068408A (en) * 1973-10-18 1975-06-07

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5068408A (en) * 1973-10-18 1975-06-07

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996031038A1 (en) * 1995-03-24 1996-10-03 Hitachi, Ltd. Data transmitting method and transmission/reception circuit used therefor, and signal processor
US5856750A (en) * 1996-02-28 1999-01-05 Nec Corporation Interface circuit having receiving side circuit for controlling logical threshold values
JP2001007865A (en) * 1999-04-21 2001-01-12 Matsushita Electric Ind Co Ltd Signal transmitter-receiver

Also Published As

Publication number Publication date
JPH07118725B2 (en) 1995-12-18

Similar Documents

Publication Publication Date Title
EP0515097A1 (en) Bus transceiver
US4490673A (en) Testing an integrated circuit containing a tristate driver and a control signal generating network therefor
EP0334545A2 (en) Single-level multiplexer
JPS62180643A (en) Pulse transmission system
US4507621A (en) Generating quasi-random sequences in AMI code
US3440440A (en) Input-output circuit
US4879661A (en) Bi-directional circuit to interface between a low current device and high current tester
JPH10233810A (en) Differential input/output transmitter and its method
US3983324A (en) Full duplex driver/receiver
JPS599473Y2 (en) Balanced DC bus circuit
JPH0441531B2 (en)
JPS6022541B2 (en) balanced receiver circuit
JPS59131227A (en) Logical signal converting circuit
JP3116706B2 (en) Trigger input circuit
KR950002089B1 (en) Electronic circuit and a/d convertor therewith
JP2773171B2 (en) Bipolar signal monitor circuit
JPH04334120A (en) Ecl output circuit
JPS6175619A (en) Ecl circuit
JP2708497B2 (en) Misplacement detection device for electrical components
JPH0435215A (en) Latch unit
JPH0136291B2 (en)
JPH0818583A (en) Transmission line termination method
SU1152081A1 (en) Device for matching logic elements with delay line
JPS58205357A (en) Line driving circuit
SU1141563A1 (en) Differential current amplifier