JPS6218047A - Chip carrier - Google Patents

Abstract

PURPOSE:To enhance integrity of semiconductor integrated circuit so as to fully drawn out its performance, by making an alumina substrate of a chip carrier 30-100mum in thickness. CONSTITUTION:An alumina substrate1, thin and controlled with superior precision, is made 30-100mum in thickness by the method, in which aluminum alkoxide is formed by reaction of aluminum to alcohol, and boehmite AlOOH is made in a green sheet, and then fired. Successively, metallic films 4 and 5 made of titanium-palladium-gold are formed on the front and back surfaces of the alumina substrate. And, semiconductor integrated circuit 6 is fixed on a chip carrier by the use of silver paste, solder, or the like. Besides, wiring connection is performed by thermal press method.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a chip carrier for semiconductor integrated circuits, and is particularly suitable for assembling or mounting semiconductor integrated circuits for high speeds of Gbit/s or higher or high frequencies of GHz or higher. Concerning chip carriers ◎ [Prior art] Efforts to increase the speed and integration of semiconductor integrated circuits have continued since their invention. Silicon (hereinafter referred to as Si) has been used as a semiconductor in conventional semiconductor integrated circuits, but gallium arsenide (hereinafter referred to as GaAs) has been used as a semiconductor that can achieve even higher speeds than silicon. Semiconductor integrated circuits using compound semiconductors are being developed by various institutions around the world, and semiconductor integrated circuits that can be used at high speeds of 78 Gbit or higher or in high frequency bands of G& or higher are now being realized.

Conventional semiconductor integrated circuits are used in low-speed or low-frequency bands, so when it comes to mounting them, there is no need to pay special attention to the circuit whose signal level and power supply voltage match those of the surrounding electrical circuits. Performance can be fully demonstrated.

[Problem that the invention seeks to solve]

However, in high-speed or high-frequency semiconductor integrated circuits, if the impedance matching with one peripheral electric circuit is not sufficient, the signal will not enter the semiconductor integrated circuit properly, and the performance of the semiconductor integrated circuit may deteriorate or it may not function. can occur.

In general, packages mainly made of ceramic or resin, etc. are used as a method for connecting with peripheral electrical circuits.
Alternatively, a chip carrier in which metal wiring is provided on a ceramic plate has been conventionally used. However, when conventional packages are used in high-speed or high-frequency semiconductor integrated circuits, the parasitic inductance of the package,
Due to parasitic capacitance, it may occur that the performance it has is degraded. Furthermore, when conventional chip carriers are used, it is often difficult to match the impedances between the metal wiring provided on the chip carrier and the semiconductor integrated circuit, which can also reduce the performance of the chip carrier. It could have happened. Furthermore, since semiconductor integrated circuits generally have a large number of Confucian terminals and power supply terminals, when the impedance of the metal wiring of the chip carrier is matched to the impedance of the peripheral electric circuit, in general, with conventional ceramic chip carriers,
Since the minimum thickness is about 0.245 mm, when trying to connect to the terminals of a semiconductor integrated circuit, the spacing between the metal wiring on the chip carrier inevitably becomes narrower than the width of the metal wiring. This increases the capacitive coupling between the two, leading to malfunction of the semiconductor integrated circuit.

The present invention aims to eliminate such drawbacks and provide a chip carrier capable of fully demonstrating the performance of a high-speed or high-frequency integrated circuit, and particularly relates to its structure.

[Means for solving problems]

The present invention is characterized in that, in a chip carrier for a semiconductor integrated circuit, an alumina substrate (purity of 901% or more) with a thickness of 30 μm to 100 μm is used, and a metal film formed on the surface of the alumina substrate and a In addition, at least 10,000 ends of the metal film wiring formed on the surface of the alumina substrate are provided with a metal 7i thicker than the thickness of the metal film wiring. ! In addition, the impedance of the metal wiring formed on the surface of the alumina substrate is approximately 50Ω or 75Ω, and the impedance of the metal wiring formed on the surface of the alumina substrate is approximately 50Ω or 75Ω.

〔Example〕

Next, the present invention will be explained with reference to the drawings. FIG. 1 is a plan view of an embodiment of the present invention. In FIG. 1, l is an alumina substrate, 2 is a metal wiring, 3 is a gold plating layer formed on the metal wiring 2, and 4 is a gold plated layer formed on the back side of the alumina substrate. A film 5 is a metal film on which the entire semiconductor integrated circuit is mounted.Metal wiring 2 is formed on the back surface of the alumina substrate 1.
The width of the metal wiring is determined based on the thickness of the alumina substrate 1 and the dielectric constant t parameter so that the characteristic impedance of the metal film serving as a ground conductor and the peripheral electric circuit is 50Ω or 75Ω. Generally, when an alumina substrate with a purity of 90 or higher is used, the width of the friend metal wiring 2 that achieves a characteristic impedance of 50Ω is the same as the thickness of the alumina substrate l described above. On the other hand, as the degree of integration of the semiconductor integrated circuit mounted on the metal film 5 increases, the size of the metal pads that serve as terminals and the spacing between the metal pads will increase as the degree of integration increases. become smaller and narrower. Currently, the general Vck'i, the size of the metal pad, and the spacing between them are approximately fL10Qμme+ and 100/Jm, respectively. The pitch of the semiconductor integrated circuit ends of the upper metal wiring must be 200 μm. Therefore, the upper limit of the width of the metal wiring is 200 μm.
On the other hand, crosstalk between metal wirings, which causes noise for the operation of a semiconductor integrated circuit, increases as the spacing between metal wirings becomes narrower, and at high speeds of Gbit/8 or more or GHz or more.

In high-frequency semiconductor integrated circuits, the spacing between metal wires must be at least twice the width of the metal wires, if possible. Therefore, in order to provide metal wiring having an innovative resistance of 50 Ω to each of the metal pads of an integrated circuit, the thickness of the alumina substrate is required to be 100 μm or less, and the accuracy thereof is also required. It is difficult to produce alumina substrates that are thin and whose thickness is precisely controlled using conventional methods such as dry press, hot press, or tape methods, but for example, aluminum alkoxide can be produced by reflecting aluminum and alcohol. After making and hydrolyzing to make boehmite AloOH'i, cream
How to sheet and bake? 30-1 depending on the number used
00 μm thick alumina substrate can be made with good reproducibility.

Next, a metal #' of titanium-palladium-gold, for example, is applied to the front, 2, and back surfaces of this alumina substrate by sputtering, for example. to form. Furthermore, if necessary, gold can be deposited thickly on the ends of the metal wiring in FIG. 1 by gold plating.

Next, a part of the metal layer deposited on the surface of the alumina substrate is completely removed using a conventional photolithography method, and a metal film for mounting metal wiring, a capacitor, and a semiconductor integrated circuit is formed. If necessary, a thin film resistor may be formed on the surface of the all-alumina substrate.

FIG. 2ii shows a semiconductor integrated circuit mounted on the chip carrier f'L shown in FIG. In Figure 2,
l is alumina substrate, 2Fi metal wiring, 3 is gold plating layer,
4 is a metal film formed on the back surface of the alumina substrate and a metal film constituting a capacitor; 5 is a metal film on which a semiconductor integrated circuit is to be mounted; 6 is a semiconductor integrated circuit; 7 is a metal pad of the semiconductor integrated circuit and metal wiring 2 Alternatively, a connection such as a gold wire, etc., can be used to electrically connect the capacitor. The semiconductor integrated circuit can be fixed to the chip carrier 1C using, for example, silver paste or solder, and connections can be made by thermopressure layering.

〔Effect of the invention〕

As explained above, by setting the total thickness of the alumina substrate of the chip carrier to 30 to 100 μIn, the degree of integration of the semiconductor integrated circuit increases, and even if the number of terminals of the metal pads disposed around the circuit increases, the surrounding d-circuit Since the spacing between all electrode wires on the alumina substrate to be connected to the metal wire can be completely reduced, the crosstalk between the metal wires can be completely ignored.
The key is to bring out the full performance of semiconductor integrated circuits.

When using an alumina substrate with a thickness of 30 μm or less,
As the width of the metal paulownia wiring becomes narrower, the wiring resistance increases, which increases the possibility that the performance of the semiconductor integrated circuit will be adversely affected.

In addition, since the alumina substrate is thin, it is possible to form a capacitor with a large capacitance value, and by inserting this capacitor between the power line and ground, surges and noise entering the semiconductor integrated circuit on the power line can be can be absorbed.

Furthermore, since the alumina substrate is thin, the thermal resistance of the chip carrier can be kept low, making it possible to further improve the reliability and life of the semiconductor integrated circuit.

For example, if the substrate of a semiconductor integrated circuit is
In the case of compound semiconductors such as
However, as shown in Fig. 1, by providing gold plating W1 at the end of the metal wiring, this chip carrier can be used to create a Tape Automated Board.
ing method can be applied.

Further, a metal plate or an insulating plate can be attached to the back surface of the chip carrier of the present invention to make it easier to handle and also serve as a heat sink, making the chip carrier easier to handle.

[Brief explanation of drawings]

FIG. 1 is a plan view of a chip carrier of the present invention, and FIG. 2 is a plan view of a semiconductor integrated circuit mounted on the chip carrier. 1...Alumina substrate, 2...Metal wiring, 3...Gold plating layer, 4, 5...Metal film, 6...Semiconductor Integrated circuit, 7...connection, finish.

Claims (5)

[Claims] (1) Alumina substrate with a thickness of 30 μm to 100 μm (
A chip carrier for semiconductor integrated circuits, characterized in that a chip carrier with a purity of 90% or more is used. (2) The chip carrier for a semiconductor integrated circuit according to claim 1, wherein the capacitance between the metal film formed on the front surface and the metal film formed on the back surface is provided as a capacitor. (3) A chip for a semiconductor integrated circuit according to claim 1 or 2, comprising a metal layer thicker than the thickness of the metal film wiring on at least one end of the metal film wiring formed on the surface. career. (4) The impedance of the metal wiring formed on the surface is
Claim 1 which is approximately 50Ω or 75Ω
A chip carrier for a semiconductor integrated circuit according to items 1, 2, and 3. (5) A chip carrier for a semiconductor integrated circuit according to claims 1, 2, 3, and 4, characterized in that a metal plate or an insulator plate is attached to the back surface.