JPS6135703B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention is a high-density LSI (Large Scale
Integration) Regarding packages.

In recent years, demands for higher performance and smaller computers have been increasing, and for this reason, the LSI chips that make up the main part of the hardware, and the LSI packages that carry them, must also have a structure that satisfies the requirements of high speed and high density. It has come to be that way.

On the other hand, in order to increase the speed of the chip itself and to transmit signals between chips at high speed, LSI chips with emitter follower type output circuits that are capable of driving high speeds and high loads are being used.

In the example of the prior art, the speed of the IC chip itself is also relatively slow compared to the current one, so
Since the signal propagation circuit using the signal wiring inside the LSI package can be regarded as a lumped constant circuit, the method of terminating the signal waveform is not required to be exact; for example,
It was also possible to use a semiconductor resistor formed within an IC chip with poor resistance accuracy.

However, as mentioned above, recently ultra-high-speed
As LSI chips were developed and emitter follower output circuits began to handle extremely high-speed pulses in signal waveforms, the signal wiring inside LSI packages no longer had to be treated as distributed constant circuits, and therefore the signal waveform In addition to requiring accurate termination for signal wiring, efforts must be made to minimize signal wiring length and mount LSI chips as close as possible in order to reduce signal wiring delays.

For this reason, LSI packages are required to mount the LSI chips in a high density, accommodate high-density wiring, and efficiently dissipate the heat generated from the LSI chips. There is a need to accommodate high precision termination resistors for accurate termination of signal wiring.

The object of the present invention is to mount it on a ceramic substrate.
The object of the present invention is to provide a multi-chip LSI package that can realize high-speed signal propagation between IC chips and can simultaneously mount IC chips at high density.

In order to achieve the above object, the multi-chip LSI package according to the present invention has a termination resistor and a through-hole pad on the surface of the substrate, has input/output terminals on the back surface of the substrate, and has a multilayer power supply wiring layer and a through-hole pad on the inner layer. a laminated multilayer ceramic substrate having a through hole connecting the through hole pad and the input/output terminal; a multilayer wiring layer formed to cover the termination resistor and the through hole pad on the surface of the ceramic substrate; It is composed of a plurality of IC chip carriers arranged on the multilayer wiring layer.

Hereinafter, the present invention will be explained in more detail with reference to the drawings.

FIG. 1 is a cross-sectional view of a multi-chip LSI package according to an embodiment of the present invention.

In Figure 1, 1 is an LSI chip, 2 is a chip carrier, 3 is a heat sink, 4 is a chip carrier connection pad, 5 is a multilayer wiring layer, 6 is a multilayer wiring layer, 7
1 is a through-hole pad, 8 is a terminating resistor, 9 is a multilayer ceramic substrate, 10 is a multilayer power supply wiring, 11 is an input/output terminal, and 12 is a through hole.

FIG. 2 is a plan view of a multi-chip LSI package according to the present invention, and FIG. 3 is a plan view of a multi-chip LSI package according to the present invention.
FIG.

In FIG. 1, a multilayer ceramic substrate 9 includes multilayer power supply wiring 10 and through holes 12 therein. Such a ceramic substrate can be easily realized with current technology as a laminated multilayer ceramic substrate by the well-known green sheet lamination method. On the surface of the substrate 9, as shown in FIG. 3, a through-hole pad 7 connected to the through-hole 12 and a terminating resistor 8 are formed.

The terminating resistor 8 is formed on the surface of the substrate 9 by printing and baking, for example, using a well-known thick film resistor paste that can be baked in a neutral atmosphere. The through-hole pads 7 are made by printing and firing the metal material paste (tungsten or molybdenum) used when manufacturing the substrate 9, and gold plating is applied thereon to provide chemical protection and low contact resistance. It is something.

Further, an input terminal 11 is constructed on the back surface of the board 9. In this embodiment, the terminal 11 is a pin that is brazed with silver brazing material or the like so as to be electrically connected to the through hole 12.

The multilayer wiring layer 5 is formed on the surface of the multilayer ceramic substrate 9 so as to cover the termination resistor 8 and the through hole pad 7, and the multilayer wiring 6 is housed inside.

The multilayer wiring 6 is connected between the signal terminals of each LSI chip 1, and between the terminals of each LSI chip 1 and the input/output terminal 11.
It is a wiring pattern that runs vertically, horizontally, up and down inside the multilayer wiring layer, and is used to conduct and connect between the signal terminal of each LSI chip 1 and the terminating resistor 8.

In order to form the multilayer wiring layer 5, for example, a base metal is deposited on an organic insulating film such as polyimide by sputtering, a photoresist is coated on this metal film, a wiring pattern is exposed and developed, and unnecessary parts are removed by etching. The process of removing the metal film and then plating the wiring pattern with a good conductor such as copper may be repeated.

The chip carrier 2 is connected to a chip carrier connection pad 4 provided on the surface of the multilayer wiring layer 5. The terminals of the chip carrier 2 and the chip carrier connection pad 4 are constructed as shown in FIG.

The terminals of the LSI chip 1 are bonded inside the chip carrier 2 and are electrically connected to the terminals on the four sides of the chip carrier 2. By connecting the chip carrier 2 to the connection pads 4, for example, by soldering, the inside of the multilayer wiring layer 5 can be connected. A conductive connection with the multilayer wiring 6 is possible.

In addition, a heat sink 3 is connected to the surface of the chip carrier 2 that faces the mounting surface of the LSI chip 1.
Heat generated by the LSI chip 1 can be efficiently dissipated.

Since the multi-chip LSI package according to the present invention has the above-mentioned configuration, it has the following excellent features.

(1) Since the multilayer wiring layer provided in the inner layer of the multilayer ceramic substrate 9 is used as the power supply conductor wiring, it is possible to reduce the impedance of the power supply wiring and increase the speed by reducing power supply noise.

(2) At the same time, since there is no need for power supply wiring occupying a large area inside the multilayer wiring layer 5, high-density multilayer signal wiring becomes possible.

(3) In order to form the multilayer wiring layer 5 so as to cover the terminating resistor 8, the number of terminating resistors 8 is sufficient to cover the entire surface of the ceramic substrate 9 for the multilayer wiring 6;
They can be arranged in high density, and at the same time, signal lines can be completely terminated, making it possible to achieve high speeds.

(4) Since the connection from the multilayer wiring 6 to the input/output terminal 11 is made via the through-hole pad 7 and the through-hole 12 over the shortest distance, the wiring length from the terminal of the IC chip 1 to the input/output terminal 11 is It can be shortened and high speed can be achieved.

(5) Since the LSI chip 1 is mounted via the chip carrier 2, by attaching the heat sink 3 to the chip carrier 2, more efficient heat dissipation becomes possible, and therefore the number of mounted LSI chips related to heat generation limitation can be increased. This enables high-density packaging of LSI chips.

As explained in detail above, the present invention provides a terminating resistor 8.
A high-density, high-speed multi-chip LSI package is constructed by comprising a multilayer ceramic substrate 9 having through-hole pads 7 connected to input/output terminals 11, a multilayer wiring layer 5 built on the surface thereof, and a chip carrier 2. realizable.

[Brief explanation of the drawing]

1 to 3 are diagrams showing embodiments of the present invention. 1...LSI chip, 2...chip carrier, 5...multilayer wiring layer, 7...through hole pad, 8...terminal resistor, 9...multilayer ceramic board, 11...input/output terminal, 12...through hole.

Claims (1)

[Claims] 1 It has a terminating resistor and a through-hole pad on the surface of the board, has an input/output terminal on the backside of the board, and has a multilayer power supply wiring layer on the inner layer and a connection between the through-hole pad and the input/output terminal by penetrating the inner layer. a laminated multilayer ceramic substrate having through-holes; a multilayer wiring layer formed to cover the termination resistor and the through-hole pad on the surface of the ceramic substrate; and a plurality of wiring layers disposed on the multilayer wiring layer. I C
A multi-chip LSI package characterized by being configured with a chip carrier.