JPS62179675U - - Google Patents
Info
- Publication number
- JPS62179675U JPS62179675U JP6485386U JP6485386U JPS62179675U JP S62179675 U JPS62179675 U JP S62179675U JP 6485386 U JP6485386 U JP 6485386U JP 6485386 U JP6485386 U JP 6485386U JP S62179675 U JPS62179675 U JP S62179675U
- Authority
- JP
- Japan
- Prior art keywords
- opening
- circuit board
- ground terminal
- conductive material
- control terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims 1
- 230000003068 static effect Effects 0.000 claims 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
Description
第１図は本考案の一実施例のメモリカード２０
に装着される基板２１の斜視図、第２図はメモリ
カード２０の断面図、第３図はメモリカード２０
と外部装置２２のコネクタ２３との接合部分の断
面図、第４図はメモリカード２０の外部装置２２
との斜視図、第５図は従来技術のメモリカード１
に装着される基板２の斜視図、第６図はメモリカ
ード１の断面図、第７図は第２の従来技術の基板
２′の斜視図である。
２０……メモリカード、２１……基板、２４…
…ハウジング、２５……ＬＳＩ、２７……制御端
子、２７ａ……接地端子、２８……開口部、３０
……端面、３１……導電体。
FIG. 1 shows a memory card 20 according to an embodiment of the present invention.
2 is a sectional view of the memory card 20, and FIG. 3 is a perspective view of the board 21 attached to the memory card 20.
FIG.
FIG. 5 is a perspective view of a conventional memory card 1.
6 is a sectional view of the memory card 1, and FIG. 7 is a perspective view of a second prior art substrate 2'. 20... Memory card, 21... Board, 24...
...Housing, 25...LSI, 27...Control terminal, 27a...Grounding terminal, 28...Opening, 30
...End face, 31...Conductor.
Claims (1)
が装着された回路基板が収納され、この回路基板
の一表面であつて前記開口部近傍に、接地端子と
制御端子とが設けられ、回路基板外周面の少なく
とも前記開口部に臨む面には、ほぼ全面に亘つて
導電体が付着され、この導電体は前記接地端子と
電気的に接続されることを特徴とする外部記憶装
着の静電気吸収構造。 A circuit board on which electronic circuit elements are mounted is housed in a housing having an opening, and a ground terminal and a control terminal are provided on one surface of the circuit board near the opening, and a ground terminal and a control terminal are provided on one surface of the circuit board near the opening. A static electricity absorbing structure for an external storage device, characterized in that a conductive material is attached over almost the entire surface of at least the surface facing the opening, and the conductive material is electrically connected to the ground terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986064853U JPH0542533Y2 (en) | 1986-04-28 | 1986-04-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986064853U JPH0542533Y2 (en) | 1986-04-28 | 1986-04-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62179675U true JPS62179675U (en) | 1987-11-14 |
| JPH0542533Y2 JPH0542533Y2 (en) | 1993-10-26 |
Family
ID=30901389
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986064853U Expired - Lifetime JPH0542533Y2 (en) | 1986-04-28 | 1986-04-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0542533Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5816587A (en) * | 1981-06-08 | 1983-01-31 | 富士通株式会社 | Circuit device |
-
1986
- 1986-04-28 JP JP1986064853U patent/JPH0542533Y2/ja not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5816587A (en) * | 1981-06-08 | 1983-01-31 | 富士通株式会社 | Circuit device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0542533Y2 (en) | 1993-10-26 |
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