JPS6217900B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a local decoder used for decoding a code output during delta modulation coding or a decoder for decoding a transmitted delta modulation code.

Delta modulation or adaptive delta modulation is an encoding method that encodes the difference between an analog input signal and a locally decoded output into one bit. Conventionally, such delta modulation encoding has been performed as shown in FIG. That is, the difference between the analog input signal from the input terminal 11 and the decoded output from the local decoder 13 is calculated by the comparator 12, and the difference is 1
It is sent to the output terminal 14 as a bit encoded output, is decoded by the local decoder 13, and is sent to the comparator 12.
supplied to In the local decoder 13, the modulated output code is input to the logic operation circuit 15 that determines the step size, and the step size is output according to the input, and is integrated by the digital filter 16.The integrated output is converted into an analog signal by the DA converter 17. It was converted into a signal and used as a decoded output. When decoding the transmitted delta modulation code, the input terminal 1 is
The delta modulation code from 8 is supplied to the logic operation circuit 15, and the operation output is sent to the digital filter 16.
The integrated value is converted into an analog signal by the DA converter 17, and further sent to the output terminal 21 through the low-pass wave generator 19.

Conventionally, in order to perform code conversion with higher fidelity, the local decoder 13 monitors the pattern of the delta modulation code, that is, the generation state of 1s and 0s, and determines the step size according to the pattern. Was. Such processing is generally performed using logical operations based on digital processing. Digital processing is performed in this way, and the obtained step size is passed through the digital filter 16.
I was integrating with . For this reason, in the past, step size integration was performed by the digital filter 16 in both the local decoder and the receiving side decoder. The digital filter 16 requires a multiplier, and since the output of the digital filter 16 is integrated, the DA converter 17 needs to have a large dynamic range.
A converter is required. The need for a multiplier in this way increases the hardware configuration and the number of calculations, and the high bit number of the DA converter has the disadvantage of making the configuration complex and expensive.

This invention eliminates the need for digital multiplication by configuring the local decoder and the integral function part in the decoder with switched capacitor filters, and allows the use of a DA converter with a small dynamic range. That is, the object of the present invention is to provide a delta modulation code decoder that can reduce the number of bits of a DA converter.

FIG. 3 shows a case where the present invention is applied to a local decoder in an encoder, and parts corresponding to those in FIG. 1 are denoted by the same reference numerals. That is, the analog input signal of the input terminal 11 and the decoded output of the decoder 13 are input to the comparator 12, and a delta modulation code output is obtained from the comparator 12. The logic operation circuit 15 outputs the step size from the time series of the code output. This step size is converted into an analog signal by the DA converter 17, and the converted output is integrated by the switched capacitor filter 22. Since this integration operation is performed in an analog manner, an analog decoded signal is directly output from the filter 22. A switched capacitor filter includes an operational amplifier, a capacitive element, a switching element, etc., and has an integral function, and by combining various elements, various wave filters can be constructed.For example, the American magazine IEEE, Vol. 67, No. 1, Jal, 1979, P.
61, Robert W. Brodersen et al. “MOS Switched
Capacitor Filters”.

In an example in which the present invention is applied to a decoder that decodes a received delta modulation code, parts corresponding to those in FIGS. 2 and 3 are given the same reference numerals, and a description thereof will be omitted.

As described above, in this invention, integration is performed by the switched capacitor filter 22, and the internal calculations are performed in an analog manner, eliminating the need for a multiplier, and since DA conversion is performed before integration, the DA The DA converter 17 can be configured as a low bit converter since the conversion is also performed for the step size of the logic operation circuit 15 having a relatively small dynamic range. Therefore, the hardware scale can be reduced to that extent, making it suitable for LSI implementation.

As explained above, according to the present invention, by configuring the local decoder and the integral function part of the decoder using a switched capacitor filter, a multiplier is not required, and the DA converter can also be made low-bit. Therefore, it is possible to provide a delta code modulation decoder that has the advantage of reducing the circuit scale when implemented in hardware or LSI.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional delta modulation encoder, FIG. 2 is a block diagram showing a conventional delta modulation code decoder, and FIG. 3 is a block diagram showing an example of a delta modulation encoder embodying the present invention. 4 are block diagrams showing an example of a delta modulation code decoder to which the present invention is applied. 11...Analog input terminal, 12...Comparator, 13
...Local decoder, 14...Output terminal, 15...Logic operation circuit, 16...Digital filter, 17...DA converter, 19...Low pass wave generator, 22...Switched capacitance filter.

Claims (1)

[Claims] 1. A logic operation circuit that receives a delta modulation code and outputs a step size according to the delta modulation code through digital processing, and a DA conversion that converts the step size from the logic operation circuit into an analog signal. A delta modulation code decoder consists of a switched capacitor filter that integrates the analog signal from the DA converter and outputs a decoded output.