JPS62152223A - Da converter system - Google Patents

Abstract

PURPOSE:To reproduce an analog signal with a good S/N by converting a PCM signal to a pulse density modulating signal, removing the noise with an analog low-pass filter and converting the signal to the analog signal. CONSTITUTION:A PCM signal X is converted to a pulse density modulating signal Y by a pulse density modulator 1, by an analog low-pass filter 2, the noise is removed and a final analog signal Y' is obtained. The pulse density modulator 1 uses a noise correction to secure a high S/N. The pulse density modulation circuit 1 is constituted of memories 11 and 12 to execute the mere fetching of data by a clock phi, a positive negative deciding circuit 13 to decide the positive and negative of the input data and an adder 14. The pulse density modulator 1 having a noise correcting function can secure the sufficient S/N even when the output data are made into one bit, namely, a pulse density modulating signal.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention provides a D
The present invention relates to an A-converter system, and can be used in a voice band DA converter/stem such as a DA converter for digital audio and a DA converter for voice synthesis.

<Prior Art> Some conventional DA converter systems use a DA converter that directly converts a PCM signal into an analog signal.

<Problems to be Solved by the Invention> However, the conventional DA converter system described above has the following problems.

That is, in order to directly convert a PCM signal into an analog signal, it is necessary to create a highly accurate analog circuit, and when configuring a DA converter using a resistor ladder, trimming is required in order to perform highly accurate conversion. In addition, the dynamic element matching method (Japanese Patent Laid-Open No. 54-24
098), trimming is not necessary, but it is necessary to attach a large number of capacitors outside the DA converter. As described above, conventional DA converter systems are expensive. Also, since it is composed of analog circuits,
It is difficult to configure this on the same chip as the digital section for signal processing, and the DA converter is a separate chip.

Conventionally, a pulse width conversion method has been generally used as a D/A converter that can be configured with a digital circuit, but pulses with different widths have different frequency ranges and torques, and it is difficult to reproduce analog signals with pulses of different widths. , noise is generated due to differences in the spectrum of the pulses.

Therefore, an analog signal with a good S/N ratio cannot be obtained using the pulse width modulation method.

The present invention has been made in view of the above points, and provides a DA converter system that solves the problems of the conventional DA converter system.
It provides a converter system.

<Means to solve the problem> In a DA converter system that converts a digital signal to an analog signal, the PCM signal is converted to a pulse density modulation signal, noise is removed by an analog low-pass filter, and the analog signal is Convert to The modulation frequency of the pulse density modulator is higher than the sampling frequency of the input PCM signal, and noise correction (Noise sh
aping) to reduce noise. Additionally, adding an oversampling digital filter simplifies the analog low-pass filter for noise removal.

<Example> Hereinafter, the present invention will be described in detail based on an example. FIG. 1 is an overall diagram of a DA converter system according to the present invention.

PCM signal X is converted into pulse density modulated signal Y by pulse density modulator 1, and analog low-pass filter 2
By removing noise, a final analog signal Y' is obtained.

As shown in FIG. 1, the DA converter according to the present invention is composed of a pulse density modulator. The pulse density modulator is equipped with noise compensation to ensure a high signal-to-noise ratio.
Haping ) is used. Furthermore, the modulation frequency of pulse density modulation is selected as high as possible so that noise correction works effectively.

FIG. 2 is a block diagram of a pulse density modulation circuit using first-order noise correction.

In the figure, reference numerals 11 and 12 indicate memories that take in data using clock 2. Reference numeral 13 denotes a positive/negative determining circuit that determines whether input data is positive or negative and outputs only the positive or negative determination result. If the data is represented in two's complement or offset binary, the MSB (most significant bit)
It is possible to determine whether it is positive or negative by determining only this. 14 is an adder.

Further, in the figure, X is an input PCM signal, and Y is an output signal, which is a pulse density modulation signal. Let S be the data of the points shown on the diagram. X is quantized digital data.

In FIG. 2, the following equations [1] and (2+ hold true).

Here, Z = cosωT jsinωTω: angular velocity of input signal, T: clock period 12) N in equation 12) is s4
This is the noise generated as a result of using only the code, that is, quantizing to 1 bit, and is the difference between Y and S.

When S is eliminated from the above equation 11+, t2), Y=X
-N(1-Z) (31(3
), when ωT is small, that is, the input signal frequency is low or the clock period T is short, Z 2 takes a value close to 1. Therefore, it is 0 out of 1-Z. (3)
In the formula, when 1-Z is 0, Y:8:X. X is input data and has a bit length of 2 bits or more, while Y is 1 bit data. It can be seen that a pulse density modulator with a noise correction function can secure a sufficient S/N ratio even when the output data is a 1-bit pulse density modulation signal.

FIG. 3 shows the relationship between input X and output Y.

It can be seen that when the level of input data is high, the density of output pulses becomes high.

Noise correction has a greater effect of reducing noise components as the order increases.

FIGS. 4 and 5 show pulse density modulation circuits using second-order noise correction.

In FIGS. 4 and 5, X is an input PCM signal, and Y is an output signal, which is a pulse density modulation signal.

Further, Sl and S2 are data of points shown on the diagram, respectively.

In FIGS. 4 and 5, 21, 22, and 23 are memories that take in data according to the clock. 24 is a positive/negative determining circuit that determines whether input data is positive or negative and outputs only the determination result. 25°26 is an adder. Furthermore, in FIG. 5, 27 is a double circuit.

First, in FIG. 4, the following equation holds.

N in equation (6) is noise due to quantization, similar to equation (2) above.

+4), [51, +6+ By eliminating St and S2, Y=X −N (1−Z) (
7) In FIG. 5, the following formula holds.

N in Equation (10) is noise due to quantum failure, as in Equation (2) above.

From equations (8), (9), and (10), 81. When S2 is eliminated, Y=Z-'-X-N(1-Z)
(111(7), +111 and equation (3), as you can see, in equation (3) there is N(1-Z), but in equations (7) and (11) there is N(t-Z −
' ) 2 and 1-Z Ki 0, so
(7) , (In the case of formula 111, the noise component is /J
I can see that S becomes smaller.

Comparing Equation (7) and Equation (11), X in Equation (11) has a coefficient of Z-1, but this represents a delay by the period T of clock 2, and noise components and frequency characteristics has no effect at all. That is, the output Y is T with respect to the input
However, it does not affect the S/N ratio of the pulse density modulated output at all.

(31, (7+, (111, etc.)), the noise component is represented by N(1-Z). n represents the order of noise correction, and when n = 1, 1 When n = 2, it is quadratic; when n = 3, it is cubic.

The larger n is, the smaller the noise component is, but the more circuitry the pulse density modulator requires. When used as a DA converter, the most severe condition is when used in digital audio equipment, but if σ is 8 to 9 MH2, 90 dB within the audible frequency band of o to 20 KH2.
In order to achieve the above S/N ratio, it has been found through simulations that it is sufficient to use a second-order noise correction circuit. The circuit can realize a high-precision digital audio DA converter.

Next, the circuit of FIG. 4 and the circuit of FIG. 5 will be compared.

Comparing Fig. 4 and Fig. 5, Fig. 5 looks like a more complicated circuit, but in Fig. 4, the output of adder 25 is directly input to the input of adder 26, and the clock σ is It is necessary to perform the calculation of the adder 25 within the period T, input the result to the adder 26, and finish the calculation of the adder 26. If the clock frequency is 8~9MH2, the period T is 10
The value is about 0 nsec, and if the bit length of the input data X is long, it is necessary to use a high-speed adder in order to finish both additions of 25.26 within T. On the other hand, in FIG. 5, the memory 2
1, the adders 25 and 26 each need to complete one addition within T. Therefore, in the case of FIG. 5, a slower adder can be used than in the case of FIG.

FIG. 6(a) and FIG. 7(a) are diagrams showing the blade portion of the pulse density modulation circuit. FIG. 6(a) shows a circuit that outputs the pulse density modulation output as it is. The relationship between the pulse density modulation data Y and the output OUT in FIG. 6(a) is shown in FIG. 6(b). FIG. 7(a) shows a circuit that outputs pulse density modulation data as independent pulses. Pulse density modulation data Y and output OU in Figure 7(a)
The relationship between T is shown in FIG. 7(b). FIGS. 6(C) and 7(c) show the influence of the output rise and fall characteristics of the circuits shown in FIGS. 6(a) and 7(a). 6th
Figures (b) and 7 (b) are waveforms when the rise and fall times are set to zero, but in reality the rise and fall times are not zero, so the waveforms in Figure 6 (C) and The slope will be as shown in Figure 7(c). In the case of Fig. 6(c), ＼Hiki 1
There is a difference in the output power corresponding to N1 between the part where the output is continuous and the part where N1 is not continuous, and this difference causes noise. However, in the case of Figure 7(c), if the output power corresponding to the output is always constant and the rising and falling times are within a range that does not affect adjacent pulses, then the rising and falling Even if the time is not zero, it does not cause noise.

Comparing the circuit in Figure 6(a) and the circuit in Figure 7(a) in terms of output power, the output power of the circuit in Figure 6(a) is equal to the output power of the circuit in Figure 7(a). It will be twice as much.

Therefore, if the S/N ratio is important, the circuit shown in FIG. 7(a) may be used, and if power is required, the circuit shown in FIG. 6(a) may be used.

The pulse density modulated signal OUT becomes an analog signal simply by passing it through a low-pass filter.

As shown in FIG. 8, adding an oversampling digital filter 3 simplifies the analog low-pass filter 2 for noise removal.

As described above, the DA converter according to the present invention can be constructed from a completely digital circuit, and can be constructed on the same chip as the digital section for signal processing.

Since the output is a pulse, the output level can be High or Low.
It has two stages of OW, and element accuracy does not affect the accuracy of the DA converter unlike a DA converter using a resistance ladder. Further, unlike the pulse width modulation method, since the pulse width can be kept constant, it is possible to reproduce an analog signal with a good S/N ratio.

<Effects of the Invention> 1. High-precision DA converters currently use a bipolar process, and the DA converter is a single chip. Although the DA converter according to the present invention has high accuracy, it can also be configured with a digital circuit, so a MOS process can also be used02.Since the signal processing section is usually a digital circuit, the DA converter according to the present invention is the same as the signal processing section. It can be configured on a chip, making it possible to integrate the signal processing section and the DA converter into one chip.

[Brief explanation of drawings]

FIG. 1 is an overall diagram of a DA converter system according to the present invention. FIG. 2 is a block diagram of a pulse density modulation circuit using first-order correction. FIG. 3 is a diagram showing the relationship between input X and output Y in the circuit shown in FIG. 2 = p4. FIGS. 4 and 5 are block diagrams of a pulse density modulation circuit using second-order noise correction. FIG. 6(a) and FIG. 7(a) are diagrams showing the output section of the pulse density modulation circuit. Figure 6 (
b) and FIG. 7(b) show the pulse density modulation data Y and output O that can be refined in FIG. 6(a) and FIG. 7(b), respectively.
It is a figure showing the relationship of UT. Figures 6(c) and 7(
c) is a diagram showing the actual waveform of the output OUT in FIGS. 6(a) and 7(a), respectively. FIG. 8 is an overall diagram of another example of the DA converter system according to the present invention. Explanation of symbols 1: Pulse density modulator, 2: Analog low-pass filter, 3-niover sampling digital filter, X: PCM signal, Y: Pulse density modulation signal, Y'
: Analog signal. Agent Patent Attorney Aihiko Fukushi (and 2 others) Figure 1 Figure 2 Figure 4 Figure 6 Figure 6 (b) Figure 6 (C) Figure 7 m (0) Figure 7 I21 (b ) Figure 7 (c) Army Figure 8

Claims (1)

[Claims] 1. A DA converter system that converts a digital signal into an analog signal, which is characterized by converting a PCM signal into a pulse density modulation signal, removing noise with an analog low-pass filter, and converting it into an analog signal. DA converter system.