JPS62177128U - - Google Patents
Info
- Publication number
- JPS62177128U JPS62177128U JP6268886U JP6268886U JPS62177128U JP S62177128 U JPS62177128 U JP S62177128U JP 6268886 U JP6268886 U JP 6268886U JP 6268886 U JP6268886 U JP 6268886U JP S62177128 U JPS62177128 U JP S62177128U
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- circuit
- connection state
- sets
- counting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Description
第1図は本考案実施例の構成を示すブロツク構
成図。第2図は本考案実施例回路の動作を示すタ
イミングチヤート。第3図は従来例回路の構成を
示す回路図。
1……入力端子、2〜6……出力端子、7……
計数回路、8,9……論理和ゲート、10……ス
イツチ回路、11……タイミングパルス入力端子
、12……プログラム回路、13……ロータリス
イツチ。
FIG. 1 is a block configuration diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a timing chart showing the operation of the circuit according to the present invention. FIG. 3 is a circuit diagram showing the configuration of a conventional circuit. 1...Input terminal, 2-6...Output terminal, 7...
Counting circuit, 8, 9...OR gate, 10...Switch circuit, 11...Timing pulse input terminal, 12...Program circuit, 13...Rotary switch.
Claims (1)
との間に接続状態を設定するスイツチ回路を備え
たスイツチ装置において、 上記スイツチ回路は、上記出力端子ごとに設け
られた操作端子への入力にしたがつて、この出力
端子と上記入力端子との接続状態を設定する構成
であり、 到来する操作パルス数を計数し、計数出力端子
に計数にしたがつて順次一方のレベルの信号を出
力する計数回路と、 この計数出力端子と上記操作端子との間の接続
状態を設定するプログラム回路と を備えたことを特徴とするスイツチ装置。[Claims for Utility Model Registration] In a switching device equipped with a switch circuit that sets a connection state between one input terminal and each of a plurality of output terminals, the switch circuit is provided for each of the output terminals. The configuration is such that the connection state between this output terminal and the above input terminal is set according to the input to the operation terminal. A switch device comprising: a counting circuit that outputs a level signal; and a program circuit that sets a connection state between the counting output terminal and the operation terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6268886U JPS62177128U (en) | 1986-04-25 | 1986-04-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6268886U JPS62177128U (en) | 1986-04-25 | 1986-04-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62177128U true JPS62177128U (en) | 1987-11-10 |
Family
ID=30897196
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6268886U Pending JPS62177128U (en) | 1986-04-25 | 1986-04-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62177128U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5994921A (en) * | 1982-11-19 | 1984-05-31 | Sanii Denshi Kk | Electronic switch |
-
1986
- 1986-04-25 JP JP6268886U patent/JPS62177128U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5994921A (en) * | 1982-11-19 | 1984-05-31 | Sanii Denshi Kk | Electronic switch |
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