JPS62175499U - - Google Patents
Info
- Publication number
- JPS62175499U JPS62175499U JP6340886U JP6340886U JPS62175499U JP S62175499 U JPS62175499 U JP S62175499U JP 6340886 U JP6340886 U JP 6340886U JP 6340886 U JP6340886 U JP 6340886U JP S62175499 U JPS62175499 U JP S62175499U
- Authority
- JP
- Japan
- Prior art keywords
- output
- signal
- input
- nand gate
- flip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000630 rising effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Image Input (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6340886U JPS62175499U (es) | 1986-04-25 | 1986-04-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6340886U JPS62175499U (es) | 1986-04-25 | 1986-04-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62175499U true JPS62175499U (es) | 1987-11-07 |
Family
ID=30898605
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6340886U Pending JPS62175499U (es) | 1986-04-25 | 1986-04-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62175499U (es) |
-
1986
- 1986-04-25 JP JP6340886U patent/JPS62175499U/ja active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS62175499U (es) | ||
JPS63103151U (es) | ||
JPS59174741U (ja) | デイジタル集積回路 | |
JPS62164693U (es) | ||
JPS6241438Y2 (es) | ||
JPS59130144U (ja) | パリテイ・チエツク回路 | |
JPS60164258U (ja) | デ−タ転送制御装置 | |
JPH0210633U (es) | ||
JPS63146772U (es) | ||
JPS60175399U (ja) | Eepromの書き込み電圧制御回路 | |
JPS603999U (ja) | メモリ内蔵lsi | |
JPS6055129U (ja) | 出力回路 | |
JPS6113398U (ja) | 集積回路 | |
JPS6181221U (es) | ||
JPS601037U (ja) | 二者択一回路 | |
JPS60109102U (ja) | デジタル制御回路 | |
JPS60132699U (ja) | 集積回路 | |
JPS60124134U (ja) | 信号整形回路 | |
JPS582040U (ja) | デ−タ処理装置におけるクロック回路 | |
JPS6423136U (es) | ||
JPH0394698U (es) | ||
JPS59189336U (ja) | 入力回路 | |
JPS59122626U (ja) | 読取制御装置 | |
JPS5933334U (ja) | フリツプフロツプ回路 | |
JPS5897800U (ja) | メモリ装置 |