JPS6217425B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television receiver.

The first block diagram of a conventional television receiver is
As shown in the figure. In the figure, a television signal applied from an antenna 1 passes through a tuner 2 and a reception intermediate frequency amplification circuit 3 and is extracted as a video signal. On the other hand, audio is separated by the video intermediate frequency amplification circuit 3, detected and amplified by the audio processing circuit 4, and output from the speaker 5. On the one hand, the video signal output from the video intermediate frequency amplification circuit 3 is
It is deflected using a deflection yoke 9 by a jungle circuit 6, a horizontal deflection circuit 7, and a vertical deflection circuit 8. The other signal passes through a video amplification circuit 10, a color signal processing circuit 11, and a color demodulation circuit 12, is combined in a matrix circuit 13, and is supplied to a cathode ray tube 15 via a video output circuit 14. Horizontal deflection circuit 7
Horizontal and vertical blanking signals are provided to the video output circuit 14 from the video output circuit 14.

However, the resolution of such conventional television receivers and the frequency characteristics of the video signal are determined by the broadcasting system, and there are limits to improvements on the television receiver side. Also, the brightness of the screen is
The performance of the cathode ray tube 15 has been improved and the brightness has become brighter, but it is still not enough.

Therefore, an object of the present invention is to provide a television receiver that can improve screen resolution and brightness.

This invention makes it possible to obtain twice as many scanning lines as in the broadcasting system, without the scanning lines being noticeable, even in large-screen television receivers, for example, and by making the horizontal retrace lines, which were previously erased, shine. This results in a brighter screen. This becomes possible only by temporarily storing the video signal and subjecting it to time axis compression and inversion processing.

An embodiment of this invention is shown in FIG. That is, in this television receiver, as shown in FIG. 2, a video signal time axis processing circuit 16 is interposed between the video intermediate frequency amplification circuit 3 and the video amplification circuit 10. is controlled by a horizontal synchronization signal obtained from the horizontal deflection circuit 7,
Only the vertical blanking signal from the vertical deflection circuit 8 is supplied to the video output circuit 14, and the horizontal blanking signal is not supplied to the video output circuit 14, and the other configuration is the same as that of FIG.

Next, the video signal time axis processing circuit 16 will be explained in detail with reference to FIGS. 3 and 4. Third
The figure is a detailed block diagram of the video signal time axis processing circuit 16, in which 17 is a 1H delay line using a charge transfer element, 18 and 19 are time axis compression and inversion circuits, and 18
a, 18b, 19a and 19b are charge transfer element arrays. Further, FIG. 4 is a signal waveform diagram of each part of the video signal time axis processing circuit 16 of FIG.
Z, A, B, and C are video signals of one horizontal period, and the same symbols represent the same signals.

Now, the video signal as shown in FIG. 4a outputted from the video intermediate frequency amplification circuit 3 is
7 and is also supplied to time axis compression and reversal circuits 18 and 19. Of these, the video signal supplied to the 1H delay line 17 is delayed by one horizontal period as shown in FIG. 4b. On the other hand, the video signals supplied to the time axis compression and inversion circuits 18 and 19 are as follows. As shown in FIG. 4g, the charge transfer element array 18a of the time axis compression and inversion circuit 18 receives a burst sampling pulse and a transfer pulse obtained by inverting the burst sampling pulse in the video signal section (horizontal effective scanning period) of every other horizontal period. At the same time, a burst reverse transfer pulse and a read pulse obtained by inverting the burst reverse transfer pulse are applied to the charge transfer element array 18b during each horizontal retrace period, as shown in FIG. 4i. Further, as shown in FIG. 4h, a burst sampling pulse and a transfer pulse obtained by inverting the burst sampling pulse are applied to the video signal section of every other horizontal period to the charge transfer element array 19a of the time axis compression/inversion circuit 19. At the same time, a reverse transfer pulse shown in FIG. 4i and a read pulse obtained by inverting the reverse transfer pulse are applied to the charge transfer element array 19b. Now, when the video signal A is applied to the charge transfer element array 18a of the time axis compression/inversion circuit 18, the video signal A is sampled and transferred to the right. When the charge transfer element array 18a is filled, the signals in the charge transfer element 18a are directly transferred in parallel to the charge transfer element array 18b by the parallel transfer pulse. At the same time, the charge transfer element array 18b reversely transfers the video signal A, reads it out, and returns it to the charge transfer element array 18b again. On the other hand, even if the video signal A is applied to the time axis compression/inversion circuit 19, the charge transfer element array 19
Since the sampling pulse and the transfer pulse are not applied to a, the sampling and transfer of the video signal A are not performed, and the charge transfer element array 19b
, the video signal Z of the previous horizontal effective scanning period is output by the reverse transfer pulse and the read pulse.
Even if video signal B is applied to the charge transfer element array 18a of the time-base compression/inversion circuit 18 in the next horizontal effective scanning period, since no sampling pulse and transfer pulse are applied, the previous video signal A
is output from the charge transfer element array 18a. Charge transfer element array 19 of time axis compression and inversion circuit 19
When the video signal B is applied to a, sampling and transfer are performed, and the signal is transferred in parallel to the charge transfer element array 19b by a parallel transfer pulse, and at the same time, reverse transfer and reading are performed. As a result, the charge transfer element array 18 of the time axis compression and inversion circuits 18 and 19
As shown in FIG. 4c and d, respectively, the video signals of one horizontal effective scanning period are compressed and inverted during one horizontal retrace period and outputted from b and 19b. Similar operations are performed thereafter. This charge transfer element array 18b,
The compressed inverted video signal 19b is combined and averaged by a combining averaging circuit 20 as shown in FIG. 4e,
Thereafter, as shown in FIG. 4f, the synthesis circuit 21
It is combined with the output signal of the 1H delay line 17 and applied to the video amplification circuit 10. The frequency of the sampling pulse and the transfer pulse shown in Fig. 4g and h are selected to be more than twice the band of the input video signal according to the sampling theorem, and the frequency of the reverse transfer pulse and the readout pulse shown in Fig. 4i is selected. Since the video signal section in one horizontal period is 50 .mu.sec, the time is compressed to one-fourth by four times that of FIG. 4g and h.

As a result of this configuration, a video signal can be output on the screen even during the horizontal retrace period, and the resolution (vertical direction), brightness, and SN ratio of the screen can be improved.

As described above, the television receiver of the present invention includes an analog delay element that delays a video signal by one horizontal period, and a video signal in odd-numbered horizontal effective scanning periods that is sequentially sampled at a predetermined period. A first time axis compression reversal that sequentially outputs data from the last two horizontal blanking periods immediately after the odd-numbered horizontal blanking period at a period corresponding to the ratio of the length of the horizontal effective scanning period to the horizontal blanking period. A circuit, the video signal of the even-numbered horizontal effective scanning period is sampled sequentially at the predetermined period, and the sampled data is transmitted during the horizontal effective scanning period in two horizontal retrace periods immediately after the even-numbered horizontal effective scanning period. and a second time-base compression reversal circuit that sequentially outputs outputs from the last at a period according to the ratio of the length of the horizontal retrace period;
The present invention includes a combining and averaging circuit that combines and averages the outputs of the first and second time axis compression and inversion circuits, and a combining circuit that combines the output of the analog delay element and the output of the combining and averaging circuit. During the horizontal effective scanning period, the received video signal is displayed as is without any time axis manipulation, and during the horizontal blanking period, which was conventionally blanked, the time axis of the video signal of the preceding and following horizontal effective scanning periods is compressed. Then, the reversed version is displayed.

In this way, by compressing and displaying the video signal even during the horizontal retrace period, it is possible to create a screen that makes the scanning lines less visible and has improved brightness and SN ratio, without making any major changes to the horizontal deflection circuit of conventional television receivers. can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional television receiver, FIGS. 2 and 3 are block diagrams of an embodiment of the present invention and its main parts, and FIG. 4 is an explanatory diagram of its operation. 3...Video intermediate frequency amplification circuit, 10...Video amplification circuit, 16...Video signal time axis processing circuit, 1
7... 1H delay line, 18, 19... Time axis compression inversion circuit, 18a, 18b, 19a, 19b... Charge transfer element array, 20... Synthesis averaging circuit, 21
...Synthetic circuit.

Claims (1)

[Claims] 1 An analog delay element that delays a video signal by one horizontal period, and a video signal of an odd-numbered horizontal effective scanning period is sequentially sampled at a predetermined period, and the sampled data is transmitted twice immediately after the odd-numbered horizontal effective scanning period. a first time-base compression and inversion circuit that outputs sequentially from the last one at a period corresponding to the length ratio of the horizontal effective scanning period to the horizontal blanking period during the horizontal blanking period; and a video signal of the even-numbered horizontal effective scanning period. is sequentially sampled at the predetermined period, and the sampled data is divided into two horizontal blanking periods immediately after the even-numbered horizontal effective scanning period according to the ratio of the length of the horizontal effective scanning period to the horizontal blanking period. a second time axis compression reversal circuit that sequentially outputs data from the end in a cycle;
A television comprising: a combining and averaging circuit that combines and averages the outputs of the first and second time axis compression and inversion circuits; and a combining circuit that combines the output of the analog delay element and the output of the combining and averaging circuit. receiver.