JPS5941667Y2 - television receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television receiver in which the resolution and brightness of the screen are increased from full scanning.

In a television receiver having a large screen, the spacing between the scanning lines on the screen increases, resulting in an apparent reduction in resolution, the darkening of the screen, and poor focus.

To compensate for this, conventional methods include scanning while vibrating the beam vertically and making the beam spot oval, but these methods have the disadvantage of poor focus. there were.

Furthermore, a method has been proposed in which a scanning line is inserted between each scanning line as shown in FIG. There is.

As shown in Figure 2, this method uses three lH memories,
2.3 is provided, and a video signal is written through a switch 4 whose contacts are switched for each memory.
This is read out at the timing shown in FIG.

That is, in Fig. 3, first, data is sequentially written to memory 2, and then data is written to memory 3. In the first half, the contents of the memory are read out at twice the speed of writing, and in the second half, the contents of the memory are read out at twice the writing speed. Read the contents of 2 at twice the speed.

The read signal is added to the processing circuit 5i, the signal of memory 1 read in the first half is output as is, and the signals of memory 2 and memory 2 read out in the latter half are added,
It will be output after the level has been defeated.

Next, when writing to memory 3 is completed, writing to memory starts again, and in the first half of this writing, memory 2 is read out at twice the writing speed, and in the second half, memories 2 and 3 are read out at twice the speed.

By writing and reading in the same manner, a screen as shown in FIG. 1 is obtained.

According to this method, the apparent resolution can be increased by the newly inserted scanning lines, the screen can be made brighter, and the focus will not deteriorate.

The present invention provides a new method that is different from the three methods described above. By making the receiver a full-scan type that performs scanning during the retrace period, the same effect as the method shown in Figure 1 can be obtained. In addition to this, the design can be made more easily.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 4 shows the principle of the first embodiment. As shown in the figure, on the television screen 10, first the ■th horizontal scan is performed at twice the speed of normal IH, and then during the retrace period. (2) Scan the same content as the second scan in the opposite direction at twice the IH speed.

In the same manner, the ■th, ■th, etc. scans are performed.
By performing reciprocal scanning at twice the speed of H, resolution and brightness can be increased without deteriorating focus.

Furthermore, since there is no wasted scanning period of the beam, efficiency is improved and design becomes easier.

In addition, in a normal television receiver, the horizontal deflection voltage Hy is shown in Fig. 5A.
However, in the present invention, in order to make each reciprocating scan time twice as fast as IH (for this purpose, a horizontal deflection voltage Hy′ having a waveform shown in FIG. 5B is used). It will be done.

FIG. 6 shows a specific circuit configuration to which the above principle is applied, and this circuit is inserted into the signal system of the receiver, for example, in the Y signal system.

In Figure 6, 11.12-22 are AND gates, 2
3.24 is an analog shift register (hereinafter referred to as ASR), 25.26 is a flip-flop (hereinafter referred to as FF), 27, 28, and 29 are adders, 6 is a Y signal input terminal, and γ is a horizontal synchronizing signal. 8 is an input terminal for an H' signal having a double frequency, and an output terminal for an output Y' signal.

The ASRs 23 and 24 are forced to write the Y signal at the IH speed, and to read the signal at twice the writing speed for 1H period.

Also, these ASR23 and 24 are bidirectional, so the screen 1
When scanning from left to right at 0, reading is performed with a right shift, and when scanning from right to left, reading is performed with a left shift.

For this reason, in AsR23f, the AND gate 19
The read command with left shift is executed by the output of
In the ASR 24, the output f of the AND gate 21 is interpolated with a read instruction by shifting to the left.

Note that the ASRs 23 and 24 are normally read by shifting to the right.

Further, when the ASR 23 is read by shifting to the right, the read signal QR is applied to the AND gate 16, fed back through the AND gate 12 and the adder 2T, and written again.

When the ASR 24 is read by shifting to the right, the read signal QR- is added to the AND gate 18, and is fed back through the AND gate 14 and the adder 28 to be written again.

Next, the operation for performing the scanning shown in FIG. 4 using the above configuration is as follows.
This will be explained with reference to FIG.

An input Y signal is applied to the input terminal 6, and a pulse signal H' having twice the frequency of the horizontal synchronizing signal is applied to the input terminal T.

From this signal H1, the output Q□ of the FF 25 is inverted every ->H as shown in FIG.

In addition, the output Q of FF26 is inverted every IH, and these F
The on/off states of the AND gates 11 to 22 are controlled by the output QIQ□-Q2Q2 of F25.26.

First of all, Ql -Q of FF25.26! If both are in the state of roJ, then the AND gate 12,
13, 14, 15, 16, 17, 19, 20, and 21 are all turned off.

At this time, both Ql and Q2 are "l", so the AND gates 11 and 14 are turned on, and the output of the AND gate 22 is "l", thereby turning the AND gate 1B on.

When the AND gate 11 is turned on, the Y signal is written to the ASR 23 through the AND gate 11 and the adder 2T.

At the same time, by turning on AND gate 1B, ASR24
is read out.

This reading is performed by right shifting at twice the speed of writing, and the read signal QzR is added to the output terminal 8f through the AND gate 1B and the adder 29, and
A part of it is fed back through the AND gate 14 and the adder 28 and written into the ASR 24 again.

The signal Y' obtained at the output terminal 8 is screen 1 in FIG.
0, for example, the normal 2 scanning line shown as a solid line.
scanned at twice the speed.

When the above operation is performed for 1H period, the signal " is applied again, Qt - Qt is inverted, and becomes [J roJ , and Q
2- Q2 maintains "0" and "l".

As a result, the output of the AND gate 21 becomes "L" and the AND gate 11 is turned on, and the output "
1'' is added to the ASR 24 as a left shift read command signal.

As a result, 4 reads out the signal written by the feedback to the ASH by shifting to the left, and the read signal Q2L
is the output terminal 8 through the AND gate 1T and the adder 29.
added to.

Also at this time, AND gate 12.13.15.16゜1
B, 19.20.21 continues to be off, and AND gate 21 continues to be on, which causes Y
A signal is subsequently written to ASR23.

The signal Y' obtained at the output terminal 8 is scanned at twice the normal speed as a scanning line 2 shown by a dotted line in FIG.

When the above operation is carried out during the -LH period, the next signal H' is added, and Ql, Q□ become "0", "l", Q2 . Q2 is rlJ
rOJ respectively.

As a result, the AND gates 12 and 13 are turned on, and the output of the AND gate 20 becomes "l", thereby turning the AND gate 16 on.

Also at this time, AND gate 11. 14.15.17.
18.1921.22 will be in the off state.

The ASR 23 is read by turning on the AND gate 16.

This reading is performed by right shifting at twice the speed of writing, and this read signal QIL is output from the AND gate 1.
6 and the adder 29 to the output terminal 8, and a part of it is fed back to the ASR 23 through the AND gate 12 and the adder 2T and written into the ASR 23 again.

Then, the signal Y' obtained from the output terminal 1 is scanned as a scanning line indicated by a solid line on the screen 10.

Next, when the above operation is performed for the In period, the signal H' is applied and Q,,Q, are inverted, and Q2゜Q
2 maintains "l" and "0".

As a result, the output of the AND gate 19 becomes "1", the AND gate 15 is turned on, and the output "1" is turned on.
” is added to the ASR 23 as a left shift read command signal.

As a result, the ASR 23 reads out the signal written by the feedback by left shifting, and this read signal Qtt,
is the output terminal 8 through the AND gate 15 and the adder 29.
added to.

At this time, the AND gates 20, 21, and 22 continue to be off, and the AND gate 13 continues to be on, so that the Y signal is continuously written to the ASR 24.

The signal obtained at the output terminal 8 is scanned as a dotted black scanning line on the screen 10 in FIG.

When the above operation is performed for one more period, the signal H' is outputted, Q
t-Qi is "0" or "1", Q2. Q2 is “0” or “l”
, respectively, and return to the state described above, and the same operation is repeated thereafter, thereby performing reciprocating scanning from the scanning line .largecircle. on the screen 10.

FIG. 8 shows the principle of the second embodiment of the present invention.
Scanning lines as shown by dotted lines having the contents of *+*, *10*, and *10* are inserted, and f is repeated so that this is repeated as one cycle.

According to this method, compared to the case shown in FIG. 4, it is possible to obtain a screen in which the image changes smoothly in each scanning line.

Incidentally, each reciprocating scan is performed at twice the normal speed by the horizontal deflection voltage shown in FIG. 5, as in the case of FIG. 4.

FIG. 9 shows an example of a specific circuit configuration to which the above principle is applied.

In Figure 9, 31.32-42 are AND gates, 50
．． 51-55 is ORGATE, 43.44°45 is ASR
, 46, 47, 48, 49 are adders, 56 is 1 adder,
5T is a Y signal input terminal, 58 is a W signal input terminal, 59 is a Y' signal output terminal, and 60 is a shift register (hereinafter referred to as SR).

This 5R60 has six output terminals Q□~Q6, and is a register in which one of these outputs Q,~Q is always "1" and the others are "0". be.

In addition, in this 5R60, each time a pulse signal H' having twice the frequency of the horizontal synchronizing signal is applied, the output "l" of one of Q□ to Q6 sequentially moves, and %Qa becomes "l". After that, Ql is forced to become "1".

In Fig. 8, during the above-mentioned period, ■, ■ ten ■, ■, ■
There are six states: 10■, 2, and 10■, and Q1 to Q6 are used to create these six states.

Similar to the ASR shown in FIG. 6, the ASR43.44.45 normally performs reading by shifting to the right, and performs reading by shifting to the left in response to a left shift read command signal.

Also, the signal QI B s Q2R read out by right shift
Part of I Q3R is an anime game) 32.34.36
A portion of the signals QILIQ2L and Q3L read out by left shift is directly fed back and written again.

Next, the operation according to the above configuration is performed in the first
This will be explained with reference to Figure 0.

In this embodiment, Ql is "l" in the initial state of the 5R60, and the signal H is
' is added, it moves from Q2 to Q6 and returns to Q□ again, and according to this movement, ASR43, 44, 45
Reading and writing are performed as shown in the figure.

(When the scanning of 1>, 2 is performed) If Ql of 5R60 is "l" in the initial state, the AND gates 31 and 34 are turned on through the OR gate 50, and the AND gate 40 is also turned on.

Further, AND gates 32 to 39 and 41.42 are all turned off.

Therefore, the Y signal is written to ASR43, and the AS
R44 is shifted to the right and read out at twice the writing speed.

This read signal Q2R is applied to an output terminal 59 through an AND gate 40 and an adder 49.

This output Y' signal causes the scanning of the screen 10 in FIG. 8 to be performed.

(2) When the scanning of 10 and 2 is performed, when the operation of (1) is performed during the -In period, the H' signal is added and Q becomes "L".

This allows AND gate 31 to pass through OR gate 50.
continues to be in the on state, and therefore writing to the ASR 43 continues.

At the same time, ANDGATE 3 through TAKOORGATE 54
4 is turned on, a left shift read command signal is applied to the ASR 44.

Furthermore, the AND gate 41 is turned on through the OR gate 55, and a left shift read command signal is applied to the ASR 45, and as a result, the ASRs 44 and 45 are read out with a left shift.

The signal Q2L read out from the ASR 44 is applied to the adder 56 through the AND gate 39, and a portion thereof is fed back.

The signal Qst read from the ASR 45 is applied to the adder 56 through the AND gate 41, and a portion thereof is fed back.

The adder 56 adds the signals Q2L and Qst, averages them to the level of Σ, and applies this signal to the output terminal 59 through the adder 49.

This output signal Y' causes the screen 10 to be scanned in ``+■''.

(3) When the scanning of (■) is performed, after the operation of (2) is performed for 1H period, the signal H' causes Q3 to be scanned.
becomes "1".

This causes the AND gate 33 to pass through the OR gate 51.
．． 36 is turned on, and the AND gate 42 is turned on.

Also, at this time, the AND gate 31 is turned off and the AS
Writing of R43 stops.

As a result, the Y signal passes through the AND gate 33 to the ASR 44.
At the same time, the ASR 45 is read by shifting to the right.

This read signal QsR is applied to the output terminal 59 through the AND gate 42 and the adder 49, and a portion thereof is fed back through the AND gate 36.

Then, the scanning of {circle around (2)} is performed by the Y' signal.

(4) When the scanning of ■10■ is performed, if the operation of (3) is performed during the TH period, the Q4
becomes "l".

This causes the AND gate 33 to pass through the OR gate 51.
continues to be in the on state, and writing to the ASR 44 continues.

At the same time, AND gate 3T is passed through OR gate 53.
is turned on, and a left shift read command signal is applied to the ASR 43.

Further, the AND gate 41 is turned on through the OR gate 55, and a left shift read command signal is applied to the ASR 45.

As a result, ASR43 and 45 are read out with left shift,
Each of the read signals QIL and QaL is applied to the adder 56 through AND gates 37 and 41, and a portion thereof is fed back.

The adder 56 adds the Qi L I QaL signals to form a ground level signal, and this signal is sent to the output terminal 5.
Added to 9.

This output Y cat number causes the scanning of ■10■.

(5) When the scanning of ■ is performed, when the operation of (4) is performed for 1H period, Q becomes "1" due to the Hg signal.

This allows AND gate 3 to pass through OR gate 52.
2.35 is on ★With this, AND gate 38
turns on.

Therefore, ASR43 is read by shifting to the right, and
A Y signal is written to SR45 through AND gate 35.

The read signal Q□R is applied to the output terminal 59f through the AND gate 3B, and is also applied to the AND gate 3B.
He will return through 2.

Then, the scanning of {circle around (2)} is performed by the output Y' signal.

(6), ■ Case where 10 scans are performed When the operation in (5) is performed during the TH period, the W signal causes Q6
becomes "l".

This causes the AND gate 32 to pass through the OR gate 52.
．． 35 is in the on state.

Along with this, and gate 3γ is passed through f or gate 53.
is turned on, and a left shift read command signal is applied to the ASR 43.

Further, the AND gate 39 is turned on through the OR gate 54, and a left shift read command signal is applied to the ASR 44.

Therefore, the ASR 45 continues to write the Y signal, and the ASRs 43 and 44 read by shifting to the left.

These read signals QILIQzL are applied to adder 56 through AND gates 37 and 39, respectively.

The adder 56 adds the signal QILQ2L and applies an i-level signal to the output terminal 59.

Then, the Y' signal obtained from the output terminal 59f (therefore,
Scanning (3) is performed.

Next, when the operation (6>) is performed during the In period, the H signal is applied, Ql becomes "1" again, and the operations described in (1) to (6) below are repeated.

The above description has been made regarding the Y signal l, but in the case of a color receiver, the circuit shown in FIG. 6 or 8 may be inserted into each color difference signal system of R-Y, B-Y%G-Y.

In this case, the ASR control system circuit can be shared, and since the color difference signal system has a low frequency, the number of ASR bits can be reduced accordingly.

In addition, in each embodiment, writing is performed during the ASRf IH period, and reading is performed at twice the speed of writing, but this reading is performed at four times, six times, eight times the speed of writing.
..., the resolution and brightness can be further increased.

As described above, the present invention provides a plurality of line memories each composed of bidirectional analog memories, and writes television signals into each line memory sequentially and in the forward direction in units of horizontal scanning periods. In this case, after writing to one line memory is completed and until the next writing is performed to that line memory, forward reading and backward reading of that line memory are performed using the integer at the time of writing, respectively. The screen is scanned in the forward direction based on the signal read out in the forward direction, and the screen is scanned in the forward direction based on the signal read out in the reverse direction. This is a television receiver characterized in that it is configured to perform scanning in the backward direction.

Therefore, according to the present invention, the resolution and brightness of the screen can be increased without deteriorating the focus.

Furthermore, compared to the method f shown in FIG. 1, since there is no blanking period in the scanning period, the scanning time becomes longer and circuit design becomes easier.

[Brief explanation of the drawing]

Figure 1 is a schematic diagram of a television screen showing an example of the conventional method;
The figure is a circuit system diagram for implementing the method shown in Fig. 1, and Fig. 3 is a timing chart for explaining the operation of Fig. 2.
FIG. 4 is a schematic diagram of a television screen showing the principle of the first embodiment of the present invention, FIG. 5 is a horizontal deflection voltage waveform diagram of the conventional and present invention, and FIG. 6 is a diagram showing the principle of the first embodiment of the present invention. circuit diagram,
Fig. 1 is a timing chart for explaining the operation of Fig. 6, Fig. 8 is a schematic diagram of a television screen showing the principle of the second embodiment of the present invention, and Fig. 9 is a diagram for implementing the principle of Fig. 8. FIG. 10 is a timing chart for explaining the operation of FIG. 9. In addition, in the symbols used in the drawings, 10 is the screen,
23.24.43.44.45 is an analog shift register, 25 is a flip-flop, and 60 is a shift register.

Claims (1)

[Scope of utility model registration request] A plurality of line memories each consisting of a bidirectional analog memory are provided, and television signals are sequentially and forwardly written in each line memory in horizontal scanning period units. After writing to a line memory is completed and before the next write is performed to that line memory, reading from that line memory in the forward direction and reading in the reverse direction are performed at an integer multiple of the writing speed, respectively. The screen is scanned in the forward direction based on the signal read out in the forward direction, and the screen is scanned in the backward direction based on the signal read out in the reverse direction. A television receiver featuring: