JPS62173782A - Optical integrated circuit device - Google Patents

Optical integrated circuit device

Info

Publication number
JPS62173782A
JPS62173782A JP1511086A JP1511086A JPS62173782A JP S62173782 A JPS62173782 A JP S62173782A JP 1511086 A JP1511086 A JP 1511086A JP 1511086 A JP1511086 A JP 1511086A JP S62173782 A JPS62173782 A JP S62173782A
Authority
JP
Japan
Prior art keywords
layer
integrated circuit
laser
electrode
optical integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1511086A
Other languages
Japanese (ja)
Inventor
Shinichi Takigawa
信一 瀧川
Kunio Ito
国雄 伊藤
Hiroaki Asada
浩明 浅田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1511086A priority Critical patent/JPS62173782A/en
Publication of JPS62173782A publication Critical patent/JPS62173782A/en
Pending legal-status Critical Current

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  • Junction Field-Effect Transistors (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To obtain a small-sized optical integrated circuit which operates with a fine input signal by forming a laser driver of an MESFET and a Schottky diode together with a semiconductor laser on a GaAs substrate. CONSTITUTION:After a P-type GaAs grown layer 2 is grown 3mum or thicker on a GaAs semi-insulating substrate 1, an N-type GaAs current block layer 3, a first clad layer 4, an active layer 5, a second clad layer 6 and a cap layer 7 are sequentially grown by an LPE method. Then, a BTRS type semiconductor laser and the grown layer except the layer 2 for an electrode are removed. Thereafter, Si is doped in the substrate 1 to form active layers 10, 11. After an SiO2 is formed on the end of a laser for wiring, a gate electrode 13, a drain electrode 12, and a source electrode 14 are formed to form an MESFET, and a Schottky electrode 15 and an N-type electrode 16 are formed to form a Schottky diode.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、微小な入力信号で、レーザ発光が得られる光
集積回路、装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an optical integrated circuit and a device capable of emitting laser light with a minute input signal.

従来の技術 従来、微小な入力信号で、半導体レーザ素子を駆動する
場合、シリコン集積回路またはディスクリート素子を組
み合わせた回路を用いて行っていた。
2. Description of the Related Art Conventionally, when driving a semiconductor laser element with a minute input signal, a silicon integrated circuit or a circuit combining discrete elements has been used.

発明が解決しようとする問題点 上記のような技術では、シリコンの移動度が十分に犬き
くないことや、配線による遅延により、立ち上がり、立
ち下がりの連体レーザ駆動電流が得られなかった。その
ため半導体レーザの高速変調性を、充分、生かすことが
できなかった。さらに、この回路には多数の素子が用い
られるため、システムとして大型になった。
Problems to be Solved by the Invention With the techniques described above, it has been impossible to obtain a continuous laser drive current with rising and falling edges due to the insufficient mobility of silicon and the delay caused by wiring. Therefore, the high-speed modulation properties of semiconductor lasers could not be fully utilized. Furthermore, since this circuit uses a large number of elements, the system becomes large.

問題点を解決するだめの手段 上記問題点を解決するために、本発明の光集積回路装置
は、GaAs半導体基板上に、半導体レーザと1.駆動
回路とが集積化されて構成されている。
Means for Solving the Problems In order to solve the above problems, the optical integrated circuit device of the present invention includes a semiconductor laser and 1. a semiconductor laser on a GaAs semiconductor substrate. The drive circuit is integrated with the drive circuit.

作  用 この構成によって、駆動回路が、移動度が大きいGaA
sを材料として構成されているので、回路素子による遅
延が減少し、また、半導体レーザを含むすべての素子が
同一基板上に作製されているので、素子間隔が極めて小
さく、そのため配線による遅延が減少する。また、同時
にシステムがコンパクト化される。
Function: With this configuration, the drive circuit can use GaA, which has high mobility.
Since the device is constructed using S as a material, delays due to circuit elements are reduced, and since all elements including the semiconductor laser are fabricated on the same substrate, the spacing between elements is extremely small, which reduces delays due to wiring. do. At the same time, the system becomes more compact.

実施例 第1図aは、本発明の一実施例による光集積回路の外観
図、また同図すは、その断面図である。
Embodiment FIG. 1a is an external view of an optical integrated circuit according to an embodiment of the present invention, and the same figure is a sectional view thereof.

チップの大きさは、10.4X7wjである。The size of the chip is 10.4×7wj.

半導体レーザは、第1図すに示すように、メサストライ
プを持つp型GaAs層2上に、ふたつのリッジを持つ
電流ブロッキング層(、n型GaAs ) 3が設けら
れている。ての構造はBTR3型半導体レーザとよばれ
ている。そしてこの構造により、AlGaAs活性層5
の薄膜化(0,1μm以下)、および、電流の集中が可
能となる。活性層6の膜厚、活性層5のA1組成、発光
端面のコーティング構造(膜厚、多層コート、非対称コ
ート)等によシ、この半導体レーザの特性を変えること
ができる。
In the semiconductor laser, as shown in FIG. 1, a current blocking layer (n-type GaAs) 3 having two ridges is provided on a p-type GaAs layer 2 having mesa stripes. This structure is called a BTR3 type semiconductor laser. With this structure, the AlGaAs active layer 5
It is possible to make the film thinner (0.1 μm or less) and concentrate the current. The characteristics of this semiconductor laser can be changed depending on the thickness of the active layer 6, the A1 composition of the active layer 5, the coating structure (thickness, multilayer coating, asymmetric coating) of the light emitting end face, etc.

ここで作製した光集積回路中のBTR3型半導体レーザ
は、(1)活性層6の膜厚の薄膜化、および、最適な端
面コーティング(前面Al2O3膜厚λ/4、後面Al
2O3とStの多層コート)を施したI (h−35鯖
、λ=830nm、Pout==40m’W (Iop
 =90mA)なる超高出力赤外光半導体レーザ。
The BTR3 type semiconductor laser in the optical integrated circuit fabricated here has the following features: (1) thinning of the active layer 6 and optimum end face coating (Al2O3 film thickness λ/4 on the front surface, Al2O3 film thickness λ/4 on the rear surface);
I (h-35 mackerel, λ = 830 nm, Pout = = 40 m'W (Iop
= 90mA) ultra-high output infrared semiconductor laser.

(2)活性層5(7)A1組成を減らした、■th=4
0己、λ=750nm、POut=5mW(I 。p=
65mA)なる可視光半導体レーザ のいずれかである。
(2) Active layer 5 (7) Reduced A1 composition, ■th=4
0self, λ=750nm, POut=5mW (I.p=
65mA) visible light semiconductor laser.

このBTR8型半導体レーザを駆動するGaAs集積回
路部の等何回路を第2図に示す。MESFETTr  
Tr  シミツトキーダイオードD1.D2.D3およ
び、■S FET T r 6 、 T r 7. シ
g 7トキーf’f 、? −)’D4゜D5. D6
は、各々、入力信号o、oが、ECLレヘル(パルスH
I で−0,aV 、LOで−1−3V)、!::7:
/バチプルになるように変換する回路であり、高速ロジ
ックに対応できる。またM E S F E T  T
 r 3. T r 4゜T r 6で、電流切換回路
を構成している。VIPは、その定電流源用M E S
 F E T T r sのバイアス電圧を与え、レー
ザが、比較的高出力動作の場合は、−4,esV、比較
的低出力動作の場合は、−5,2V程度にして、消費電
力の無駄をはぶく。MESFETT r sは、レーザ
にバイアス電流を与えるものであり、”IB  の値で
、その電流を、0〜45 mAまで変えることができる
。つまり、あらかじめ、レーザに閘値電流と等しいバイ
アス電流を与えておけば、入力0−0に対して、リニア
にレーザ出力される。
FIG. 2 shows the circuitry of the GaAs integrated circuit section that drives this BTR8 type semiconductor laser. MESFETTr
Tr Schmitt key diode D1. D2. D3 and ■S FET T r 6, T r 7. Sig 7 key f'f,? -)'D4°D5. D6
are respectively input signals o and o at ECL level (pulse H
-0, aV at I, -1-3V at LO),! ::7:
This is a circuit that converts the circuit into a double-pull configuration, and is compatible with high-speed logic. Also M E S F E T T
r3. T r 4 and T r 6 constitute a current switching circuit. VIP is the constant current source MES
Apply a bias voltage of FETTrs, and set it to -4, esV when the laser operates at a relatively high output, and -5, 2V when the laser operates at a relatively low output, to avoid wasting power consumption. Splash. The MESFET T r s provides a bias current to the laser, and the current can be changed from 0 to 45 mA depending on the value of IB. If set, the laser output will be linear with respect to the input 0-0.

この光集積回路の作製方法は、第3図aに示すようにま
ず、半絶縁性基板上1に、LPE法または、MOCVD
法により、p型GaAs 2を3μm以上成長させる。
As shown in FIG. 3a, the method for manufacturing this optical integrated circuit is as follows: First, a layer is formed on a semi-insulating substrate 1 by LPE or MOCVD.
p-type GaAs 2 is grown to a thickness of 3 μm or more using the method.

この後、キャップ層7まで、順次LPE法で成長させる
。次に、第3図すに示すようにドライエッチやケミカル
エッチを、駆使して、BTR3型半導体レーザと、電極
用p型GaAs層2以外の成長層を除去する。次に第3
図Cに示すように除去された半絶縁性基板1にイオン注
入法で、SL  をドープし、活性層10.11を作製
する。
Thereafter, the layers up to the cap layer 7 are sequentially grown by the LPE method. Next, as shown in FIG. 3, using dry etching or chemical etching, the grown layers other than the BTR3 type semiconductor laser and the p-type GaAs layer 2 for electrode are removed. Then the third
As shown in FIG. C, the removed semi-insulating substrate 1 is doped with SL by ion implantation to form active layers 10.11.

そして、配線用レーザ端面にSiO□を作製した後、ゲ
ート電極、配線金属を作製して、第1図すに示す光集積
回路は完成する。
Then, after forming SiO□ on the end face of the wiring laser, a gate electrode and metal wiring are formed, and the optical integrated circuit shown in FIG. 1 is completed.

次に、この光集積回路の特性の一例として、超高出力赤
外光V−ザを集積した場合を、第4図に示す。ここで電
源vssは−5,2vとしだ。バイアス電圧テ、VIB
 = −4,4V 、 VIP = −4,5V (!
: した時、GaAs集積回路部の特性は同図Aのよう
になる。よって、入力0−6に、振巾1.3vの正弦波
を加えると、レーザに流れる電流工りは、オフセット6
5 mA 、振巾1a、 −r mA  の正弦波とな
り、出力レーザ光P。utは、オフセット20 mW 
、振巾1stnWの正弦波となる。ここで、vIPを小
さくすると、差動増幅回路の利得が減り、Bのよう、に
なり、光出力は小さくなる。また、vよりを小さくする
と、レーザバイアス電流がヘリ、Cのようになり、出力
波形は、歪む。
Next, as an example of the characteristics of this optical integrated circuit, FIG. 4 shows a case where an ultra-high output infrared V-ray laser is integrated. Here, the power supply vss is -5.2V. Bias voltage te, VIB
= -4,4V, VIP = -4,5V (!
: When this happens, the characteristics of the GaAs integrated circuit section will be as shown in Figure A. Therefore, if a sine wave with an amplitude of 1.3V is added to inputs 0-6, the current flowing through the laser will be offset 6.
It becomes a sine wave of 5 mA, amplitude 1a, -r mA, and output laser light P. ut is offset 20 mW
, becomes a sine wave with an amplitude of 1stnW. Here, when vIP is decreased, the gain of the differential amplifier circuit is decreased, as shown in B, and the optical output is decreased. Furthermore, when v is made smaller, the laser bias current becomes like C, and the output waveform is distorted.

本実施例の光集積回路装置に集積されたBTR3型半導
体レーザは、高効率・高信頼なため、5゜’C、40m
W のAPC動作寿命試験で、1000時間以上、動作
!圧(0、O、Vより、Vlp) ノに化は見られなか
った。
The BTR3 type semiconductor laser integrated in the optical integrated circuit device of this example has high efficiency and high reliability, so it
In W's APC operation life test, it operated for over 1000 hours! No change in pressure (from 0, O, V, Vlp) was observed.

発明の効果 本発明は、GaAsの集積回路であるので周波数特性に
優れ、2GHzの入力信号まで、レーザ出力光の応答が
ある。さらに、ひとつの基板内に、レーザおよび、駆動
回路が集積されているため、非常に小型であり、また、
素子配線等を必要とせず、組立工程数が減る。以上によ
り、例えば、LAN等における通信用発光部、光ディス
クにおける書き込み、読み取り用レーザ部、小型CDプ
レーヤにおけるレーザ発光部、等に大いに利用できる。
Effects of the Invention Since the present invention is a GaAs integrated circuit, it has excellent frequency characteristics and responds to laser output light up to an input signal of 2 GHz. Furthermore, since the laser and drive circuit are integrated on one substrate, it is extremely compact.
Eliminates the need for element wiring, reducing the number of assembly steps. As a result of the above, the present invention can be widely used, for example, as a communication light emitting unit in a LAN or the like, a writing/reading laser unit in an optical disc, a laser light emitting unit in a small CD player, and the like.

このように、本発明が、半導体レーザを使用した機器に
及ぼす影響は犬である。
In this way, the influence of the present invention on devices using semiconductor lasers is significant.

【図面の簡単な説明】[Brief explanation of drawings]

第1図aは、本発明の一実施例における光集積回路の外
観図、同図すは、その断面図、第2図は、本発明の光集
積回路の等価回路図、第3図は、本発明の光集積回路の
作製工程の一部を示す断面図。 第4図は、本発明の光集積回路の特性図である。 1・・・・・・GaAs半絶縁性基板、2・・・・・・
p型GaAs成長層、3・・・・・・n型GaAs電流
ブロック層、4・・・・・p型AI GaAs第1クラ
ッド層、S・・・・・・AI GaAs活性層、6・・
・・・・n型AlGaAs第2クラッド層、7・・・・
・・n型AlGaAsキャップ層、8・・・・・・n型
電極、9・・・・・・p型電極、10・・・・・・ME
SFET活性層、11・・・・・・ショットキーダイオ
ード活性層、12.14・・・・・ドレイン電極、ソー
ス電極、13・・・・・・ゲート電極、16・・・・・
・ショットキー電極、16・・川・n型電極。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名1゛
−(rJsFlf−*諷4u 2−−− P −GcLAs k &−113−−−デ
ーL電熟し くn、] GcLA5iCff#
FIG. 1a is an external view of an optical integrated circuit according to an embodiment of the present invention, which is a sectional view thereof, FIG. 2 is an equivalent circuit diagram of the optical integrated circuit of the present invention, and FIG. FIG. 2 is a cross-sectional view showing a part of the manufacturing process of the optical integrated circuit of the present invention. FIG. 4 is a characteristic diagram of the optical integrated circuit of the present invention. 1...GaAs semi-insulating substrate, 2...
p-type GaAs growth layer, 3...n-type GaAs current blocking layer, 4...p-type AI GaAs first cladding layer, S...AI GaAs active layer, 6...
...N-type AlGaAs second cladding layer, 7...
...n-type AlGaAs cap layer, 8...n-type electrode, 9...p-type electrode, 10...ME
SFET active layer, 11...Schottky diode active layer, 12.14...drain electrode, source electrode, 13...gate electrode, 16...
- Schottky electrode, 16... river, n-type electrode. Name of agent: Patent attorney Toshio Nakao and one other person

Claims (3)

【特許請求の範囲】[Claims] (1)同一基板上に半導体レーザ発光部、ショットキ接
合電界効果トランジスタおよびショットキダイオードか
ら構成されるレーザ駆動用回路部が形成されていること
を特徴とする光集積回路装置。
(1) An optical integrated circuit device characterized in that a laser driving circuit section comprising a semiconductor laser light emitting section, a Schottky junction field effect transistor, and a Schottky diode is formed on the same substrate.
(2)半導体レーザ発光部は、導電性エピタキシャル層
上に、電流ブロック層、第1クラッド層、活性層、第2
クラッド層およびキャップ層が順次形成されるとともに
前記ブロック層上には、ふたつのリッジが設けられてお
り、両リッジ間の間隙を通してのみ電流注入が可能な構
造を有することを特徴とする特許請求の範囲第1項記載
の光集積回路装置。
(2) The semiconductor laser light emitting section includes a current blocking layer, a first cladding layer, an active layer, a second cladding layer, a current blocking layer, a first cladding layer, an active layer, a second
A cladding layer and a cap layer are sequentially formed, and two ridges are provided on the block layer, and the structure has a structure in which current can be injected only through the gap between the two ridges. The optical integrated circuit device according to scope 1.
(3)レーザ駆動用回路部は、ECLレベルの入力信号
を所望の信号レベルに変換可能な入力信号変換回路、お
よび、利得可変な差動増幅回路、および、レーザに一定
電流を流し得るバイアス回路を有していることを特徴と
する特許請求の範囲第1項記載の光集積回路装置。
(3) The laser drive circuit section includes an input signal conversion circuit that can convert an ECL level input signal to a desired signal level, a differential amplifier circuit with variable gain, and a bias circuit that can flow a constant current to the laser. An optical integrated circuit device according to claim 1, characterized in that it has the following.
JP1511086A 1986-01-27 1986-01-27 Optical integrated circuit device Pending JPS62173782A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1511086A JPS62173782A (en) 1986-01-27 1986-01-27 Optical integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1511086A JPS62173782A (en) 1986-01-27 1986-01-27 Optical integrated circuit device

Publications (1)

Publication Number Publication Date
JPS62173782A true JPS62173782A (en) 1987-07-30

Family

ID=11879689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1511086A Pending JPS62173782A (en) 1986-01-27 1986-01-27 Optical integrated circuit device

Country Status (1)

Country Link
JP (1) JPS62173782A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8274733B2 (en) * 2007-03-26 2012-09-25 Fujitsu Limited Semiconductor optical amplification module, optical matrix switching device, and drive circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8274733B2 (en) * 2007-03-26 2012-09-25 Fujitsu Limited Semiconductor optical amplification module, optical matrix switching device, and drive circuit

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