JPS6126277A - Photoelectronic ic - Google Patents

Abstract

PURPOSE:To obtain the titled device easy of laser high-speed modulation and suitable as a light source for optical communication and optical information processing by a method wherein a semiconductor laser and driving transistors are monolithically integrated. CONSTITUTION:The series circuit of a current source FET element Q2 and a switching FET element Q1 is connected in parallel with a bias current impressing FET element Q3, and this circuit is connected between a semiconductor laser driving circuit LD and the ground GND. In such a construction, the bias current value is adjusted according to the voltage of the gate G3 of the element Q3, and the current flowing through the laser is turned ON and OFF by impressing input signal pulses on the gate G1 of the element Q1. These FET elements and the semiconductor laser part are provided on a P type GaAs substrate 1: the laser part is located in the upper part, and the FET elements in the lower part. Here, the semicondutor laser uses an inner-stripe type laser of current stricture due to an N type GaAs layer, and the FET uses a Schottky gate type element.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an optoelectronic integrated circuit (hereinafter referred to as 0EIC) used in optical communication and optical information processing systems.

(Conventional structure and its problems) In the early 1970s, continuous oscillation of semiconductor lasers at room temperature was achieved, and low-loss optical fibers were developed. BACKGROUND ART Vigorous research and development has been carried out on various optical devices necessary for constructing optical communication systems, such as optical connectors and optical connectors.

Today, optical fiber communication has reached the stage of practical use and is attracting attention as a new means of communication for the coming information society.

Current optical communication systems are comprised of optical-to-electrical conversion elements such as light-emitting elements and light-receiving elements, electronic elements (such as transistors and ICs) that drive them, and individual optical components such as lenses and mirrors.

By the way, in order to further improve the functionality, miniaturization, reliability, and economicalization of optical communication systems, it is essential to introduce the integration of individual components, as seen in silicon electronic devices. It seems. Based on this idea,
Recently, research has begun to attempt to monolithically integrate optical devices on the same semiconductor substrate.

Generally, light-emitting devices have a G
■-■ group compound semiconductors such as aAs and InP are used. These compound semiconductors have high electron mobility and can be used to create electronic devices such as transistors that can operate at high speed. QEIC can be realized by manufacturing these light emitting/light receiving elements and electronic devices on the same substrate. As mentioned earlier, there are several advantages to using 0EIC, one of which is increased speed. When individual elements are combined, parasitic capacitance and parasitic inductance caused by wiring become a problem in the high frequency range, but this can be reduced by integrating optical elements and electronic elements close together and shortening the wiring length.

(Object of the Invention) An object of the present invention is to provide an 0EIC in which a light emitting element such as a semiconductor laser and an electronic device such as a transistor for driving the light emitting element are monolithically integrated on a P-type compound semiconductor substrate. .

(Structure of the Invention) In order to achieve this object, in the semiconductor laser section of the ORIC of the present invention, a current confinement channel is provided by an n-type layer on a p-type substrate, an internal stripe type is formed, and a driving F
In the ET section, the substrate and the F'ET are electrically isolated by reverse biasing the p-n junction formed by the n-type layer on the p-type substrate. Further, the semiconductor laser and the FET
The pixel elements are separated by a groove reaching the substrate, and wiring is provided between the pixel elements by bridging the groove with a metal vapor deposited film.

(Explanation of Examples) The circuit configuration of an 0EIC according to the present invention is shown in FIG.

The semiconductor laser (LD) drive circuit uses current source FET Q
z and a switching FET Q□.

Q3 is a FET for applying a bias current, and the bias current value is adjusted to an appropriate value by the voltage of the gate G3.

By setting the signal current value flowing through the laser with the voltage of gate G2 and applying an input signal pulse to gate G1,
By turning the current flowing through the laser ON and OFF, an optical pulse output corresponding to the input electrical signal can be obtained.

FIG. 2 shows the appearance of the ORIC chip.

Since a semiconductor laser requires a resonator, the arm opening surface is used as a resonator mirror surface. Since the resonator length is usually about 300 μm, the dimensions of the IC chip of the present invention are such that NXwXt is 1.
Onm x 0.3mm x 0.1+nm. This 0EIC employs a horizontal integration structure in which optical elements and electronic elements are arranged and integrated on a P-type GaAs substrate 1.

As shown in FIG. 2, the upper part of the chip is a semiconductor laser section, and the lower part of the chip has three integrated FETs for driving the laser.

Although the structures of optical devices and electronic devices are completely different, the double heterostructure of GaAs and Ga1As used in the fabrication of semiconductor lasers is also used for the active layer of the FET, so the optical device section and the electronic circuit section are flat. Therefore, photolithography processes that require precision on the order of sub-μm for FET gates and the like can be easily performed.

In order to show the cross-sectional structure of the semiconductor laser and FET, the second
Figure 3 (a
), shown in (b). The semiconductor laser includes an n-type GaAs layer 2 epitaxially grown on a p-type GaAs substrate 1;
p-type Ga1-,i,As cladding layer 3 (y: 0.
4).

Ga1-xA1zAs active layer 4 (x: 0.08)
, an n-type Ga1-, AN, As cladding layer 5 and an n-type GaAs layer 6 serving as an n-type cap layer. The laser is of an internal stripe type in which a V-groove is formed in the n-type GaAs layer 2 on the p-type substrate 1 to constrict the current, and the laser oscillation region is the active layer 4 above the V-groove. By controlling the thickness of the p-type cladding layer 3, the n-type GaAs layer 2 of the laser beam can be
It is possible to create an effective refractive index distribution in the transverse direction by absorption into the refractive index, and it is possible to perform refractive index guided single-transverse mode oscillation. Further, due to the internal stripe structure, the lateral spread of current is small, and a semiconductor laser with a low threshold value and high efficiency can be obtained with good reproducibility. High efficiency of semiconductor lasers is essential for ORs and ICs from the standpoint of heat dissipation.

This is because in 0EIC, it is necessary to bond the substrate side onto the heat sink.

The thickness of each layer is as follows: n-type GaAs layer 2, which becomes an n-type current blocking layer.
is 3 μm, the p-type cladding layer 3 is 0.3 μm, the active layer 4 is 0.1 μm, the n-type cladding layer 5 is 1 μm, and the n-type GaAs layer 6, which is an n-type cap layer, is 2 μm. Also, from the point of heat dissipation, the substrate 1 should be approximately 100 μm from the errachin plate.
It has a thickness of . The laser section and the electronic circuit section are separated by a deep etching 7 that reaches into the substrate.

In the electronic circuit section, an n-type GaAs layer 2 and a p-type Gal
Since the p-'n junction formed of the As cladding layer 3 is biased in the reverse direction, the n-type GaAs layer 6, which serves as the cap layer that is the active layer of the FET, is electrically isolated from the p-type substrate 1. Further, isolation between the FETs is achieved by implanting protons from the growth surface to form a high resistance region 8. The FET is of the Shigotchi gate type, with the source electrode 9
The Ohmink electrode forming the drain electrode 10 is made of Au-
Formed by vapor deposition of Ge--Ni and Au, alloying, and Schottky electrode of gate electrode 11 (±Ti, Pt, and Au vapor deposition).

The manufacturing process of the above 0BIC is shown in FIG. First p
An n-type GaAs layer 2 is grown by liquid phase epitaxial growth on a type GaAs substrate 1 (FIG. 4(a)). On the next side, a sulfuric acid-based etching solution is used to form a V-groove with a width of 5 .mu.m (v) that reaches all the way to the substrate (FIG. 4(b)). (2) Each of the layers 3 to 6 constituting the laser is grown again by epitaxial growth on the substrate having the grooves, thereby producing a double heterostructure (FIG. 4(C)). After the growth, an etching groove 7 separating the laser section and the FET section is created by photolithography technology. A sulfuric acid-based etching solution is used, and after etching, a 5in2 film 12 is deposited by CVD (FIG. 4(d)). Next F
A part of the film 12 is removed by etching for isolation between the ETs, and protons are implanted to form a high resistance region 8 (FIG. 4(e)). After proton injection,
The source and drain ohmic electrodes 9 and 10 and the n-side ohmic electrode 13 of the laser are deposited by photolithography and alloyed. Further, a Schottky electrode 11 for the gate is deposited (FIG. 4(f)). On the next side, a 5un2 film 14 is applied again by CVD, and a wiring metal (Mo, 7u) 15 is vapor-deposited for wiring between elements.Finally, Au is vapor-deposited on the back surface of the substrate to form an ohmic electrode 16. (Figure 4 (g), (h)).

FIG. 5 shows the forward injection current-optical output characteristics of the integrated laser obtained as described above. The threshold current value of cw oscillation at room temperature is 45+nA, and the differential efficiency is 0.32mV/+
nA, and the linearity of the optical output is good up to an optical output of 10 mV or more. Furthermore, the transverse mode also oscillates in the fundamental mode, and exhibits sufficient characteristics as an integrated laser. The gate length of the FET used in the drive circuit is 2 μm, the gate width is 700 μm for 03 for bias application, and 30 μm for the other two FETs.
It is 0 μm. FIG. 6 shows the drain voltage-train current characteristics of the FBT. Further, FIG. 7 shows an example of measuring the operation of the ORIC of the present invention. In this measurement, the gate G□ of Ql (a
) The semiconductor laser is made to emit pulses by inputting the electric pulse signal shown in FIG. The optical output waveform is shown in FIG. 6(b), and an optical output pulse corresponding to the input signal is obtained.

(Effects of the Invention) In the 0EIC manufactured on the p-type substrate of the present invention, a part of the double heterostructure of the semiconductor laser is used as the active layer of the FET, so a silicon planar process can be applied. The accuracy of microfabrication is improved, making it easier to manufacture 0EIC.

As described above, by creating an 0BIC in which a semiconductor laser and a driving transistor are integrally integrated, high-speed modulation of the laser becomes easy, and its practical effects are great when used as a light source for optical communications and optical information processing. There is something.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the circuit configuration of the 0EIC of the present invention, FIG. 2 is an external view of the 0EIC chip, and FIG. 3(a) is a cross-sectional view of the IC chip. Line sectional view, (b
) is a sectional view taken along line B-8', and Figures 4 (a) to (h) are 0B.
Figure 5 is a diagram showing the IC manufacturing process, Figure 5 is a diagram showing the current-light output characteristics of the integrated laser, Figure 6 is a diagram showing the voltage-current characteristics of the FET, and Figure 7 is the diagram showing the 0BIC of the invention In an operation example, (a) is a diagram showing an input atmospheric pressure pulse waveform, and (b) is a diagram showing an output optical pulse waveform. 1... P-type GaAs substrate, 2... n-type GaAs layer serving as an n-type current blocking layer, 3-P-type Ga1-. 1.
As cladding layer (y: 0.4), 4-Ga1-, A1
．． As active layer (x: 0.0&), 5-n type G”1
-yAII! yAs cladding layer, 6... n-type GaAs layer serving as an n-type cap layer. 7... Element isolation groove by etching, 8... Proton irradiation high resistance region, 9... Source electrode, 10...
- Drain electrode, 11... Schottky electrode, 12-
CVD (Sin2) film, 13-n-side ohmic electrode, 14-CvD (SiO□) film, 15--wiring metal, 16-p-side ohmic electrode 6 Patent applicant Matsushita Electric Industrial Co., Ltd. No. 1 Figure 3 (a) (b) Figure 4 (a) (d) 1 (e) Figure 4 Figure 5 Forward direction to 1F Figure 6 Drain/source voltage, i Vos Figure 7 100ns/ div Procedural amendment (method) Yen November 19, 1980 Director General of the Patent Office Manabu Shiga 1 Case indication %a[59-145゜4゜゜゜2 Issue
Name of optoelectronic integrated circuit 3 Relationship with the case of the person making the amendment Applicant address 1006 Kadoma, Kadoma City, Osaka Prefecture Name (
582) Matsushita Electric Industrial Co., Ltd. Representative Yama
Toshihiko Shimo 4 Agent (1) Specification, page 9, lines 14 to 16 [Gate G
1...'' is changed to ``The electric pulse signal shown in the human electric pulse waveform a is input to the gate G□ to cause the semiconductor laser to oscillate on the panel. b is the output optical pulse. "The waveform is shown." (2) ``Figure 3 (a)'' on page 10, line 12 of the same page is changed to ``
Figure 3 has been corrected. (4) Figure 7 is corrected as shown in the attached sheet. that's all

Claims (3)

[Claims] (1) An optoelectronic integrated circuit characterized in that a light emitting element formed of an epitaxially grown film and a transistor element for driving the light emitting element are monolithically integrated on a p-type III-V group compound semiconductor substrate. (2) The optoelectronic integrated circuit according to claim (1), wherein the III-V compound is GaAs, the light emitting element is a semiconductor laser, and the driving transistor is a field effect transistor. (3) The optoelectronic device according to claim (2), wherein the semiconductor laser is an internal stripe type semiconductor laser in which current confinement is performed by an n-type GaAs layer, and the field effect transistor is a Schottky gate FET. integrated circuit.