JPS62171488A - Brushless motor - Google Patents

Abstract

PURPOSE:To simplify the construction of a brushless motor by providing correcting means for correcting the commutation order of a driver to eliminate a Hall element of a position signal generator and a signal processor continued to the generator. CONSTITUTION:An FG 3 is composed of an FG magnet and an FG sensor, and FG signal from the sensor is input through a duty discriminator 34 to a commutation signal generator 33 as a clock to generate a commutation signal. A clock signal generated from a start signal generator 31 is input through a signal converter 32 to the generator 33 at starting time when the FG signal is not obtained. The number M of the phases of a driving coil 15, the number P of driving poles and the number F of rotation signals per one revolution are so selected as to satisfy F=MXPXN (N is positive integer numbers), and a commutation order correction signal is applied to the generator 33 in response to the duty of the FG signal.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a brushless motor, and in particular, miniaturization has been achieved by simplifying the configuration of a drive circuit. The present invention relates to a highly reliable brushless motor with little torque ripple.

"Prior Art" Brushless motors have traditionally been equipped with a sensor (consisting of a Hall element, etc.) that detects the rotational phase of the rotor, and the output signal of that sensor is electrically processed to select and excite the drive coil to which current should flow. It consisted of a drive circuit that allows current to flow. FIG. 27 is a partially cutaway exploded perspective view showing the configuration of a three-phase, eight-pole, six-coil, plane-opposed flat motor 1, which is a typical example of such a conventional brushless motor, and FIG. FIG. 29 is a timing chart for explaining the operation of each part of this brushless motor drive circuit. In FIGS. 27 and 28,
11 is a stator yoke, 12 is a mouth, a rotor yoke, 13 is an FG magnet provided on the outer periphery of the rotor yoke 12, 14 is a drive magnet (usually 8 poles), and 15 is a position on the stator yoke 11 facing the drive magnet 14. Drive coil (usually 3 phases, 6 coils) installed in 16
17 is a Hall element, 17 is an FG sensor provided on the stator yoke 11 at a position facing the FG magnet 13, 18 is a rotating shaft of the motor, and 19 is a bearing thereof. The drive coil 15 has three phases because two coils (for example, 15a and 15d) facing each other with the rotating shaft 18 in between are connected in series to form one phase.

Next, the configuration and operation of the drive circuit for this motor 1 will be explained with reference to FIGS. 28 and 29. Three Hall elements 16 (16a, 16b).

16C) is located on the stator yoke 11, and the rotating shaft 18
Since they are provided at positions approximately equidistant from each other at a rotational angle of 1200°, position signals corresponding to the magnetic flux of the drive magnet 14 are generated with a phase difference of 120° electrical angle. This position signal is amplified and shaped by differential amplifiers A+ to A3 to become rectangular waveform signals (position signals) as shown in FIGS. 29(A) to 29(C). Subsequently, it is logically processed in the gate circuit G to become a three-phase excitation command voltage (commutation signal) as shown in FIGS. . As a result, an excitation current having a stepped waveform as shown in FIG. 29 LJ) to (L) flows through the drive coil, and the rotor is driven to rotate.

"Problems to be Solved by the Invention" In the conventional brushless motor having such a configuration, the Hall element 16 that generates a position signal is located adjacent to the magnetic pole (for example, directly below it) in order to detect the magnetic flux of the magnetic pole of the drive magnet 14. It is necessary that the space between the 11 poles and the stator yoke 11 accommodates a plurality of drive coils 15a to 15f.
occupies the hall element 16, the drive coil 15 (15b, 15d, 15f and 1
They must be placed in a narrow space near the center of the

In addition, each Hall element 1 [ia to 16c has 2
It has 3 current input terminals and 2 voltage output terminals.
A total of 12 terminals must be wired. In addition, in order to improve performance, the drive coil 15 must be made larger (to improve r44 degrees), and therefore, including space for wiring and extra space for assembly work, the entire motor 1 It ends up being quite large.

On the other hand, in order to reduce the torque ripple of the brushless motor 1 and improve rotation accuracy, it is necessary to increase the number of phases M of the motor, that is, to make the motor multi-phase. However, for this purpose, it is necessary to arrange Hall elements 16 serving as sensors for the number of phases of the motor, and the same number of sensors as the number of phases are required. Therefore, a large amount of space is required for arranging the sensor on the stator yoke 11, etc., and the number of wirings is also quite large (complicated, making it unavoidable to increase the size of the motor.Furthermore, a processing circuit for processing sensor signals is required). However, as the number of sensors increases, motors become more complex, the number of parts increases, the assembly process becomes more complicated, and the reliability of the motor decreases, among other problems.

"Means for Solving the Problems" The brushless motor of the present invention includes: an M-phase (M≧2) drive coil; a stator that sequentially switches and passes an exciting current through the drive coil to generate a rotating magnetic field; A permanent magnet having a driving magnetic pole of P pole (P≧2), a rotor that is rotationally driven by this rotating magnetic field, and a rotation signal generator that generates F rotation signals per rotation according to the rotation of this rotor. A brushless motor comprising a device and a drive circuit that sequentially switches the excitation current 11'111 of the drive coil in response to a start signal of a predetermined frequency during startup and in accordance with this rotation signal during operation, the brushless motor comprising: M, P, F are F-MXPxN (
N>O), and by providing a correction means for correcting the commutation order of the drive circuit, in other words, the Hall element for generating the 5-position signal, which is the cause of the complicated configuration of the conventional motor. By providing a brushless motor with a new configuration, the above-mentioned drawbacks of conventional motors are solved without using the entire heat of the subsequent signal processing circuit.

Embodiment FIG. 1 is a partially cutaway exploded perspective view of a brushless motor 10 using a mark cycle 6, which is a first embodiment of the brushless motor of the present invention. In this figure, parts that are the same as those in the conventional configuration in FIG. 27 are given the same numbers, and detailed explanation thereof will be omitted.

In this embodiment, the motor 10 is used as a spindle motor of a floppy disk drive. This spindle motor 10 has an output shaft (rotating shaft) 18
A floppy disk (not shown) is fixed to a rotor (hereinafter sometimes simply referred to as a "shaft") and driven to rotate, and a rotation reference signal (index signal) is output at a specific rotor position using a method described later. Figure 2 shows this spindle motor (hereinafter sometimes simply referred to as "motor") 1
1 shows a configuration diagram of a drive circuit of No. 0. In this example, in order to facilitate comparison with the conventional brushless motor 1 shown in FIG. 27, the number of poles, the number of phases, and the number of coils are set to be the same.

FG (frequency oscillator) 3 includes an FG magnet 23 and an FG sensor (sometimes referred to as rla sensor J) 2
The FG magnet 23 is arranged and fixed on the outer periphery of the rotor yoke 12, and is magnetized with, for example, 48 poles, as a part of it is shown in FIG. The magnetic sensor 27 detects it as an electrical signal. This FG multiplied signal, as shown in Fig. 4 (A>),
The waveform corresponds to the illustrated magnetization pattern. That is, the N-S duty cycle of the magnetization pattern is about 50%, and only the mark cycle @magnetic is about 27%. This FG double signal, duty discrimination i? when the motor rotates? ! It is input as a clock to the commutation signal generator 33 via J34, and generates a commutation signal. FIG. 5 shows a circuit example of the commutation signal generator 33, which includes three 7-lip-flop circuits FA, FE! , FC has a shift register configuration, and data is shifted from left to right at the rising edge of the clock signal. (Accordingly, even if there is a landmark cycle 6, this only differs in the falling timing, so it does not affect the rotational drive of the motor 10.) Also, it is initialized by a reset input, and then starts in accordance with the clock. The output changes as shown in the truth table in Table 1.

Table 1 Furthermore, with six AND games + to G6, commutation signals XI (=QA-Φc) and Y+ (=Qc ・
Qc), Z + (=i:)^・ΦB>, X2(
-ΦA-Qc), Y2 (-(i6・Qc), Z2<=
Q△・Qo) is obtained. FIGS. 4(B) to 4(J) show that these signals are summarized in the timing chart, and as a result, the driving coils 16x, 16y.

Excitation currents rx, ty, and rz as shown in FIGS. 4(K), (L), and (M) flow through the rotor 16z, and a rotating magnetic field synchronized with the rotation of the rotor 2 is generated. As a result, the driving magnet 14 magnetized into eight poles generates a driving force and rotates about the shaft 18 as the rotation axis.

Note that at startup when the FG multiplier signal is not obtained and the magnetic pole position of the drive magnet 14 is uncertain, the clock signal generated by the startup signal generator 31 is input to the commutation signal generator 33 via the signal switch 32. At this time, a rotating magnetic field corresponding to the activation signal is generated, causing the drive magnet 14 to generate a driving force. At this time, D0: static starting torque, J: inertial load/S: starting clock frequency.

M: number of phases, P: number of poles Next, the starting signal generator 31 and the signal switch 32 will be explained with reference to FIGS. 6 and 7. FIG. 6 is a circuit diagram showing a specific example of the configuration of the activation signal generator 31 and the signal switch 32, and FIG. 7 is a timing chart for explaining the operation of each part of the circuit. Reference numeral 39 denotes an oscillator that oscillates the starting clock signal 10, which oscillates using, for example, a ceramic resonator 41, and supplies the clock signal io shown in FIG.
Since there is no G times signal, the startup clock signal /S whose frequency is divided by 216 as shown in FIG. Supplied to the terminal. Here, since the EX-OR circuit 38 has input/output characteristics as shown in Table 2, the level of the signal Is from the frequency divider 42 is such that the level of the FG times signal F() is H (high level). If so, it is inverted by the EX-OR circuit 38, and if it is L (low level), it is not inverted and is supplied to the next stage commutation signal generator 33, which generates a rotating magnetic field and starts the motor 10 as described above. . When the motor 10 is started and the level of the FG multiplied signal FG changes from L to H, it is differentiated by the capacitor C1 and the resistor R1 of the differentiating circuit 44. A pulse as shown in FIG. 7(D) is generated, shaped by the buffer amplifier B1 into a waveform as shown in FIG. 7(E), and supplied to the reset input terminal of the frequency divider 42. This resets the frequency divider 42, and its output terminal Qold becomes L. This differential pulse is generated every time the FG multiplication signal changes from L to H, so when the FG multiplication frequency IFO and the oscillation frequency (clock signal) IO of the oscillator 39 have a relationship expressed by the 0th equation, Q + a remains L, and E
A non-inverted FG multiplied signal appears on the output side of the X-OR circuit on the third day. (See Figure 7 (B)) 215・f FG > f
o ・・・・・・・・・・・・・・・ ■In the case of this example, when IF() becomes about 19 Hz or more (that is, 48 ppm or more at the motor rotation speed), the commutation signal generator 3
3 is supplied with an FG multiplied signal as shown in FIG. 7(F),
The drive mode is synchronized with the FG (see FIG. 7(C)). When the rotational speed of the motor decreases to 47 ppm or more, Q+a changes and the synchronous drive mode shifts to the startup mode. That is, the mode of operation of the motor 10 is switched as shown in FIG.

Next, in order to obtain torque efficiently, the arrangement of the coil and FG sensor 27 in the stator, the arrangement of the drive magnetic pole and the FGii pole in one rotor, the number of FG pulses per rotation,
A method of correcting the commutation order will be explained with reference to FIG. 9 and subsequent figures.

The torque generated by the motor 10 is equal to the torque generated by the drive coil 15 (1
5x, 15y, 15z) respectively, and the excitation current I (lx) flowing through the coil.

Iy, Iz), so in order to efficiently obtain torque, the phase of this interlinkage flux and the phase of the exciting current
It is important that they match as shown in the figure. That is, when viewed from the phase of the interlinkage magnetic flux, the excitation current (2) commutates every 60' electrical angle. Generally, a brushless motor requires commutation of 2xM times (twice the number of phases) during a rotation angle of 3600 electrical degrees, and therefore, at the input of the commutation signal generator 33, the number of pulses equal to the number of commutations is required. Is required. Since the frequency of the FG multiplied signal can be appropriately divided and input to the commutation signal generator 33, if the frequency division ratio is N, the number of FG pulses F per rotation is F-MXPXN (P is the number of poles). It is necessary that there be. Hereinafter, this embodiment will be explained as N-1.

FIG. 10 is a developed view of the motor 10 of the present invention, showing the FG sensor 27 disposed on the stator (stator yoke 11) and the closest coil 15 (for example, coil 1).
The angle θ2 formed by the center of the rotor (rotor 2), the angle θ1 formed between the FGla pole (1 & pole of the FG magnet 23) arranged on the outer periphery of the rotor (rotor 2), and the drive magnetic pole (the magnetic pole of the drive magnet 14) must be arranged so as to have the relationship expressed by the following equation (3).

(几3 is an integer) Furthermore, the landmark cycle 6 is arranged at a relative angle expressed by the following equation C) with respect to one pole of the drive fjJJi.

(W4 is an integer) The placement position of this mark cycle is an example of one corresponding to a signal processing circuit described below, and may be placed in another position depending on the processing method.

Next, the operation of duty discrimination and commutation order modification will be described with reference to FIGS. 11 and 12. FIG. 11 shows a circuit that performs such an operation, that is, the order correction (
This is an example of a circuit that sends a reset) pulse. In this circuit, N-
The coefficients are set so as to discriminate pulses with an 8 duty ratio of 33% or less. FIG. 12 is a timing chart of commutation order correction operation. To briefly explain the operation of the circuit shown in FIG. 51711 using FIG. 12, the AND gate G1 is connected to the clock signal Io (see FIG. 7 <A>) and the FG double/FQ (see FIG. 12 (A)). ) are input to each input terminal, a logical product operation is performed here, and the output thereof is supplied to the input terminal U of the up/down counter 51. The clock signal 10 is also supplied to the flip-flop circuit FF+, but due to the wiring shown in this figure, this flip-flop circuit FF+ works as a 1/2 frequency divider, so one terminal of the AND gate G2 is supplied with fo.
/2 signal will be supplied. AND gate G
The other terminal of 2 is supplied with a signal fFG which has been inverted by inverter 1, where it is ANDed with the signal fo/2, and its output is up/dOW.
It is supplied to the input terminal d of the n counter 51.

This up/down counter 51 increases the count value when a pulse train is supplied to the input terminal U, and outputs a carry signal from the C terminal when it finally overflows.

When a pulse train is supplied to the input terminal d, the count value is decreased, and when an underflow occurs, a borrow signal is output from the B terminal. Therefore, in this circuit, AND game l, G2
and flip-flop circuit FF1, the FG multiplied signal H
When , a pulse train with a frequency of 10 is supplied to the input terminal U,
A pulse train of the FG multiplied signal L having a cutting frequency of 10/2 is supplied to the input terminal d. Also up/down counter 51
is reset by the differential pulse generated at the rising edge of FG, so the condition for outputting the borrow signal is expressed by the following equation (ω).

, fo TFQ-D TFO(1-D ><Q-・
・・・−・・・(5) However, D: duty, T
FQ: Period of FG signal Calculating this inequality, we get
D<1/3.

That is, if the duty is 1/3 or less, a borrow signal is output. . This borrow signal passes through AND gate G3 and sets flip-flop circuit FF3 if Φ (output level) of flip-flop circuit FF2 is H. The output level on the output terminal Q side of the set flip-flop circuit FF3 becomes H.

On the other hand, the FG multiplied signal inverted by the inverter 11
FO is also supplied to the differentiating circuit 45, and after being differentiated there, it is shaped by the buffer amplifier B2 into a waveform (FG differential pulse) as shown in FIG. supplied to That is, the flip-flop circuit FF3 becomes H due to the borrow pulse as shown in FIG.
(See figure (E)). Therefore, FIG. 12 (B) created by the differentiating circuit 44 and buffer amplifier B1 shown in FIG.
As shown in FIG. 12, among the FG differential pulses, only the pulses generated during this period (while the flip-flop circuit FF3 is H) are outputted from the AND gate G4 (see FIG. 12(F)). By supplying this output pulse to the reset input terminal of the commutation signal generator 33 shown in FIG. 5, it is used as a commutation order correction (reset) pulse. This commutation order correction pulse causes the output signal Q from the Q terminals of the flip-flop circuits FA, Fa, Fc shown in FIG.
A, QB, and QC are those of H level (here, Qa, Qc) as shown in FIG. 12 (G) to (1).
) is reset.

As a result, the excitation current of the coil 16 is reset (first
2(F)), the abnormal torque generated by the coil 160 is corrected and the torque becomes normal as shown in FIG. 12(K). Note that the 0p/down counter 51 is the differential circuit 4.
4 and buffer amplifier B! Since it is reset by the differential pulse created by , no correction pulse is issued until the next borrow signal is issued. These actions modify the commutation order on the rising edge of the cycle following the landmark cycle. However, it goes without saying that when rotating in the correct commutation order, the rotation continues in that order.

The maximum count value of the up/down counter 51 is set sufficiently large so that it will not overflow at a steady rotation speed, but when the rotation speed is low such as during startup, it will overflow and generate an unnecessary signal, so the overflow will not occur. When a carry signal is output, the Noritsu flop circuit FF2 is set and the AND gate G3 stops unnecessary borrow signals to prevent malfunction.

Here, the mechanical configuration of the brushless motor of the present invention will be explained with reference to FIG. 13.

13(A) and 13(B) are plan views showing the arrangement of the drive coils 16x to 16z and the FG sensor 27 that constitute the brushless motor of the first embodiment of the present invention, and the arrangement of the drive magnet 14 and the FG magnet 23, respectively. FIG. 3 is a plan view showing the arrangement of magnetic poles. As can be seen from these figures, the angle θ2 between the EG sensor 27 and the center of the drive coil closest to it (for example, 16x) is 22.56, and the FG magnet 2
The rotation angle θ3 of one magnetic pole of mark cycle 6 is set to 15°, and the rotation angle of the N magnetic pole of mark cycle 6 is set to 4''.

The brushless motor of the first embodiment described above has three phases, eight poles, and six
Next, a second embodiment of the present invention will be described with reference to FIG. 14 and subsequent figures, which is a brushless motor having a five-phase, eight-pole, and five-coil structure with higher performance than this. FIGS. 14(A) and 14(B) respectively show drive coils lea~ constituting the brushless motor of the second embodiment of the present invention.
16e and a plan view showing the arrangement of the FG sensor 27, and a plan view showing the arrangement of the magnetic poles of the drive magnet 14 and the FG magnet 53. FIG. FIG. 15 shows an example of the circuit configuration of the commutation signal generator 33' used in the motor 20. In both figures, the same parts as in the first embodiment shown in FIG. 13 are designated by the same numbers. Therefore, detailed explanation thereof will be omitted.

For a 5-phase motor, the shift register of the commutation signal generator 33' (consisting of five 7-lip-flop circuits FΔ to FE, etc.)
can be easily constructed by arranging them into five stages as shown in FIG. Omitted. Table 3 shows the output Q of each Q output terminal of the flip-flop circuit FA=FE, 8~
It shows the level of QE, that is, the truth table.

As shown in Table 3 and FIG. 14(A), each drive coil 15 has one coil, and five coils 15a to 15e are arranged at equal intervals of a rotation angle of 72 degrees. FG3 has 80 poles of 4o pulses, and the angle θ2 between the FG sensor 27 and the center of the drive coil closest to it (for example, 16a) is 22.5°.
The rotation angle of one magnetic pole of the FG magnet 23 is set to θ3-9°. With this configuration, it is possible to realize a brushless motor with high two-turn accuracy and less torque ripple than that of the first embodiment.

Next, a brushless motor 30 using a missing cycle as a third embodiment of the present invention will be described with reference to FIG. 16 and subsequent figures. The drive coil 15 and the like are of 3-phase 8-pole 6-coil type as in the first embodiment, and the magnetization pattern of the drive magnet 14 is also the same, so please refer to Fig. 1 for the explanation of the mechanism and other details. Regarding the composition of
Components that are the same as those already described in the drawings and the like are given the same reference numerals, and detailed explanation thereof will be omitted. The main difference from the first embodiment is that, as shown in FIG. 17, the magnetization pattern of the FG magnet 43 is different, and a missing cycle 7 is provided in place of the landmark cycle 6 shown in the third diagram.

With this configuration, signal processing is performed according to the basic circuit configuration shown in FIG. That is, the missing cycle detection circuit 21
After detecting the missing cycle in the output signal from FG4 (FG double signal), the correction circuit 22 corrects the missing rising edge of the FG double signal, and this is sent to the clock of the commutation signal generator 33 via the signal switch 32. In addition, the missing cycle detection circuit 21 generates a commutation order correction pulse according to the missing cycle, and supplies this to the reset terminal of the commutation signal generator 33.In this way, the missing cycle Since the method of detecting the FG double signal and the method of correcting the FG double signal are different from the first embodiment, this will be explained in more detail below with reference to FIG. 18 and subsequent figures. FIG. 21 and correction circuit 22), and FIG. 19 is a timing chart for explaining its operation.As shown in FIG. A>) is supplied to AND game 4.Gθ, G9 and inverter 12.The signal whose H and L levels are reversed by inverter I2 is A
The pulse is supplied to the ND gate G5 and the differentiating circuit 46, and the output waveform of the differentiating circuit 46 is further shaped by the buffer amplifier B3 to become an FG differential pulse as shown in FIG. 19(B). On the other hand, the signal to from the oscillator 39 is applied to the frequency divider DI, D.
21D3, and divides the frequency by 4 and 2, respectively.

The frequency is divided by 3 and the AND gate G4. G5. They are respectively input to the other terminals of G8 and are ANDed with the uncorrected FG times signal shown in FIG. 19 (Δ), except for the AND gate G5 which is an inverted signal.

52 and 54 are both up/down counters that are reset by the FG differential pulse shown in FIG. conduct, L
lp/dOWn counter 54 is connected to AND gates G5 and G
A correction pulse is generated based on the state of the output signal of No. 4. u
The BORO-1 signal (pulse; see FIG. 19(C)) from the p/down counter 52 is supplied to the AND gate G8, where it is ANDed with the Φ output signal from the flip-flop circuit FF5. flip-flop circuit FF
4 (that is, the flip-flop circuit FF4 is reset by one borrow pulse). Moreover, this flip-flop circuit FFa receives the BORO-2 signal (pulse; FIG. 19 (D) from the up/down counter 54.
)), resulting in an output waveform as shown in FIG. 19(E). The logical product of the Q output signal of the flip-flop circuit FF4 and the above-mentioned uncorrected FG multiplied signal becomes the corrected FG multiplied signal with the rising edge corrected as shown in FIG. 19(F).

With the circuit configuration shown in FIG. 18, the borrow signal from the up/down counter 52 is transmitted for a time T2, which is 3/2 times the half period T+ immediately before the missing cycle, in the case of a missing cycle start violation.
The boro-2 signal from the up/down counter 54 is generated at the timing signal T! of the half period immediately before the missing cycle in the case of starting a missing cycle. twice the time T
Occurs with the timing signal of 3 (Fig. 19 (△>, (C
), (see (D)).

That is, a borrow signal is generated at the time when there should originally be a rising edge, and this signal becomes a positive pulse in the commutation order. Note that the up/down counter 54
The BORO-2 signal from FF5 and the Ω output signal from flip-flop circuit FF5 are also supplied to AND game 7, where they are subjected to a logical product operation and are supplied to the reset input terminal R of the commutation signal generator 33. . Next, as a fourth embodiment of the present invention, a brushless motor 40 using an index pulse as a correction means will be described with reference to FIGS. 20 onwards. Note that the drive coil 65 and drive magnet 64
The magnetization pattern, etc. will be explained using the same 3-phase 8-pole 6-coil as in the first embodiment, and other configurations will be explained in the second embodiment.
Components that are the same as those already described in the drawings and the like are given the same reference numerals, and detailed explanation thereof will be omitted. FIG. 20 is an exploded perspective view of a motor according to a fourth embodiment of the present invention. In this diagram,
61 is a stator yoke, 62 is a rotor yoke, 63 is an FG magnet formed on the lower surface of the outer edge of the rotor yoke 62, 64 is a drive magnet, 65 is a drive coil, 66 is an outside of the drive coil 65 on the stator yoke 61 and an FG magnet.
This is an FG pattern coil formed at a position facing the magnet 63. The above mechanical configuration is substantially the same as the first and third embodiments described above, but in order to generate an index pulse for the correction means, an index magnet 8 is attached to a part of the outer edge of the rotor yoke 62, and this Stator yoke 61 facing index magnet 8
The difference is that an index sensor 67 is installed at a predetermined position on the top. This index sensor 67 uses, for example, an IC containing a Hall element (Hall IC>, etc.).The FG magnet 63 has a plurality of NS magnetic poles arranged at equal intervals, and the magnetic flux generated here creates an FG pattern. FG5 is formed by exciting a galvanic current in the coil 66.

Signal processing of the motor of the fourth embodiment having such a configuration will be explained with reference to FIGS. 21 and 22. Figure 21 shows the main part of the drive circuit for this motor (correction signal generation circuit)
, FIG. 22 is a timing chart for explaining the operation of this circuit.

As shown in FIG. 21, the index pulse as shown in FIG. 22 (0) from the index sensor 67 becomes a differentiated waveform as it passes through the differentiation circuit 47, and is further shaped by the buffer amplifier B4 as shown in FIG. 22 (0). The index differential pulse shown in E) is supplied to the set input terminal S of the flip-flop circuit FFs. On the other hand, the FG multiplied signal as shown in FIG. 22(A) is supplied from the FG5 to the differentiating circuit 49, where it becomes a differentiated waveform and is further shaped by the buffer amplifier B6 to form the F as shown in FIG. 22(B).
It becomes a differential pulse on the G-interval and is supplied to one input terminal of AND game +o. Furthermore, since the differential circuit 48 is supplied with the FG signal after being inverted by the FG double signal inverter 13, the FG falling differential pulse waveform further shaped by the buffer 1-amplifier B5 becomes the FG signal as shown in FIG. 22(C).
A pulse whose phase is shifted by approximately 180° from the intervening differential pulse is supplied to the reset input terminal R of the flip-flop circuit FFo. In this circuit configuration, the Q output of the flip-flop circuit FFa is hit by the differential pulse of the rising edge of the index signal, and is reset by the differential pulse of the falling edge of the index signal (2nd
(See Figure 2 (F)). The logical product of this Ω output signal and the rising edge of the FG multiplied signal becomes a commutation order correction pulse signal (see FIG. 22 (G)), which is output from the AND game +o and supplied to the commutation signal generator 33. That's why.

Instead of the index pulse in the fourth embodiment described above, the drive magnetic pole (the magnetic pole of the drive magnet 64) is detected by a Hall IC (not shown) to generate a magnetic pole signal,
By inputting this signal, the commutation order may be corrected according to the drive magnetic pole. As a specific configuration, instead of providing the index pulse generation mechanism using the index magnet 8 and the index sensor 67 in FIG. 20, the index sensor 6
7 at a location facing the drive magnet 64, and divides the output signal from the index sensor 67 (in the case of 8 poles, divides the frequency by 4) to generate one pulse per rotation of the rotor 2. As long as this is done, the other circuit configurations can be made by using the corrected signal generation circuit shown in FIG. 21, so a detailed explanation of this embodiment will be omitted.

In this way, the motor according to the present invention can be made smaller by controlling the speed according to the above-mentioned FG multiplication signal.

This provides a motor having a speed tIj control mechanism that is inexpensive and highly reliable. In particular, by controlling the speed of the to-fold signal from the oscillator 39 using the ceramic oscillator 41 for the starting signal generator as a reference clock, the ceramic oscillator 41 can be used without increasing the number of parts.
The rotation speed accuracy equivalent to the oscillation accuracy of No. 1 can be obtained, and the economic ripple effect is also large. It should be noted that the motors (10, 20, 30, 40) of each of the embodiments described above may be further provided with means for increasing the rotational speed υJIIl. FIG. 23 shows an example of the circuit configuration of the speed υj control section 50, which is a means for controlling the rotational speed, in which the clock signal to from the oscillator 39 is divided by 5120 to obtain a reference frequency signal of 120th.
A phase comparison circuit 55 compares the phases of the FG multiplied signals, and a phase correction amplifier circuit 56 applies phase correction to the output thereof, amplifies it as appropriate, and applies it to the base of the control transistor Tr1. In this case, the motor (10, 20, 30, 40) is 30
Rotates at a constant speed of 0rpHl.

a3. In the above explanation, we have only talked about 3-phase and 5-phase regarding the drive coil 15.65, but,
Without being limited to these, for example, 7 as shown in FIG.
A phase or nine-phase coil arrangement may also be used. In this figure, (A) shows 8 poles and 7 phases.

The figure (B) shows an example of 10 poles and 7 phases. In the case of these 7 phases,
Phase order G, t of each coil in the coil arrangement as shown
T-+U-+V→W4X-+Y4Z-+Tt45, the angle between adjacent coils is approximately 51.43°. Also,
The figure (C) shows an example of 10 poles and 9 phases, and the figure (D) shows an example of 14 poles and 9 phases. In the case of these 9 phases, the phase order of each coil in the coil arrangement as shown is R-+S→D→U→V→W→X→Y
→2→R, and the angle between adjacent coils is 40''.In addition, in the coil arrangement examples in Figures (A) to (D),
The angle θ2 between the FG sensor 27 and the center of the drive coil closest to it is 22.5°, 18', and 1, respectively.
8°, 12.86°.

The relationship between the number of phases of the drive coil (15, 65, etc.) and the torque ripple is as shown in Table 4, and when this is graphed, it becomes as shown in FIG. 25.

In this figure, the horizontal axis is the number of phases, and the vertical axis is torque ripple (%). As can be seen from this figure, the torque ripple decreases in approximately inverse proportion to the number of phases, and as a result, rotation accuracy improves. On the other hand, in conventional brushless motors, as the number of phases increases, the number of coils and the wiring and signal processing circuit configurations become more complex, requiring more space and increasing costs. In reality, I had to settle for 2-4 phases with a lot of torque ripple. However, since the brushless motor of the present invention is configured as described above, even if the drive coil etc. are configured with 5-phase, 7-phase, 9-phase, etc. with less torque ripple, it can be realized with a relatively simple configuration. Therefore, conventional multi-phase contact motors (brush-equipped L-
Requires high rotational accuracy, which was previously only possible with
It is now possible to apply a brushless motor to the M device, and the R device as a whole can be made smaller by downsizing the motor without reducing the reliability and accuracy of the device.

Furthermore, in the above explanation, [G magnet (2
3,43,53,63) with driving magnet 1-14.64
Although the description has been made assuming that the FG1i pole 73 is arranged separately from the drive magnet 74, the present invention is not limited to this. For example, the FG1i pole 73 may be arranged on the outer peripheral surface of the drive magnet 74 as shown in FIG.
(The G sensor 77 is naturally mounted opposite the FG magnetic pole 73), or the FG1a pole 83 may be arranged on the end face of the drive magnet 84 as shown in FIGS. 26(B) and 26(C) (in this case, The FG sensors 87 are mounted facing upward and downward, respectively). In this case, the cost can be further reduced than in each of the embodiments described above.

The drive circuit component of the brushless motor of the present invention configured in this way is suitable for conversion to IC, and when converted to IC, it can be stored in an even smaller space, and it also reduces the number of parts and simplifies the assembly process. As a result, reliability is improved.

Furthermore, it is also possible to incorporate the speed control section into an IC, and in this case, a greater space advantage and economical effect occur.

Furthermore, when the brushless motor of the present invention is applied to a floppy disk drive device, the commutation order correction pulse can be used as a so-called index signal to control data reading and writing (self-reading), and furthermore, it can be used as a so-called index signal for controlling data reading and writing (self-reading). When applied to a drum drive motor,
Similarly, it is also possible to use the commutation order modification as a pu multiplication signal for switching the pulse head. Even in these cases, the number of parts can be reduced compared to current models that use conventional motors, making the equipment smaller and more reliable, and it also has significant economic ripple effects such as cost reduction.

"Effects" Since the brushless motor of the present invention is configured as detailed above, there is no need for space for position detection elements such as Hall elements as in conventional brushless motors, and there is no need for wiring. , reduce the number of parts 9,
Therefore, the number of assembly steps can be reduced, which improves the reliability of the motor, contributes to miniaturization, and can be realized at low cost.Especially, these features can be further demonstrated in polyphase motors with less torque ripple, and it can be easily integrated into ICs. It has various features such as being able to be realized.

[Brief explanation of drawings]

FIG. 1 shows a first embodiment of the brushless motor of the present invention, and is a partially cutaway exploded perspective view of the brushless motor using a certain mark cycle, FIG. 2 is a diagram showing the configuration of a spindle motor drive circuit, and FIG. The figure shows the magnetic pattern of the FG magnet, Figure 4 is the FG double signal waveform diagram, Figure 5 is the circuit diagram of the commutation signal generator, and Figure 6 is the specific details of the starting signal generator and signal switch. A circuit diagram showing a configuration example, FIG. 7 is a timing chart for explaining the operation of each part of the circuit, FIG. 8 is a diagram showing mode switching operation with respect to the rotational speed of the motor,
Figure 9 shows the magnetic flux interlinking with the drive coil. A waveform diagram showing the relationship between the excitation current flowing through the drive coil and the torque generated in the drive coil, FIG. 10 is a developed view of the motor of the present invention, and FIG. 11 is a configuration example of a duty discrimination/commutation order correction circuit. FIG. 12 is a timing chart of the commutation order correction operation, and FIGS. 13(A) and 13(B) are the driving coils and F of the brushless motor of the first embodiment of the present invention.
A plan view showing the arrangement of the G sensor and a plan view showing the arrangement of the magnetic poles of the drive magnet and the FG magnet, Fig. 14 (
A) and (B) are respectively a plan view showing the arrangement of the drive coil and the FG sensor constituting the brushless motor of the second embodiment of the present invention, and a plan view showing the arrangement of the magnetic poles of the drive magnet and the FG magnet. The figure is a circuit diagram of a five-phase commutation signal generator, Figure 16 is a circuit diagram of a brushless motor using a missing cycle, which is a third embodiment of the brushless motor of the present invention, and Figure 17 is a circuit diagram of a brushless motor using a missing cycle. magnetic pattern,
FIG. 18 is a circuit diagram of one configuration example of the missing detection correction circuit, and FIG.
20 is an exploded perspective view of a fourth embodiment of the present invention in which an index pulse is used as the correction means. FIG. 21 is a timing chart showing the operation of the missing detection correction circuit. Fig. 22 is a timing chart for explaining its operation, Fig. 23 is a circuit configuration diagram of the speed control section, Fig. 24 is an example of arrangement of 7-phase and 9-phase coils,
Figure 5 is a graph showing the relationship between phase number and torque ripple.
6(A) to (C) are perspective views showing modified examples of FG in which FG magnetic poles are arranged on the outer peripheral surface or end surface of the drive magnet, and FIG. 27 is a partially cutaway exploded perspective view of a conventional brushless motor. Figure 28 is a conventional brushless motor drive circuit diagram.
FIG. 29 is a timing chart for explaining the operation of each part of the drive circuit. 2... Rotor, 3~5-FG (Freque
cy Gen-erator), 5... Marker cycle, 7... Missing cycle, 8... Index magnet, 10.20.30°40... Brushless (spindle) motor, 11°61... Stator Yoke, 12.62...Rotor yoke, 14, 64, 74
．． 84... Drive magnet, 15.65... Drive coil, 16... Hall element, 17.77.87...
FG sensor, 18... Rotating shaft, 19... Bearing, 2
1... Missing cycle detection circuit, 22... Correction circuit,
23,43.53.63...FG magnet, 27.
...Magnetic sensor, 31...Start signal generator, 32.
...Signal switch, 33...Commutation signal generator, 3rd...
・EX-OR circuit, 39... Generator, 41... Ceramic resonator, 42... Frequency divider, 44-49... Differential circuit, 50... Speed control section, 5
1゜52, 54- up/down counter, 55
--- Phase comparator circuit, 56 --- Phase correction amplifier circuit, 6
6...FG pattern coil, 67...Index sensor -173°83...FG11 pole, B1-B3.
...Buffer amplifier, D1-D3...Frequency divider, FA
~FE, FFI~FF6...Flip-flop circuit,
G1~G +o...AND gate, ■1~■3...
Inverter, Tr7...transistor. T 4th day 75th day tA)
(8) 72 Jiji (C) Hatake-2 no ri] /Ne? 271

Claims (6)

[Claims] (1) An M-phase drive coil (M is an integer of 2 or more), a stator that generates a rotating magnetic field by sequentially switching the excitation current through the drive coil, and a P pole (P is an integer of 2 or more). a permanent magnet having driving magnetic poles, a rotor rotationally driven by the rotating magnetic field, and a rotation signal generating device that generates F rotation signals per rotation according to the rotation of the rotor;
The brushless motor is equipped with a drive circuit that sequentially switches the excitation current of the drive coil according to a start signal of a predetermined frequency during startup and according to the rotation signal during operation, (number of driving magnetic poles), F (number of rotational signals generated per rotation) is F=M×P
×N (N is a positive integer), and further comprising a correction means for correcting the commutation order of the drive circuit. (2) The correction means is a patent in which the rotation signal has at least one mark cycle in which a one-cycle pulse has a different duty from other pulses, and the commutation order of the drive circuit is corrected according to the mark cycle. A brushless motor according to claim 1. (3) Claims in which the correction means has at least one missing cycle in which the rotation signal is missing one cycle of pulses, and corrects the commutation order of the drive circuit in accordance with the missing cycle. The brushless motor described in item 1. (4) The correction means includes an index pulse generator that generates at least one index pulse per rotation in accordance with the rotation of the rotor, and corrects the commutation order of the drive circuit in accordance with the index pulse. A brushless motor according to claim 1. (5) The modification means is provided with a magnetic pole signal generator that generates a magnetic pole signal according to the driving magnetic pole, and the commutation order of the driving circuit is modified according to the magnetic pole signal. brushless motor. (6) The brushless motor according to any one of claims 1 to 5, wherein the rotation of the motor is controlled in accordance with a rotation signal from a rotation signal generator.