JPS62169585A - Horizontal synchronizing circuit - Google Patents

Abstract

PURPOSE:To reduce the circuit component and to improve the noise immunity by providing a tri-state gate circuit in a horizontal synchronizing circuit of a television equipment so as to allow the tri-state gate circuit to apply phase comparison. CONSTITUTION:The tri-state gate circuit 13 compares the phase of a horizontal synchronizing pulse generated by a frequency divider 16 with that of a horizontal synchronizing signal and given the phase comparison output to a low pass filter 44. A phase difference signal filtered by a low pass filter 14 controls the oscillation frequency of a voltage controlled oscillator 15. The tri-state gate circuit applies the phase comparison, and the feature of the phase comparison operation, no phase comparison is applied while the tri-state gate circuit is not in operation. That is, the phase comparison is independently of the noise included in the synchronizing signal 52. Thus, the comparison output 53 is hardly affected by the noise included in the synchronizing signal and stable synchronizing state is kept as a PLL.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a horizontal synchronization circuit for use in television equipment, particularly television receivers.

[Summary of the invention]

The present invention aims at reducing the number of circuit elements and improving noise resistance by having a 3-state gate circuit perform the phase comparison operation in a horizontal synchronization circuit for television equipment.

[Conventional technology]

In television receivers, it is necessary to synchronize the receiver with the timing of video signal transmission on the sending side, so a horizontal synchronization signal is extracted from the composite video signal and used as a reference signal for horizontal and vertical scanning. has a pulse width of about 5 μS and is relatively susceptible to noise, so
A phase-locked loop (PLL) is employed in the horizontal synchronization circuit and is used as its reference signal.

The PLL portion of this horizontal synchronization circuit is usually integrated with other logic circuit portions, and FIG. 2 shows an example of a phase comparator which is an important element in the l'LL portion.

[Problem that the invention seeks to solve]

As shown in FIG. 3, the phase comparator in the prior art described above operates only based on the phase difference between the change point (falling part) of the reference signal R and the compared signal V, so it has a poor ability to discriminate between noise and synchronization signals. The drawback was that there was no

This is because if narrow pulse noise is mixed into a portion where there is no original horizontal synchronization signal, the trailing edge of the pulse will cause the phase comparison operation to be performed in the same way as in the original horizontal synchronization signal portion.

Furthermore, since the circuit configuration is a combination of a large number of gates, the number of elements increases, and the delay time difference between each gate needs to be appropriately distributed, making the design difficult.

Therefore, the present invention was proposed to solve these problems, and its purpose is to provide a phase comparator that is not affected by noise and that is easy to design with a small number of elements. By employing this method, the objective is to provide a horizontal synchronization circuit that is simple and has high noise rejection ability.

[Means for solving problems]

The horizontal synchronization circuit of the present invention is used in α) a horizontal synchronization circuit of television equipment; b)! I
- a state gate circuit; C) a sync separation circuit for supplying a horizontal synchronization signal to the signal input terminal of said 3-state gate circuit; and d) a low pass for integrating the output signal of said 3-state gate circuit. g) a voltage-controlled oscillator controlled by the output signal of the low-pass filter; f) forming a pulse signal having a pulse width equal to or less than the horizontal synchronization signal from the output signal of the voltage-controlled oscillator;
- comprising means for forming a signal to be supplied to the control input terminal of the state gate circuit;

[Effect]

According to the above configuration of the present invention, the phase comparator has a simple structure consisting of only a 3-state gate circuit, and its phase comparison operation is performed only during the period of a narrow pulse signal generated from the output of the voltage controlled oscillator. Therefore, noise that is not in the vicinity of the horizontal synchronization signal is eliminated.

〔Example〕

Hereinafter, the present invention will be described in detail based on examples.

FIG. 1 is a block diagram of a horizontal synchronization circuit according to the present invention, and FIG. 4 is an embodiment of the vicinity of a phase comparator.

In FIG. 1, a horizontal synchronization signal is separated by a synchronization separation circuit (1) from a composite video signal input to a video signal input terminal (11), and a 6-state gate circuit (11)
3) Supply it as the same reference signal.

The 3-state start circuit (13) is connected to the frequency divider (16
) is supplied to the horizontal synchronization filter (44).

The phase difference signal filtered by the low pass filter (14) controls the oscillation frequency of the voltage controlled oscillator (15).

The divider (16) divides the output of the voltage controlled oscillator (15) and outputs a timing signal group necessary for the television equipment to the timing signal output terminal (17).

In addition, the branch divider (16) is a 3-state gate circuit (
13), a compared signal is also output, but its period is the horizontal period, and its pulse width is equal to or less than the horizontal synchronizing signal.

Figure 4 shows the synchronous separation circuit (12), 3-state contention gate circuit (13), and low-pass filter (14) in Figure 1.
This is a specific example.

A synchronous negative composite video signal is applied to the video signal input terminal (41), is synchronously separated by the amplitude separation transistor (42), and becomes a negative synchronous signal through the inverter (43), which becomes the 3-state gate compared signal. The input terminal (46) receives the signal to be compared from the branch divider (16), and is supplied to the control input terminal (45) of the 6-state gate circuit.

A low pass filter is connected to the output terminal (47) of the 3-state gate circuit.

FIG. 5 shows the input/output relationship of this 3-state gate circuit. However, it is in a synchronous state.

The compared signal (52) from the dividing period (16) controls the 3-state gate circuit, and when the compared signal (52) is at H level, a negative synchronizing signal which is the reference signal (51) is taken in.

The level of the synchronization signal during the period when the 3-state gate circuit is active is the comparison output (53).

During the period when the 3-state gate circuit is inactive, that is, during the period when the compared signal (52) is at L level, the potential held in the low-pass filter becomes the potential of the comparison output (53).

In order to obtain a synchronized state such as No. 52, the control characteristics of the voltage controlled oscillator (15) must have the characteristics shown in FIG.

FIG. 7 shows an example of a 3-state gate circuit with an 0MO3 structure. In this example, the gate circuit is an inverter, which is the same as what is commonly called a clocked gate.

As mentioned above, the 3-state gate circuit performs the phase comparison operation shown in FIG. 5, but the feature of this phase comparison operation is that the 3-state gate circuit does not perform the phase comparison operation while it is inactive. .

In other words, it is not affected by noise contained in the synchronization signal (reference signal (52)).

Also, even during the period when the 3-state gate circuit is active, the pulse width of the noise pulse is usually one of the pulse width of the horizontal synchronization signal.
Since the noise is sufficiently small compared to /2, the noise does not have a large effect on the comparison output (53).

From these facts, it can be seen that the comparison output (53) is not affected by the noise contained in the synchronization signal, and therefore, a stable synchronization state is maintained even as a PLL.

For the best phase comparison operation of the present invention, there is an optimum value for the compared signal (52), ie, the active period of the 3-state gate circuit.

As can be seen from Figure 5, the range in which phase comparison is performed is when the maximum phase difference is up to ±1 times the pulse width of the horizontal synchronizing signal, and at this time, the pulse width of the compared signal is equal to that of the horizontal synchronizing signal. It is necessary that

If it is less than that, the tracking range will become narrower and the influence of noise will increase.

On the other hand, if it exceeds this, a stable synchronization state is no longer guaranteed.

〔Effect of the invention〕

As described above, according to the present invention, the phase comparator can be configured with a 3-state gate circuit, so the number of required elements is reduced to 1/8 or less of the conventional one, simplifying the horizontal synchronization circuit and improving reliability. do.

Furthermore, due to its good noise resistance, it has the effect of improving the synchronization performance of television equipment.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the horizontal synchronization circuit of the present invention, FIG. 2 is a conventional phase comparator circuit diagram, FIG. 3 is an operation timing diagram thereof, and FIG. 4 is a circuit diagram around the phase comparator of the present invention. FIG. 5 is an operation timing diagram of the phase comparator, FIG. 6 is a control characteristic diagram of the voltage controlled oscillator, and FIG. 7 is an example of a 3-state gate circuit diagram. (11)...Video signal input terminal (12)...Sync separation circuit (13)...3-state gate circuit (14)...
・Low pass filter (15)...Voltage controlled oscillator (16)...Buncher (17)...Timing signal output terminal (21)...
Reference signal input terminal (22)...compared signal input terminal (23)@(24)...output terminals U, D (41)...
・Video signal input terminal (42)...Amplitude separation transistor (45)...
Inverter (44)...Signal input terminal (45)...Control input terminal (46)...Compared signal input terminal (47)...Output terminal (48)...Comparison output terminal (49) ...3-state gate (51)...Reference signal (52-n...Compared signal (53)...Comparison output signal (71)...Control input terminal (72-n...Signal Input terminal (73)...Output terminal or higher Applicant Seiko Exon Co., Ltd. +3.'3-Stay 1・γ-Tobi 76 14.12-Tsum 7L7At letter +s-ehLsuWFr#&@-b・') 升1-a 71 (乎161Xian times 1 do, BU0.7) solid 1st ward go 〉 S meeting (< ＞S Ω'+1 和语M Sheng) 艙蜞ρ巳μki Fig. 4) 71
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Claims (1)

[Claims] a) In a horizontal synchronization circuit of television equipment b) 3-
a state gate circuit; c) a sync separation circuit that supplies a horizontal synchronization signal to a signal input terminal of the 3-state gate circuit; and d) a low-pass filter for integrating the output signal of the 3-state gate circuit. and e) a voltage controlled oscillator controlled by the output signal of the low-pass filter; and f) forming a pulse signal having a pulse width equal to or less than the horizontal synchronizing signal from the output signal of the voltage controlled oscillator, and
- A horizontal synchronization circuit, characterized in that it comprises means for forming a signal to be supplied to the control input terminal of the state gate circuit.