JPS62169463A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS62169463A
JPS62169463A JP61010082A JP1008286A JPS62169463A JP S62169463 A JPS62169463 A JP S62169463A JP 61010082 A JP61010082 A JP 61010082A JP 1008286 A JP1008286 A JP 1008286A JP S62169463 A JPS62169463 A JP S62169463A
Authority
JP
Japan
Prior art keywords
semiconductor chip
bonding pads
semiconductor
outer periphery
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61010082A
Other languages
English (en)
Inventor
Kazuhiko Kuri
九里　和彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP61010082A priority Critical patent/JPS62169463A/ja
Publication of JPS62169463A publication Critical patent/JPS62169463A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 し産業上の利用分野〕 不発明は、半導体集積回路（以−ドにおいてＩｃという
）−ｉ９の半導体装置に関するものであり、特に接続端
子数の多いＬＳＩなどに通用して有効な技術に関する。
Ｌ従来の技術〕 丁Ｃ′ＩＣは、半導体チップの一側面、換言すれば表面
の外周部に複数のボンディングパッドを環状に配直し、
上記ボンディングバントとインナーリードと？：Ａｕ線
でボンディングした構造のものがある。
上記ボンディング構造については、「入門ＩＣセミナー
」（昭和４９年４月１日第７刷発行、発行所ＣＱ出版社
、９１１６図９・１５）に示されている。
本発明者は、上記ボンディング技術てついて検討した。
その結果、下記の如き問題点が明らかになった。
〔発明が解決しようとする問題点〕
すなわち、半導体チップの一側面の外周部にのみボンデ
ィングパッドを配置すると、パッド数が増大した場合に
、チップサイズがチップに形成される素子数よりもパッ
ド数で決定されるようになる。特にＬＳＩの如ざ接続端
子数が犬のＩＣＫは、上記問題点のため、チップサイズ
の小型化に限界があった。
不発明の目的は、半導体チップに配置されるボンディン
グパッド数を増大せしめて、半導体チップの小型化を図
ることのできる半導体装置？提供することにある。
本発明の上記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付肉面から明らかになるであろう
。
〔問題点を解決するための手段〕
本願において開示される発明のうちの代表的なものの概
要を簡単に述べれば、下記の通りである。
すなわち、半導体チップの一側面の外周部に複数のボン
ディングパッドを配置し、更にその内側にもボンディン
グパッドを配置するものである。
〔作用〕
上記した手段によれば、半導体テクノの一側面に多数の
ボンディングパッドを配置し得るので、半導体テップ馨
大型にすることなく、多数の接続端子を設ける事かでざ
る等により、半導体装ｆｆ１Ｙ小型化するという本発明
の目的を達成するものである。
し実施例−１〕 以下、第１図及び第２図を参照して本発明？：適用した
半導体装置の第１実施例を説明する。なお、第１図はボ
ンディングパッドの配置を示す半導体テクノの平面図、
第２図はＩＣの要部の断面図を示すものである。
本実施例の特徴は、半導体チップの外周部とその内部と
にほぼ環状に複数列のボンディングパッドを配置したこ
とにある。
１は半導体チップであり、その表面の外周部には複数の
ボンディングパッド２が環状に形成されている。また、
表面の内部には、複数のボンディングパッド３が環状に
形成されている。
上記構造によれば、従来構造に比較してボンディングパ
ッド３が付加されたことになる。
第２図は、上記半導体チップ１？：セラミックパッケー
ジ１１に封止した場合の一例を示すものである。
半導体テップ１は、セラミックパッケージ１１に接着さ
れ、接ｖｃ端子１２の一端と上記ボンディングパッド２
．３とは、Ａｕ１ｆｓ１３によりボンディングされてい
る。
なお、１４はキャップであり、セラミックパッケージ１
１に接着されている。そして半導体チップ１の周囲は中
空になされている。
１、半導体チップの表面の外周部に複数のボンディング
パッドヲ環状に形成し、更にその内部に複数のボンディ
ングパッドを形成することにより、限られた面積の半導
体チップ上に多数のボンディングパッドを形成すること
ができるという作用で、半導体チップを小型化すへとい
う効果が得られる。
２、上記内部にボンディングパッドを形成することによ
り、半導体チップの内部に形成された半導体素子のアル
ミ配線を半導体チップの外周部まで引出す必要がなく、
半導体チップに形成される回路のレイアウトが容易にな
る、という効果が得られる。
３、上記１により、半導体チップの大きさを回路構成に
よって決定し得る、という効果が得られる。
４、上記１〜３により、ゲートアレイ等の大規模な多ピ
ンＬＳＩにおい１半導体チップサイズの縮小が可能にな
り、多機能、高集積度化が容易になる、という効果が得
られる。
〔実施例−２〕 次に、本発明の第２実施例を第３図を参照して説明する
。
なお、不実施例と第１実施例との相違点は、ＩＣの接Ｍ
Ｅ子を２列に形成したことにあり、上記第１実施例と同
一の部分には同一の符号を付し、説明の重複を避けるも
のとする。
すなわち、１５は接続端子であり、その一端にはボンデ
ィングパッド３がＡｕ線１３によって接続される。
上記構造によれば、接続端子間を所望の距離にし、かつ
ボンディングパッド数を更に増大することができるので
、特に多数の接続端子を必要とするＬＳＩ等に好適であ
る。
以上に、本発明者によってなされた発明を実施例にもと
づき具体的に説明したが、本発明は上記実施例に限定さ
れるものではなく、その要旨を逸脱しない範囲で種々変
形可能であることはいうまでもない。
例えば、上記各実施例では本発明を適用した半導体チッ
プはセラミックパッケージに封止したが、これに限定さ
れることなく、プラスチックパッケージに封止すること
もできる。
以上の説明では、主として本発明者によってなされた発
明をその背景となった利用分野であるセラミックバクケ
ージのＩＣに適用した場合について説明したが、それに
限定されるものではなく、多数の接続端子な心構とする
各種ＩＣに広く利用することができる。
〔発明の効果） 本願において開示される発明のうち代表的なものによっ
て得られる効果を簡単に説明すれば、下記のとおりであ
る。
すなわち、半導体チップの表面の外周部とその内部とに
複数列のボンディングパッドを形成することにより、半
導体チップサイズを大きくすることなく、多数の外部接
続を行うものである。
【図面の簡単な説明】
第１図は本発明の第１実施例を示す半導体チップの平面
図、 第２図は上記半導体チップを封止したＩＣの要部の断面
図、 第３図は不発明の第２実施例を示すＩＣの要部の断面図
を示すものである。 １・・・半導体チップ、２．３・・・ボンディングパノ
ド、１１・・・セラミックパッケージ、１２．１５・・
・接続端子、１３・・・Ａｕ線、１４・・・キャップ。

Claims (1)

    【特許請求の範囲】
  1. １、半導体チップの一側面の外周部に実質的に環状に配
    置された複数のボンディングパッド列を配置するととも
    に、上記ボンディングパッド列の内部にもボンディング
    パッドを配置し、上記一側面に形成されるボンディング
    パッド数を増大せしめたことを特徴とする半導体装置。
JP61010082A 1986-01-22 1986-01-22 半導体装置 Pending JPS62169463A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61010082A JPS62169463A (ja) 1986-01-22 1986-01-22 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61010082A JPS62169463A (ja) 1986-01-22 1986-01-22 半導体装置

Publications (1)

Publication Number Publication Date
JPS62169463A true JPS62169463A (ja) 1987-07-25

Family

ID=11740425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61010082A Pending JPS62169463A (ja) 1986-01-22 1986-01-22 半導体装置

Country Status (1)

Country Link
JP (1) JPS62169463A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05202467A (ja) * 1992-01-28 1993-08-10 Stanley Electric Co Ltd 真空蒸着装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05202467A (ja) * 1992-01-28 1993-08-10 Stanley Electric Co Ltd 真空蒸着装置

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