JPS6216565A - Solid-state image pickup element - Google Patents

Abstract

PURPOSE:To effectively collect the photoelectric charge by a method wherein a photoelectric conversion section having a photoconductive film is laminated on a lateral SIT, the generated photoelectric charge is transferred to under the gate of the SIT through a transfer gate, Schottkey barrior or a transfer section having a very thin insulation film so as to widen the opening ratio. CONSTITUTION:When light enters, the light does not reach a substrate side and the light absorption is largely performed in a light conductive film 50 since a collection electrode 52 also acts as a light shield film. Of the pair of electron - hole produced in the depleted photoconductive film 50, the hole escapes to a transparent electrode 51, and the electron is drawn to the substrate side and stored in the photoelectric charge storage layer 37. The reading is performed by applying positive voltage to the transfer gate 39 to transfer the electron 61 stored in the photoelectric charge storage layer 37 to under the reading gate 40, and by applying positive voltage lower than that at the time of the storage of the photoelectric charge to the gate 40.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a solid-state image sensor.

[Conventional technology]

Conventionally, CCD type and MO8 type solid-state image sensors have been put into practical use as solid-state image sensors for video cameras and electronic still cameras. Although these use a CCD or MOS transistor in the scanning circuit, the photoelectric charge accumulated in the photoelectric conversion section is still directly extracted as a signal output.

On the other hand, due to advances in semiconductor manufacturing equipment, it is now possible to
It has become relatively easy to obtain pattern dimensions of 0.2 to 0.3 .mu.m, and alignment accuracy of 0.2 to 0.3 .mu.m, and the technical prospects for manufacturing miniaturized elements are becoming brighter. In addition, there is a strong demand for higher quality solid-state imaging devices, and there is a strong desire to realize highly integrated solid-state imaging devices configured with miniaturized cells. Under these circumstances, the trend of element miniaturization is due to technological and
This is likely to be driven by demand.

However, as mentioned earlier, in the current CCD type and MO8 type systems that directly read out photocharges as signals, when the light receiving cell is miniaturized, the amount of signal charge decreases due to the reduction in the area of the photoelectric conversion region. The problem of N deterioration arises.

As a solution to this problem, an SIT image sensor, which is an active solid-state image sensor having an amplification function in the light receiving element itself, has been proposed.

SIT image sensors accumulate photocharges like a -H gate, and the resulting change in gate potential injects charges from the source to the channel, making it possible to obtain a large output current corresponding to the amount of photocharges. .

Such SIT image sensors include those that use a vertical SIT, in which the source and drain are arranged in the depth direction of the semiconductor substrate, and current flows perpendicularly to the substrate, and those that use a vertical SIT, in which the source and drain are arranged in parallel to the substrate surface, and the current flows perpendicularly to the substrate surface. There is one that uses a horizontal SIT that flows in parallel.

Among these, horizontal SIT image sensors can be easily read out non-destructively, so various applications such as photometry and calculation are being considered.

The structure and operation of the horizontal SIT will be explained below.

FIGS. 8A and 8B show the planar shape and cross-sectional structure of the horizontal SIT, respectively. Acceptor concentration NA ~
1 x 10' 2 (on the P-type high resistance substrate 1 of 5-3,
An N-type high-resistance epitaxial layer 2 with a donor concentration of ND~1x10' 3CI-3 is formed, and 0+ diffusion layers are arranged concentrically therein, with the central n-middle layer 3 serving as a source and the outer n+
ll14 as the drain, and from each n medium bottle scattering layer n
The source electrode 5 and drain electrode 6 are taken out using polysilicon. n+ source 3 and n+ drain 4
There is a P+ polysilicon electrode 7, oxidized l18, n
- A MOS gate consisting of an epitaxial layer 2 is formed, and photocharges are accumulated on the surface of the n-epitaxial layer 2 directly under this MOS gate. Note that 9 is a source contact hole, and 10 is a drain contact hole.

FIGS. 9A and 9B schematically show the operation of a horizontal SIT as a light receiving element. Figure 9A is a structural diagram of the left side of Figure 8B between the source and drain (indicated by an arrow).
Reference numeral 11 denotes a p-type diffuser layer for making contact with the substrate 1. FIG. 9B shows the energy distribution of the lateral SIT in operation in the surface and depth directions of the n-epitaxial layer 2, and the Z axis shows the energy of electrons. The source terminal 12 is grounded via a load resistor, and the drain terminal 13 is 0. It is fixed at a positive potential of several to several volts, and the board terminal 14 is at a voltage of 0. It is fixed at a negative potential of several to several volts. The gate electrode 7 is biased to a negative potential during photocharge accumulation and raises the energy of electrons within the n-epitaxial layer 20 until an inversion layer is formed on the surface of the n-epitaxial layer 2. In this state, electrons in the source region 3 are surrounded by a potential barrier formed by the reverse biased Dn junction in the depth direction and a potential barrier formed by the gate potential, so that electrons from the source 3 go to the drain 4. There is no flow. The energy diagram in the depth direction of the gate portion at this time is as shown in FIG. 10A, and a U-shaped potential distribution 21 is formed in the n-epitaxial layer 2 due to the substrate potential and the gate potential. If the potential distribution from the source 3 to the drain 4 is drawn parallel to the surface at a depth corresponding to the bottom 22 of this U-shaped potential, it becomes as shown in FIG. 10B. In this way, horizontal S
The potential distribution shape of the source, gate, and drain regions of the IT is saddle-shaped, and the height of the potential barrier when looking from the source to the gate is the bottom 22 of the U-shaped potential distribution 21. This is called the intrinsic gate potential, and as shown in Figures 9B and 1
It is shown as vg in Figure 0B.

When light enters the horizontal SIT, among the electron-hole pairs excited by light absorption deeper than the bottom 22 of the U-shaped potential, the electron (e) 24 enters the source 3 with a low potential.
Alternatively, the holes (h) escape to the drain 4 and the holes (h) escape to the substrate 1, so that neither becomes a photocharge signal. On the other hand, among the electron-hole pairs caused by the light absorbed at a portion shallower than the bottom 22 of the U-shaped potential, the electron 24 escapes to the source 3 or drain 4, but the hole 25 escapes to the potential well 22 directly below the gate. and is accumulated as a photocharge signal. Also, the source/gate depletion @2 in Figure 10B
7. Holes 2 photoexcited in the drain-gate depletion layer 28
5 is also accumulated as a photocharge signal in the potential well 2B just below the gate.

The holes 25 accumulated directly under the gate 26 in this way are
n-epitaxial l! from gate electrode 7! Since lines of electric force entering i2 are blocked and the bottom 22 of the saddle-shaped potential is lowered, the height vg of the potential barrier when looking from the source 3 to the drain 4 side becomes low.

As shown in the energy diagram of FIG. 9B, there is a positive voltage vDS between the drain 4 and source 3 of the lateral SIT.
However, there is a negative voltage VBub -B between the substrate 1 and the source 3.
is an addition. Here, the gate voltage Vg is such that when no light is incident, the conduction band edge of the silicon surface is pulled up to position 15 (the valence band edge is at a level @15') during photocharge accumulation, and to the position 17 (the valence band edge is at the level @15') during readout. Then lower it to position [17'). In such accumulation and readout operations, when light is incident, holes are accumulated directly under the gate 26 as described above, and the silicon conduction band edge is at the level 1116.
(The edge of the valence band is at position 16''), and during reading it drops to -18 (the edge of the valence band is at position 18'). In this way, the potential existing between source 3 and drain 4 during reading is high. Since the value V (23) becomes lower than that in the dark due to light incidence, electron injection from the source 3 toward the drain 4 is likely to occur. The number is several orders of magnitude larger than the number of accumulated holes.

The holes 25 accumulated directly under the gate 26 due to the incidence of light are conserved even during readout, and within a relatively short time period when the number of thermally excited holes is sufficiently small compared to the number of optically excited holes, multiple Multiple readouts (non-destructive readouts) are possible.

[Problem that the invention seeks to solve]

However, in the above-mentioned horizontal SIT image sensor, the sensitive region is only the gate region, and moreover, as explained in FIGS. 10A and 10B, the U-shaped potential distribution 2
1 is limited to a region shallower than the bottom 22 of the base. Therefore, there are problems in that the aperture ratio is small and the effective volume that contributes to photoelectric charge generation is small.

Figure 11A shows the measurement results of the photosensitivity distribution of the lateral SIT, which shows this.As shown in Figure 11B, which shows the structure of the lateral SIT, only the gate region is the sensitive region. I understand.

The present invention was made in view of these conventional problems, and an object of the present invention is to provide a solid-state image sensor suitably configured to increase the aperture ratio and effectively collect photocharges. do.

[Means and effects for solving the problem] In order to achieve the above object, in the present invention, a photoelectric conversion section having a photoconductive film is stacked on a horizontal SIT, and the photoelectric conversion section generated in the photoelectric conversion section is is transferred to the bottom of the S T gate via a transfer gate, a Schottky II wall, or a transfer section with an extremely thin insulating film, and readout corresponds to changes in the intrinsic gate potential due to photocharges by applying a readout pulse to the gate. This is done by detecting the current injected from the source to the drain.

〔Example〕

FIGS. 1A and 1B are a sectional view and a plan view showing a first embodiment of the present invention. This solid-state image sensor is a horizontal SIT
A charge conversion section 32 is stacked on top of a charge storage/readout section 31, electrically separated by a transfer section. In the charge storage/readout section 31, p
A mold cavity resistance epitaxial layer 34 is provided, and the source 3 of the SIT is formed in this p-epitaxial layer 34 by a p-type diffusion layer.
5 and a drain 36 are formed, and an accumulation layer 37 for photocharges (electrons) constituting a transfer section is formed by an N-type diffusion layer. Further, a transfer gate 39 is formed on this p-■ bitaxial layer 34 to surround the photocharge storage layer 37 via an insulating film 38 and constitute a transfer section, and also to surround this transfer gate 39 and the source 35. The readout gate 40 of the SIT is formed. These transfer gates 39 and read gates 40 have an MO8lt structure, and each gate electrode is formed of polysilicon or a high melting point metal, and the surface of the ρ-epitaxial layer 34 facing these electrodes is ion-implanted to facilitate the accumulation of electrons. Form layer 41 to make it slightly n-type. Further, a slight gap may be provided between the transfer gate 39 and the read gate 40, or the two gate electrodes may be partially overlapped with an insulating film interposed therebetween. In addition, 42 is a source electrode, 43 is a drain electrode, 44 is a source contact hole, 45 is a train contact hole, 46 is an isolation layer, 47 is an n medium scattering layer for making contact from the low substrate 33, and 48 is an n - shows the metal for making contacts from the substrate 33;

Further, the photoelectric conversion section 32 includes a photoconductive film 50 and a transparent electrode 51.
A collection electrode 52 is provided, and the photocharge generated on the photoconductive film 50 is collected by the collection electrode 52, and transferred to the S via a transfer section.
It is configured so that it can be transferred under the IT read gate. The collection electrode 52 is formed of a metal film, and at the same time collects photocharges generated within the photoconductive film 50, it acts as a light shielding film for the charge storage/readout section 31. Therefore, the cell area is the area of the collection electrode 52. This catch is 1! The outer periphery of the electrode 52 is shown in FIG. 1B by a dashed line 52'.

Note that the contact between the collection electrode 52 and the photocharge storage layer 37 is ohmic, and the contact between the collection electrode 52 and the photoconductive film 50 and the transparent electrode 51 and the photoconductive film 50 is from the electrode side to the photoconductive film 50. A Schottky contact or a blocking layer is provided between the electrode and the light guide @gso to prevent electron injection.

Next, the operation of this embodiment will be explained with reference to FIGS. 2A-G. FIG. 2A shows the potential distribution on the silicon surfaces of the photocharge storage layer 37, transfer gate 39, and readout gate 40 during photocharge accumulation (electron energy is directed upward). The potential of the photocharge storage layer 37 is biased positively during the previous charge transfer, and the silicon surface of the readout gate 40 is normally lower than the photocharge storage layer 37 in order to prevent conduction between the source 35 and drain 36 of the lateral SIT. Positively biased. Photoconductive i! The transparent electrode 51 on the surface of the photoconductive film 50 is negatively biased, and the photoconductive film 50 is almost entirely depleted.

When light is incident, since the collection electrode 52 also functions as a light shielding film, the light does not reach the silicon substrate side, and light absorption takes place mostly within the photoconductive film 50. Depleted photoconductive film 5
Among the electron-hole pairs generated in the transparent electrode 5, the holes
1, the electrons are attracted to the substrate side and photocharge accumulation M37
is stored in This state is shown in FIG. 2B. At this time, OV or a negative voltage is applied to the transfer gate 39 to turn off the surface channel.

Next, a positive voltage is applied to the transfer gate 39 to move the electrons 61 stored in the photocharge storage layer 31 directly below the readout gate 40 as shown in FIG. 2C. After this charge transfer is completed (FIG. 2D), the transfer gate 39 is turned off (FIG. 2E).
) and then, as shown in FIG. 2F, reading is performed by applying a positive voltage lower than that during photocharge accumulation to the readout gate 40.

During this readout, if there are electrons 61 as photocharges directly under the readout gate 40, some of the lines of electric force extending from the positive charges on the gate electrode are terminated by the electrons 61 and therefore do not reach the inside of the silicon substrate. Therefore, the potential of the silicon under the readout gate 40 is lower when there is a photocharge (electron) than when there is no photocharge. Therefore, horizontal S
The height of the potential barrier that determines the amount of charge injection into IT is lowered by the photocharge.

After reading, a negative voltage is applied to the read gate 40 to release the accumulated charge 61 to the substrate side and reset.

In this way, by forming the horizontal SIT optical sensor into a stacked type, the aperture ratio can be increased.

In addition, since the photoelectric conversion section 32 is separated from the charge storage/readout section 31 via the transfer section, a shutter function can be incorporated.

3A to 3C are time charts showing the relationship between a constant readout period and photocharge accumulation time. FIG. 3A is a time chart when the photocharge accumulation time is fixed to the readout period, the transparent electrode 51 is always fixed at negative (L), and after applying a positive (H) transfer pulse to the transfer gate, the readout is performed. One read operation is performed by applying a read pulse (M) and a reset pulse <1) to the gate.

In FIG. 3B, the timing of pulses applied to the transfer gate and readout gate is the same as in FIG. 3A, but the photoconductive film 5
The exposure time S is determined by varying the time for depleting zero. In this case, while a negative voltage (L) is applied to the transparent electrode 51, an electric field is generated in the photoconductive film 50 from the collection electrode 52 toward the transparent electrode 51, and as a result, an electric field is generated within the photoconductive film 50. Among the generated electron-hole pairs, electrons reach the collection electrode 52 and are accumulated in the photocharge storage layer 37 . Thereafter, when the transparent electrode 51 is grounded or slightly positively biased (H) to remove the electric field of the photoconductive film 50, the photogenerated electron-hole pairs are recombined and the photocharge storage layer 3
It does not reach 1. Further, the electrons once accumulated in the photocharge storage layer 37 leak from the photocharge storage layer 31 to the photoconductive film 50 due to the barrier layer or Schottky barrier formed between the collection electrode 52 and the photoconductive film 50. Never. In this way, a shutter function can be provided without a mechanical shutter.

In FIG. 3C, the photocharge accumulation time is changed by discharging the accumulated charges once within the readout cycle. In this case, a negative voltage (L) is always applied to the transparent electrode 51 to deplete the photoconductive film 50 (.In this way, the electrons photoexcited within the photoconductive film 50 are transferred to the photocharge storage layer 50).
However, by applying a transfer pulse 11 to the transfer gate within the readout period and then applying a reset pulse 13 to the readout gate, the electrons accumulated in the photocharge storage layer 31 are temporarily discharged. If you do this,
The photocharge/storage time is determined by the interval (S) between the transfer pulse 71 for discharging and the transfer pulse 72 synchronized with the readout cycle, so by arbitrarily setting the timing of the transfer pulse 71, the photocharge accumulation The time S can be changed arbitrarily within the read cycle.

According to the first embodiment, as described above, it is possible to increase the aperture ratio and incorporate a shutter function, but on the other hand, some of the holes injected from the source 35 of the SIT during reading are There is a possibility that the electrons reach the photocharge storage layer 37 and recombine with the electrons currently being accumulated in the photocharge storage layer 37, thereby inhibiting the accumulation of photocharges. As a countermeasure against this problem, in the second embodiment of the present invention, the flow of holes during readout is prevented from passing under the photocharge storage layer.

4A and 4B are a cross-sectional view and a plan view showing a second embodiment of the present invention, in which 81 is a transparent electrode, 82 is a photoconductive film, 83 is a collection electrode, 84 is a photocharge storage layer, and 85 is a S.I.T.
86 is a drain, 87 is a transfer gate electrode, 8 is a source of
8 is a readout gate electrode, 89 is a source electrode, 90 is a drain electrode, 91 is an ion implantation layer for adjusting the transfer gate level,
92 is a thin N-type ion implantation layer for electron storage, 93 is an oxide film, and 95 is a donor concentration ND-5X1G'' ~ 5X1
0' 3 C1'' n-silicon substrate, 96 is an n-type diffused layer, 97 is a metal.The channel is formed on the n-silicon substrate 9.
Acceptor concentration NA = 5X10' 2~
5X10” P-epitaxial layer 94 of C1l'-3
However, in order to prevent holes injected from the source 85 during readout from flowing into the photocharge storage layer M84, a readout gate 98 on the photocharge storage layer layer 84 side is formed before performing P-epitaxial growth. A pixel isolation region 100 is placed directly under the
N-type ions are implanted to form an N-type layer 99 so as to be in contact with the holes, thereby increasing the lli wall for holes. The pixel area is determined by the area of the collection electrode 83 indicated by a chain a101. In this embodiment, a positive voltage is applied to the substrate 95 and the drain 86
A similar operation can be achieved by driving the transparent electrode 81, transfer gate electrode 81, and readout gate electrode 88 under the bias conditions shown in FIGS. 3A to 3C while a negative voltage is applied.

As described above, according to this embodiment, since the N-type layer 99 can effectively prevent holes from flowing into the photocharge storage layer 84 from the source 85 during reading, the photocharge storage layer 84
It is possible to effectively accumulate photocharges in the memory, and therefore, non-destructive readout can be repeatedly and effectively carried out.

FIGS. 5A and 5B are a sectional view and a plan view showing a third embodiment of the present invention. In this embodiment, the transfer section in the stacked lateral SIT of the first embodiment is configured with a Schottky barrier. That is, instead of a transfer gate, a collection electrode is connected to the epitaxial layer via a Schottky barrier, and by changing the height of the barrier depending on the voltage applied to the readout gate, photocharges are transferred directly below the readout gate. This is what I did.

In FIGS. 5A and 5B, 111 is a transparent electrode, 112
1 is a photoconductive film, 113 is a collection electrode, and a Schottky barrier or a barrier layer is provided between both electrodes 111 and 113 and the photoconductive film 112 to prevent electrons from moving from the electrodes to the photoconductive film 112. Make it.

114 is an N-type high-resistance substrate, 115 is a P-type high-resistance epitaxial layer, 116 is a source of SIT, 117 is a drain of SIT, 118 is a readout gate electrode, 119 is a source electrode, 120 is a drain electrode, 121 is an N-type ion The injection layer 122 is an n-type dispersed layer, and 123 is a metal. Collection electrode 113 and p-epitaxial layer 115 are brought into contact via Schottky barrier 124 . A dashed line 125 indicates the edge of the collection electrode 113, and this area becomes the light receiving area.

Next, the operation will be explained with reference to FIGS. 6A and 6B. FIGS. 6A and 6B are band tire diagrams of cross section I across the photocharge accumulation region and cross section ■ across the readout gate in FIG. ing.

When a negative voltage is applied to the transparent electrode 111, holes generated by incident light escape to the transparent electrode 111, and electrons reach the collection electrode 113, but the difference between the collection electrode 113 and the P-epitaxial layer 115 is Electrons are accumulated in the collection electrode 113 because there is a Schottky barrier 124 in between. 131
indicates a Schottky barrier, and 132 indicates accumulated electrons. During storage, a high positive voltage is applied to the readout gate 118 (
The resulting strong electric field lowers the height of the Schottky barrier 131, and the electrons 132 accumulated in the collection electrode 113 flow into the silicon surface 133 directly under the readout gate electrode 118, where they are accumulated. Furthermore, during reading, by applying a low positive voltage to the reading gate 118, the potential barrier for holes from the source 116 to the drain 111 is lowered, and a current flows between the source and the drain. The source current flowing at this time is the readout gate
It is a function of the electrons accumulated directly below 118. During this readout, the electric field applied to the Schottky barrier 131 is weakened, so that the height of the Schottky barrier 131 returns to its original high state. Therefore, the electrons that have moved directly below the readout electrode 118 will not flow back to the collection electrode 113.

According to this embodiment, there is no need to provide a photocharge storage layer consisting of a transfer gate and a diffusion layer, so in addition to the effects of the first embodiment, there is an advantage that manufacturing is facilitated. As in the example, there is a possibility that holes injected from the source 116 during readout reach the collection electrode 113 and recombine with photoexcited electrons 132. In order to prevent this, in the fourth embodiment of the present invention, a configuration similar to that of the second embodiment is used to prevent the hole current from the source from passing under the Schottky barrier under the collection electrode.

7A and 7B are a cross-sectional view and a plan view showing a fourth embodiment of the present invention, in which 141 is a transparent electrode; '14
2 is a photoconductive film, 143 is a collection electrode, 144 is an n-type high resistance substrate, 145 is a p-type cavity resistance epitaxial layer, 146 is a source, 141 is a drain, 148 is a source electrode, 1
49 is a drain electrode, 150 is a read gate electrode, 1
51 is a Schottky barrier, 152 is a thin N-type ion implantation layer, 153 is an oxide film, 154 is an n-type diffusion layer, 155 is a metal, 156 is a pixel separation region, and 157 is a collecting electrode end. Below the region 158 between the Schottky barrier 151, the source 146, and the pixel isolation region 156 is an n-substrate 144.
N-type layer 15 protruding from p-epitaxial layer 145
9, thereby increasing the potential barrier to holes,
All holes injected from the source 146 during reading flow toward the drain 147.

With this configuration, the same effects as in the second embodiment can be obtained.

Note that in the configurations of the third and fourth embodiments, the Schottky barrier is replaced with an insulating film (oxide film) of several tens of layers, and a high positive voltage is applied to the readout gate during photocharge accumulation, and the resulting strong electric field creates a collection electrode. It is also possible to configure the device so that photoexcited electrons are tunnel-injected directly under the readout gate.

〔Effect of the invention〕

As described above, according to the present invention, the low aperture ratio of the horizontal SIT photosensor can be increased by forming a laminated structure, and photocharges can be collected effectively. In addition, since the photoelectric conversion section and the charge storage/readout section are electrically separated by a transfer gate, a Schottky barrier, or a transfer section with an extremely thin oxide film, a bias is applied to the photoconductive film of the photoelectric conversion section. By changing the time, the photoelectric conversion time (exposure time) can be made variable, and thereby a shutter function can be added without a mechanical shutter.

[Brief explanation of the drawing]

1A and 1B are cross-sectional views and plan views showing the first embodiment of the present invention, 2A-G and 3A-C are diagrams for explaining its operation, and 4A and 4B are views for explaining the operation thereof. B is a sectional view and a plan view showing the second embodiment of the present invention, FIGS. 5A and B are sectional views and a plan view showing the third embodiment, and FIGS. 6A and B are for explaining the operation thereof. Figures 7A and B are cross-sectional views and plan views showing the fourth embodiment of the present invention, Figures 8A and B, Figures 9A and 8, Figures 10A and B, and Figure 11A. , B are diagrams illustrating the conventional technology. 31... Charge storage/readout section 32... Photoelectric conversion section 33... Substrate 34...
,・Epitaxial M35...Source 36...Drain 37...Photocharge storage layer 38...Insulating film 39...Transfer gate 40...Reading gate 41...Ion implantation layer 42... Source electrode 43...Drain electrode 44...Source contact hole 45...Drain contact hole 46...Isolation 47...Nakabotan scattering layer 4
8... Metal 50... Photoconductive film 51.
...Transparent electrode 52...Collection electrode 81, 1
11. 141...Transparent electrode 82, 112. 14
2... Photoconductive film 83, 113. 143... Collection electrode 84... Photocharge storage layer 85, 116. 146...source 86, 117
．． 147...Drain 87...Transfer gate electrode 88, 118. 150...Reading gate electrode 89
, 119. 148...source electrode 90, 120
．． 149...Drain electrodes 91, 92. 121.
152--Ion implantation layer 93, 153... Oxide film 94, 115. 145...Epitaxial layer 95
, 114. 144...substrate 96, 122. 154...n medium bottle scattering layer 97, 1
23. 155...Metal 98...Reading gate 99, 159...N-type layer 100, 156...Pixel isolation region 124, 151...Schottky barrier Figure 1, Figure 4, Figure 5, Figure 5A, Figure 6 Figure fx candy - n' Eclipse yourself - Yu, Yu≠Akino Figure 9 Figure 10 Procedural amendments August 26, 1985 Mr. Michibu Uga, Commissioner of the Patent Office ■, Indication of the case 1985 Patent No. 155035 2, Name of the invention: Solid-state image sensor 3, Relationship with the person making the amendment Patent applicant (037) Olympus Optical Industry Co., Ltd. 4, Agent 1, “On page 4, line 10 of the specification” Correct "Procedure" to "Capacity". 2. Correct rNAJ in the 6th line of the 5th page to "N^", and correct rNDJ in the 7th line of the same page to "N,". 3. Correct "left side" in the second line of page 6 to "right side," and correct "20" in line 14 of the same page to "2." 4. Correct rNDJ in line 7 of page 18 to rND J, and correct rNAJ in line 11 of the same page to rNA J. 5. In the drawing, "Figure 8 B" is corrected as shown in the attached correction drawing.

Claims (1)

[Claims] 1. A high-resistance epitaxial layer containing impurities of a different type from that of the substrate is provided on a high-resistance semiconductor substrate, and a source and drain containing impurities of the same type as the epitaxial layer are formed on the surface of this epitaxial layer. a charge storage/readout section consisting of an electrostatic induction transistor, in which a readout gate is formed between the source and drain through an insulator so that a source-drain current flows parallel to the substrate surface; A photoconductive film is laminated on the charge storage/readout section and generates photocharges upon incidence of light, and a photoconductive film is formed within the photoconductive film to collect the photocharges.
A photoelectric conversion section having a collection electrode provided to cover most of the readout section, and a transfer section that transfers photocharges in the photoelectric conversion section to below the readout gate of the charge storage/readout section. A solid-state image sensor characterized by: 2. The transfer section includes a photocharge storage layer formed on the surface of the epitaxial layer in ohmic contact with the collection electrode, and an insulator interposed between the photocharge storage layer and the readout gate. A solid-state image sensor according to claim 1, further comprising a transfer gate. 3. The transfer section includes a Schottky barrier provided between the epitaxial layer and the collection electrode adjacent to the readout gate.
The solid-state image sensor described in . 4. The solid-state imaging device according to claim 1, wherein the transfer section includes an insulating film provided between the epitaxial layer and the collection electrode adjacent to the readout gate. element. 5. Claims 1 and 2, characterized in that a buried layer containing an impurity of the same type as that of the substrate is formed in the substrate between the source and the transfer section, facing the readout gate.
, 3 or 4. The solid-state imaging device according to item 3 or 4.