JPS62164383A - Endoscope device - Google Patents

Abstract

PURPOSE:To obtain a video signal with a good S/N by providing a sample holding circuit at the tip of a scope main body, and extracting a video component sample-holding directly the video signal outputted from a solid-state image pickup element. CONSTITUTION:At the tip of a scope main body 10, an image pickup lens 16 and a solid-state image pickup element (CCD) 18 are provided, and a vertical transfer pulse phiV, and a horizontal transfer pulse phiH form a pulse generation circuit 20 within a video processor 12, and a reset pulse phiR in a CCD output buffer are supplied to the solid-state image pickup element 18 through level drivers 22, 24, and 26 respectively. The video signal from the solid-state image pickup element 18 is supplied to a sample holding circuit (SH) 30 provided at the tip of the scope main body 10, and the SH pulse from the pulse generation circuit 20 is supplied to the SH circuit 30 through a waveform arranging circuit 32. The video component extracted by the SH circuit 30 is transmitted to the video processor 12, and is supplied to a monitor 14 through a differential amplifier 34, and a video signal processing circuit 38.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention provides a charge-coupled device (COD) at the tip of the scope body.
) etc., and relates to an endoscope device incorporating a solid-state imaging device such as

(Prior art) In recent years, with the development of solid-state 1a image elements, endoscope devices have been developed that incorporate a solid-state Ifi image element at the tip of the scope body and display images of objects on an external monitor device. There is.

Inside like this? ! A conventional example of a mirror device is shown in FIG.

A video processor 102 is connected to the scope body 100, and endoscopic images are displayed on a monitor 104. A solid-state image sensor (for example, C0D) 108 is provided at the tip of the scope body 100 via an LFI image lens 106 . A pulse generation circuit 110 that generates various drive pulses is provided within the video processor 102.

Vertical transfer pulse φ■, horizontal transfer pulse φH, and CCD output buffer reset pulse φ are output from the pulse generation circuit 110.
R is output, amplified to a predetermined level via the level driver 112, and then supplied to the solid-state image sensor 108.

A video signal from a solid-state sensor (moving element 108) is transmitted to a video processor 102 via a coaxial cable.

Here, as shown in FIG. 8(a), the output video signal of the solid-state Va image element 108 has a crotch component t within one pixel period T.
1, ZO component t2, and image component [3]. While this signal is transmitted through a thin coaxial cable, its high frequency components are attenuated and its waveform deteriorates. Therefore, in the video signal input to the video processor 102, the video component t3 is not flat as shown in FIG. 8(b).

The video signal is amplified by a differential amplifier 114 to remove transmission noise. The output of the differential amplifier 114 is sampled and held by a sample hold (SH) circuit 116, and a video component is extracted. The output of the sample hold circuit 116 is supplied to a video signal processing circuit 118 for video signal processing. A sample and hold pulse is supplied from the pulse generation circuit 110 to a sample and hold circuit 116, and a clamp (CLP) pulse and a synchronization (SYNC) pulse are supplied to a video signal processing circuit 118. Video signal processing circuit 118
The output of is supplied to the monitor 104. The sample-and-hold pulse and the output of the sample-and-hold circuit 116 are shown in FIG. 8(C) and (d>, respectively.Sample-and-hold circuit 1)
16 samples when the sample and hold pulse is at a high level, and holds when the sample and hold pulse is at a low level.

As mentioned above, the video component of the video signal input to the video processor 102 is not flat, so even if the timing of the sample-and-hold pulse is slightly shifted, the hold level will change significantly. The output video signal is likely to become unstable, and the S/N ratio may deteriorate due to the influence of noise.

Furthermore, since the video signal processing circuit is separate from the scope body, it is not possible to compensate for variations in the individual solid-state image sensors, and the sensitivity may vary from scope to scope.

Furthermore, when connecting and exchanging scopes with different scope lengths, the signal transmission time differs, so processing such as changing the pulse timing depending on the type of scope is required in the pulse generation circuit, which causes the circuit to become It gets complicated. As mentioned above, pulse timing deviations are particularly problematic in the relationship between the vertical transfer pulse φ■, the horizontal transfer pulse φH, and the sample-and-hold pulse.

In contrast, the conventional example shown in FIG.
No. 429) is also available. This differs from the one shown in FIG. 7 in that the differential amplifier 114 is provided not within the video processor 102 but within the scope body 100.

Here, a gain adjustment circuit and a signal delay circuit are provided in the differential amplifier 114, thereby compensating for timing deviations due to variations in solid-state 1/2 image elements and differences in scope length. However, even with this conventional example, it is not possible to prevent large fluctuations in the hold level due to waveform deterioration during transmission of the video signal input to the video processor.
Deterioration of the S/N ratio may occur.

[Problem that the invention seeks to solve]

This invention was made to deal with the above-mentioned circumstances,
The purpose of this study is to obtain a video signal with a good S/N ratio in a Uaisei yL device that uses solid-state electromagnetic elements to image an object.

[Means for solving problems]

The apparatus according to the present invention includes a scope body having a solid-state image sensor and a sample hold circuit at its tip, and an image processing means connected to the scope body for image processing the output of the sample hold circuit.

[Effect]

According to the endoscope device according to the present invention, the sample and hold circuit is provided at the tip of the scope body, and the video signal output from the solid-state image sensor is directly sampled and held to extract the video component. Even if the timing is slightly shifted, the hold level does not change significantly, and a video signal with a good S/N ratio can be obtained.

(Embodiment) An embodiment of an endoscope apparatus according to the present invention will be described below with reference to the drawings. 11iii) is a block diagram of the first embodiment. This embodiment includes a scope body 10, a video processor 12, and a monitor 14. Scope body 10
and video processor 12 are freely connected. A solid-state image sensor (for example, C0D) 18 is provided at the tip of the scope body 10 via a VA image lens 16 . A pulse generation circuit 20 is provided within the video processor 12 to generate various drive pulses. After the vertical transfer pulse φV, horizontal transfer pulse φH, and reset pulse φR of the CCD output buffer from the pulse generation circuit 20 are each amplified to a predetermined level via the level drivers 22, 24, and 26, the solid state v! The signal is supplied to the im element 18. A video signal from the solid-state IS element 18 is supplied to a sample hold (SH) circuit 30 also provided at the tip of the scope body 10.

A sample and hold pulse from the pulse generation circuit 20 is supplied to the sample and hold circuit 30 via a waveform shaping circuit 32. The sample-and-hold circuit 30 samples when the sample-and-hold pulse is at a high level and holds it when it is at a low level. The video components extracted by the sample and hold circuit 30 are transmitted to the video processor 12 via a coaxial cable. The video signal is amplified by a differential amplifier 34 to remove transmission noise. The output of the differential amplifier 34 is supplied to a video signal processing circuit 38 and subjected to video signal processing.

A clamp (CLP) pulse and a synchronization (SYNC) pulse are supplied from the pulse generation circuit 20 to the video signal processing circuit 38. The output of the video signal processing circuit 38 is supplied to the monitor 14.

The operation of the first embodiment will be explained with reference to the signal waveform diagrams shown in FIGS. 2(a) to 2(d). As shown in FIG. 2(a), the output video signal of the solid-state image sensor 18 has a clock component (1, zero component t2, and video component t3 within one pixel period T. Unlike the conventional example, the first embodiment This signal is then immediately supplied to the sample and hold circuit 30, where it is sampled and held by a sample and hold pulse as shown in FIG. 2(b).

Here, since the video component t3 is flat, the hold level does not shift significantly even if the timing of the sample and hold pulses is slightly shifted. The waveform of the output of the sample and hold circuit 30 is shown in FIG. 2(C).

When the output of the sample and hold circuit 30 is transmitted to the video processor 12 via the coaxial cable, the differential amplifier 3
4, the signal waveform deteriorates as shown in FIG. 2(d), but since high frequency components higher than the pixel frequency are originally unnecessary in the video signal, this deterioration has no effect.

According to the first embodiment, the solid-state tie element 18 and the sample-and-hold circuit 30 are provided at the tip of the scope body 10, and the video signal output from the solid-state image sensor 18 is directly sampled and held to extract video components. ing. Therefore, the video component input to the sample and hold circuit 30 is flat, and the hold level does not change significantly even if the timing of the sample and hold pulse is slightly shifted. As a result, a video signal with a good S,'N ratio is obtained.

Next, a second embodiment of the endoscope apparatus according to the present invention will be described. FIG. 3 is a block diagram of the second embodiment. In the second embodiment, parts corresponding to those in the first embodiment are given the same reference numerals and detailed explanations are omitted. In the second embodiment, a solid ratio @ element 18, a sample hold circuit 50, a sample hold pulse generator 52, and a low impedance buffer 7 amplifier 54 are provided at the tip of the scope body 10. The vertical transfer pulse φV, horizontal transfer pulse φH, and reset pulse φR- from the pulse generation circuit 20 in the video processor 12 are sent to level drivers 22, 24, and 26, respectively.
After being amplified to a predetermined level via
supplied to Vertical transfer pulse φV, horizontal transfer pulse φ
H is supplied to the solid-state image sensor 18. Horizontal transfer pulse φ
H, a reset pulse φR' is supplied to the sample and hold pulse generator 52.

The sample-and-hold pulse generator 52 generates first and second sample-and-hold pulses SH1, SH2, and C' CD output buffer reset pulse φR, and supplies the first and second sample-and-hold pulses SH1 and SH2 to the sample-and-hold circuit 50. Then, a reset pulse φR is supplied to the solid state 1lil image element 18. Sample hold pulse generator 5
The details of 2 are shown in FIG.

The reset pulse φR' is the first pulse of the AND gate 60.62.
The input terminal is supplied to the input terminal of the inverter 68. The output signal of inverter 68 is provided to a first input terminal of AND gate 64. Horizontal transfer pulse φH is supplied to the second input terminal of AND gate 60 and the input terminal of inverter 66 . The output signal of the inverter 66 is output from the AND gate 62
．． 64 second input terminal. AND gate 60
．． From 62.64, reset pulse φR1 first and second sample and hold pulses SH1 and SH2 are output, respectively.

The output signal of the sample and hold circuit 50 is transmitted to the video processor 12 via a buffer amplifier 54 and a coaxial cable. Details of the sample and hold circuit 50 are shown in FIG. The output of the solid-state m-image element 18 is supplied via a buffer amplifier 70 to an analog switch 72,74. The analog switches 72 and 74 are turned on and off, respectively.
Controlled by second sample and hold pulses SH1 and SH2. Here, the analog switches 72 and 74 are the first,
It turns on when the second sample and hold pulses SHI and SH2 are at high level, and turns off when they are at low level. The outputs of the analog switches 72 and 74 are connected to the inverter (-) of the differential amplifier 76 via holding capacitors 78 and 80, respectively.
) input terminal, connected to the non-inverting (+) input terminal. The output of differential amplifier 76 is connected to buffer amplifier 54.

The gain of the differential amplifier 76 can be adjusted in a semi-fixed manner. Thereby, variations in sensitivity of the solid-state image carrier can be absorbed.

The operation of the second embodiment will be explained with reference to the signal waveform diagrams shown in FIGS. 6(a) to (i>). As shown in Fig. 6<a>, both the clock component and the zero component fluctuate.For this reason, an accurate video signal cannot be obtained by simply sampling the output signal of the solid-state image sensor 18 at the timing of the video component. The portion to be extracted as a video signal is the amplitude of the video signal relative to the zero component as shown in a, b, . . . .

The reset pulse φR-1 and the horizontal transfer pulse φH supplied to the sample and hold pulse generator 50 are shown in FIGS. 6(Q) and 6(h), respectively. Since the sample-and-hold pulse generator 50 is configured as shown in FIG. 4, the output reset pulse φR1 first and second sample-and-hold pulses SH1 and SH2 are as shown in FIGS. 6(i), (b), and (), respectively. C
). As a result, the zero component of the output signal of the solid-state IS element 18 is sampled and held by the holding capacitor 78, and the inverted input signal of the differential amplifier 76 becomes as shown in FIG. 6(d). The video component of the output signal of the solid-state IA image element 18 is sampled and held by the holding capacitor 80, and the non-inverted input signal of the differential amplifier 76 becomes as shown in FIG. 6(e). Therefore, as shown in FIG. 6(f), from the differential amplifier 76,
The amplitude of the video signal with respect to the zero component of the output signal of the solid-state image sensor 18 is obtained.

According to the second embodiment, the zero component and the video component of the output signal of the solid-state Wi image element 18 are sampled and held by the first and second sample and hold pulses, respectively, and the difference between the two hold signals is calculated by the differential amplifier. Since it is extracted as a video signal, the output video signal of the solid-state imager 18 is affected by clock components and noise due to noise inside the semiconductor unrelated to the video.
Even if the zero component fluctuates, the influence of that noise can be removed.
/'' A video signal with a good N ratio can be obtained. In addition, a sample-and-hold pulse generator 50 is built into the scope, and the sample-and-hold pulses 5t-II and SH2 are generated from the reset pulse φR-1 and the horizontal transfer pulse φH. Therefore, compared to the first practical example, the number of signal lines can be reduced by one, and the diameter of the scope body can be made smaller.Furthermore, the gain of the differential amplifier 76 in the sample and hold circuit 50 can be adjusted in a semi-fixed manner. As a result, the solid m
Can absorb variations in sensitivity of image elements.

(Effects of the Invention) As explained above, according to the present invention, an endoscope device that can obtain a video signal with a good S/N ratio is provided.

[Brief explanation of drawings]

Is Figure 1 based on this invention? J! A block diagram of the first embodiment of the second embodiment, FIGS. 2(a) to (d) are signal waveform diagrams explaining the operation of the first embodiment, and FIG. 3 is a second embodiment of the endoscope apparatus according to the present invention. The block diagram of the example, FIG. 4 is the circuit diagram of the sample and hold pulse generator of the second embodiment, and FIG.
Circuit diagram of the sample and hold circuit of the embodiment, FIG. 6(a)
~(i) is a signal waveform diagram explaining the operation of the second embodiment, FIG. 7 is a block diagram of a conventional example of an endoscopic II device, and FIG.
) to l) are waveform diagrams explaining the operation of this conventional example, and FIG. 9 is a block diagram of the conventional example of the endoscope apparatus. 10...Scope body 12...Video processor 14...Sonitor 18...Solid-state image sensor 20...Pulse generation circuit 30...Sample hold circuit 38...Video signal processing circuit source Output of attorney Atsushi Tsuboi Figure 2 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Procedural official document 61.5.19 Showa year, month, day, Commissioner of the Patent Office, Uga Michi Department, 1. Indication of the case Patent application No. 61 5582 P3 2, Name of the invention Endoscope device 3, Person making the amendment Relationship to the case Patent applicant (037) Olympus Optical Industry Co., Ltd. 4, Agent 1-chome Toranomon, Minato-ku, Tokyo 26-5 No. 17 Mori Building 6,
Subject of correction 1-1. 7. Details of correction: ``Vertical transfer pulse φVJ'' written on page 4, lines 19 to 20 is corrected to ``reset pulse φRJ.''

Claims (2)

[Claims] (1) An endoscope device comprising a scope body having a solid-state image sensor and a sample hold circuit at its tip, and an image processing means connected to the scope body for image processing the output of the sample hold circuit. (2) The image processing means includes a pulse generation circuit that supplies a drive pulse to the solid-state image sensor, and the scope body includes a sample and hold pulse generator that generates a sample and hold pulse from the output drive pulse of the pulse generation circuit. An endoscope apparatus according to claim 1, characterized in that the endoscope apparatus comprises: