JPS62163390A - External work of printed board - Google Patents

External work of printed board

Info

Publication number
JPS62163390A
JPS62163390A JP522086A JP522086A JPS62163390A JP S62163390 A JPS62163390 A JP S62163390A JP 522086 A JP522086 A JP 522086A JP 522086 A JP522086 A JP 522086A JP S62163390 A JPS62163390 A JP S62163390A
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
cut surface
semiconductor chip
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP522086A
Other languages
Japanese (ja)
Inventor
徹 樋口
永岡 英紀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP522086A priority Critical patent/JPS62163390A/en
Publication of JPS62163390A publication Critical patent/JPS62163390A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [技術分野] 本発明はビングリッドアレイ(PGA)とかリードレス
チップキャリア(LCC)等の半導体チップキャリアを
製造するためのプリント基板の外形加工法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method for processing the contour of a printed circuit board for manufacturing a semiconductor chip carrier such as a bin grid array (PGA) or a leadless chip carrier (LCC).

[背景技術1 従来より、プリント基板に半導体チップを実装し、打ち
抜き、のこ歯、ルータ−等により外形加工を施し、この
ものが半導体チップキャリアとして使用されているが、
外形加工後の切断面には導体パターンとかめっきリード
#i等の導体が露出してしまっており、取り扱いの際に
、取り扱い者に帯電している静電気がこの露出している
導体を通じて半導体チップに通電して半導体チップを破
壊させてしまうという問題があった。又この切断面から
吸湿してしまい耐湿性に乏しいものであった。
[Background Art 1 Conventionally, a semiconductor chip is mounted on a printed circuit board, and the external shape is processed by punching, saw teeth, router, etc., and this is used as a semiconductor chip carrier.
Conductors such as the conductor pattern and plated lead #i are exposed on the cut surface after external processing, and when handling, the static electricity charged on the handler is transferred to the semiconductor chip through the exposed conductors. There was a problem in that the semiconductor chip could be destroyed by electricity. Also, moisture was absorbed from this cut surface, resulting in poor moisture resistance.

このため、す(脂コーティング等の別処理が必要となっ
てylTL工程が複雑になってしまっていた6[発明の
目的] 本発明は上記事情に鑑みてなされたものであり、その目
的とするところは、外形加工と同時にプリント基板の切
断面に露出する導体に樹脂被覆層を形成でき、別途樹脂
コーティング等の工程を必要としなくても実装した半導
体チップが取り扱い者の静電気により破壊することがな
く、しかも切断面からの吸湿も抑制でき、N湿性の高い
半導体チップキャリア等を製造することができるプリン
ト基板の外形加工法を提供することにある。
For this reason, the ylTL process has become complicated due to the need for separate treatments such as fat coating.6 [Object of the Invention] The present invention has been made in view of the above circumstances, and its purpose is to However, a resin coating layer can be formed on the conductor exposed on the cut surface of the printed circuit board at the same time as the external shape processing, and the mounted semiconductor chip can be prevented from being destroyed by static electricity from the handler without requiring a separate process such as resin coating. It is an object of the present invention to provide a method for processing the external shape of a printed circuit board, which can suppress moisture absorption from the cut surface and produce semiconductor chip carriers and the like with high N moisture.

[発明の開示1 本発明のプリント基板の加工法は、プリント基板1を所
定寸法に切断する外形加工法であって、プリント基板1
を振動打ち抜きプレスにより外形打ち抜きしてプリント
基板1の切断面2に位置する絶kk樹脂層3を振動エネ
ルギーにより溶融させてプリント基板1の切断面2に露
出する導体4にa1脂波計層5を被覆させることを特徴
とするものであり、この構成により上記目的を達成でき
たものである。即ち、プリント基板1の外形打ち抜きと
同時にプリント基板1の切断面2に露出する導体4にO
(脂肢覆層5を被覆でき、従来の如く、樹脂コーティン
グ等の別処理を必要とすることがないものである。
[Disclosure 1 of the Invention The printed circuit board processing method of the present invention is an external processing method of cutting the printed circuit board 1 into predetermined dimensions,
The outer shape of the printed circuit board 1 is punched out using a vibration punching press, and the A1 lipid wave meter layer 5 is melted using vibration energy to melt the high-density resin layer 3 located on the cut surface 2 of the printed circuit board 1 to form an A1 lipid wave meter layer 5 on the conductor 4 exposed on the cut surface 2 of the printed circuit board 1. This structure is characterized in that it is coated with .The above object can be achieved by this structure. That is, at the same time as the outer shape of the printed circuit board 1 is punched out, the conductor 4 exposed on the cut surface 2 of the printed circuit board 1 is
(It can cover the fat limb covering layer 5, and does not require separate treatment such as resin coating as in the conventional method.

以下、本発明を添付の図面を参照して詳細に説明する。Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

本発明においては、プリント基板1は、金属箔張積層板
等から周知の工程により製造される。たとえば、サブト
ラクティブ法では、銅張積層板に順次、穴明け、活性化
処理、無電解めっき、スクリーン印刷又は露ゲC・現像
(めっきレノスト)、重含や銅めっき、電解1土んだめ
っき(エンチングレノスト)、めっきレノスト剥離、エ
ツチング、ヒューノング、ツルグーレノストロ印刷、外
形仕上げ、シンボルマーク印刷といった工程で製造され
る。
In the present invention, the printed circuit board 1 is manufactured from a metal foil-clad laminate or the like by a well-known process. For example, in the subtractive method, a copper-clad laminate is sequentially subjected to drilling, activation treatment, electroless plating, screen printing or exposure C/development (plating renost), heavy impregnation, copper plating, and electrolytic plating. It is manufactured through processes such as (enching lenost), plating lenost peeling, etching, hunong, turgule nostro printing, external finishing, and symbol mark printing.

金!g箔張積層板1は、例えば絶縁樹脂層3となる複数
枚の樹脂含浸基材の丘に、金属箔を配置し、このものを
−組みとして成形プレートを介して複数組み熱盤間に配
置し、例えば、1.20″C以上、20−150kg/
ca+2.40−100分で加熱加圧して積層一体化さ
せて得られる。又、金属基板の上に8(脂含浸基材、金
属箔を配置しであるいはチップ実装箇所だけが金属であ
る樹脂基板などを使用してもよい。
Money! G The foil-clad laminate 1 is made by placing metal foil on the top of a plurality of resin-impregnated base materials, which will become the insulating resin layer 3, for example, and placing the plurality of sets between hot plates via forming plates as a set. For example, 1.20″C or more, 20-150kg/
It is obtained by heating and pressing at ca+2.40-100 minutes to integrate the layers. Alternatively, a resin substrate may be used in which a resin impregnated base material, metal foil is placed on a metal substrate, or only the chip mounting area is metal.

樹脂含浸基材は紙、ガラスクロス、ガラスペーパー、S
MC等の基材にフェノール樹脂、イミド樹脂、エポキシ
樹脂、不飽和ポリエステル樹脂等を含浸させ乾燥させて
製造したものである。このプリント基板1の表面に直接
あるいはミリング加工などの機械的切削加工によって設
けた実装用凹部にダイスボンディング部7を形成し、こ
のダイスボンディング部7に半導体チップ8を実装し、
ワイヤ9により導体パターン4aと電気的に接続させる
Resin-impregnated base material is paper, glass cloth, glass paper, S
It is manufactured by impregnating a base material such as MC with phenol resin, imide resin, epoxy resin, unsaturated polyester resin, etc. and drying it. A die bonding portion 7 is formed in a mounting recess provided directly on the surface of this printed circuit board 1 or by mechanical cutting such as milling, and a semiconductor chip 8 is mounted on this die bonding portion 7.
The wire 9 is electrically connected to the conductor pattern 4a.

この場合ワイヤ9を接続する導体パターン4a部分−二
は、スルホールランド ード線4bによりワイヤ9とのなじみをよくするため金
めっきを施しておく。このようにして半導体チップ8を
搭載したプリント基板1を外形加工線りに沿わせて打ち
抜き加工して半導体チップキャリアAを形成する。この
打ち抜き加工において、プリント基板1を振!l!IJ
打ち抜きプレスにより外形打ち抜きを行ってプリント基
板1の切断面2に位置する絶縁樹脂1vi3を振動エネ
ルギーにより溶融させてプリント基板1の切断面2の全
面に用波計?1層5を形成させて露出した導体4に!(
波計頂層5を被覆させる。振動打ち抜きプレスは、例え
ば振動条件をセットし、制御VC置の命令信号に従って
アクチュエータを作動させ、上下ポンチを振動させて行
う。ポンチの振動波形としては、例えば基本波形が50
11z,片振幅0.33mmの正弦波である。
In this case, the conductor pattern 4a portion-2 to which the wire 9 is connected is plated with gold in order to improve the familiarity with the wire 9 by the through-hole land wire 4b. In this way, the printed circuit board 1 with the semiconductor chip 8 mounted thereon is punched out along the contour line to form the semiconductor chip carrier A. During this punching process, shake the printed circuit board 1! l! I.J.
The outer shape of the printed circuit board 1 is punched out using a punching press, and the insulating resin 1vi3 located on the cut surface 2 of the printed circuit board 1 is melted by vibration energy to form a wave meter on the entire surface of the cut surface 2 of the printed circuit board 1. 1 layer 5 is formed on the exposed conductor 4! (
A wave gauge top layer 5 is applied. The vibration punching press is performed by, for example, setting vibration conditions, operating an actuator in accordance with a command signal from a control VC device, and vibrating the upper and lower punches. For example, the basic waveform of the punch vibration waveform is 50
11z, a sine wave with a half amplitude of 0.33 mm.

−lr))Ql+lイSill:”ニー1?−11デシ
ia4に.二$−...d4s−Ifj−Δにあっては
半導体チップ8の静電破壊は零となり、外周端面からの
吸湿は従来の約174〜1/2になった。
-lr))Ql+lISill:"Knee 1?-11 decia4.2$-...d4s-Ifj-Δ, the electrostatic damage of the semiconductor chip 8 is zero, and the moisture absorption from the outer peripheral end surface is It is about 174 to 1/2 of the conventional value.

尚、実用に際しては、エポキシ樹脂なとの封止用樹脂に
より半導体チップ8を樹脂封止し、スルーホール10に
端子ビンを保持させることによりビングリッドアレイと
して、又、スルーホール10を接続孔として8!能させ
ることによりリードレスチップキャリアとして使用でき
るものである。又、必要によりセラミック製などのカバ
ーにより半導体チップキャリアAを気ve!を止して実
用に供する。
In practical use, the semiconductor chip 8 is sealed with a sealing resin such as epoxy resin, and the through holes 10 hold terminal bins to form a bin grid array, and the through holes 10 can be used as connection holes. 8! By making this possible, it can be used as a leadless chip carrier. Also, if necessary, cover the semiconductor chip carrier A with a cover made of ceramic or the like! and put it into practical use.

[発明の効果j 本発明にあっては、プリント基板を振動打ち抜きプレス
により外形打ち抜きしてプリント基板の切断面に位置す
る絶縁用脂層を振動エネルギーにより溶融させてプリン
ト基板の切断面に露出する導体に樹脂被覆屑を被覆させ
るので、プリント基板の外形打ち抜きと同時にプリン)
基板の切断面に露出する導体に樹脂被覆層を被覆でき、
従来の如く、樹j1ケコーティング等の別処理を必要と
する−とがなく、実装した半導体チップが取り扱い者の
静電気により破壊することがなく、しかも切断面からの
吸湿も抑制でき、耐湿性の高い半導体チップキャリアを
製造することができる。
[Effects of the Invention j] In the present invention, a printed circuit board is punched out by a vibration punching press, and an insulating fat layer located on the cut surface of the printed circuit board is melted by vibration energy and exposed on the cut surface of the printed circuit board. Since the conductor is coated with resin coating waste, it is printed at the same time as the outer shape of the printed circuit board is punched out.
The conductor exposed on the cut surface of the board can be coated with a resin coating layer,
Unlike conventional methods, there is no need for additional processing such as wood coating, and the mounted semiconductor chip will not be destroyed by static electricity from the handler.Moreover, moisture absorption from the cut surface can be suppressed, making it highly moisture resistant. It is possible to manufacture high quality semiconductor chip carriers.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例における打ち抜き萌のプリン
ト基板を示1平面図、第2図は第1図のX−X断面図、
第3図は同上により製造した半導体チップキャリアを示
す一部省略斜視図、第4図は第3図のY−Y断面図であ
って、Aは半導体チップキャリア、1はプリント基板、
2は切断面、3は絶縁樹脂層、4は導体、5は樹脂被覆
層である。
Fig. 1 is a plan view showing a printed circuit board of a punched type according to an embodiment of the present invention, Fig. 2 is a sectional view taken along line XX in Fig. 1,
FIG. 3 is a partially omitted perspective view showing a semiconductor chip carrier manufactured by the same method as above, and FIG. 4 is a YY cross-sectional view of FIG. 3, in which A is a semiconductor chip carrier, 1 is a printed circuit board,
2 is a cut surface, 3 is an insulating resin layer, 4 is a conductor, and 5 is a resin coating layer.

Claims (1)

【特許請求の範囲】[Claims] (1)プリント基板を所定寸法に切断する外形加工法で
あって、プリント基板を振動打ち抜きプレスにより外形
打ち抜きしてプリント基板の切断面に位置する絶縁樹脂
層を振動エネルギーにより溶融させてプリント基板の切
断面に露出する導体に樹脂被覆層を被覆させることを特
徴とするプリント基板の外形加工法。
(1) An external shape processing method in which a printed circuit board is cut into predetermined dimensions, in which the printed circuit board is punched out using a vibration punching press, and the insulating resin layer located on the cut surface of the printed circuit board is melted by vibration energy to form the printed circuit board. A printed circuit board external shaping method characterized by coating a conductor exposed at a cut surface with a resin coating layer.
JP522086A 1986-01-14 1986-01-14 External work of printed board Pending JPS62163390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP522086A JPS62163390A (en) 1986-01-14 1986-01-14 External work of printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP522086A JPS62163390A (en) 1986-01-14 1986-01-14 External work of printed board

Publications (1)

Publication Number Publication Date
JPS62163390A true JPS62163390A (en) 1987-07-20

Family

ID=11605112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP522086A Pending JPS62163390A (en) 1986-01-14 1986-01-14 External work of printed board

Country Status (1)

Country Link
JP (1) JPS62163390A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006194927A (en) * 2005-01-11 2006-07-27 Casio Comput Co Ltd Manufacturing method of circuit board device
JP2007198709A (en) * 2006-01-30 2007-08-09 Toyox Co Ltd Fluid heat insulation multi-bundle hose
WO2018211883A1 (en) * 2017-05-18 2018-11-22 株式会社村田製作所 Method for manufacturing resin multilayer substrate, resin multilayer substrate, and mounting structure of resin multilayer substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5624038U (en) * 1979-07-31 1981-03-04
JPS60213499A (en) * 1984-04-09 1985-10-25 株式会社 ハ−モ Cutter for plastic molded shape by ultrasonic wave

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5624038U (en) * 1979-07-31 1981-03-04
JPS60213499A (en) * 1984-04-09 1985-10-25 株式会社 ハ−モ Cutter for plastic molded shape by ultrasonic wave

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006194927A (en) * 2005-01-11 2006-07-27 Casio Comput Co Ltd Manufacturing method of circuit board device
JP2007198709A (en) * 2006-01-30 2007-08-09 Toyox Co Ltd Fluid heat insulation multi-bundle hose
WO2018211883A1 (en) * 2017-05-18 2018-11-22 株式会社村田製作所 Method for manufacturing resin multilayer substrate, resin multilayer substrate, and mounting structure of resin multilayer substrate

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