JPS62159559A - Demodulator control system - Google Patents

Abstract

PURPOSE:To attain the recovery of a correct carrier wave quickly even when a frequency deviation between a received carrier and a reference carrier in a demodulator is large by using a detection signal of frame synchronization establishment and an estimated value of a line bit error rate and sweeping the reference carrier frequency in the demodulator while changing the speed. CONSTITUTION:A reference carrier sweep circuit 7 sweeps an area of a frequency deviation to be copnsidered at a high speed and since an optimum point is lost if the area is swept at a high speed until the deviation becomes 0, the sweep speed slows down when a certain deviation remains. A frame synchronization detection circuit 8 detects the frame synchronizing establishment and a line bit error rate estimation circuit 9 estimates a value deteriorated more than that at the normal state, then the changeover timing is selected. When the sweep of the reference carrier slows down and the optimum point is approached so as to eliminate the frequency deviation gradually, the eye of a demodulation signal 13 is opened completely and the estimated line bit error rate arrives within the normal range. The timing is acquired to stop the sweep of the reference carrier momentarily. The carrier is recovered by the control above.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a control method for a demodulator, and particularly to a control method for a PSK demodulator using a synchronous detection method.

[Conventional technology]

Conventionally, a PSK demodulator using a synchronous detection method uses Kostav*I
L - + IJ: Y resignation and one 同 同 １ 括 括 括 括 括 括 括 括 小 小 括 小 括 括 小 括 小 小 小 小 括 小 小 小 小This control was dependent only on the carrier wave regeneration circuit.

FIG. 6 shows an example of a conventional type, in which a carrier wave recovery circuit 1, a clock recovery circuit 2. Low-pass filter 3°φ converter 4. It consists of a reference carrier generator 5 and a multiplier 6. In this circuit, the frequency of the reference carrier generator 5 is controlled by the carrier regeneration circuit 1 so that there is no deviation between the carrier frequency component of the modulated wave 11 and the frequency of the reference carrier 12.

[Problem that the invention seeks to solve]

However, the permissible frequency deviation of the carrier wave that can be reproduced by the carrier wave regeneration circuit of the demodulator described above is limited, and the frequency fluctuation in the actual transmission path is also generally small. Therefore, in the control method that depends only on the performance of the carrier wave recovery circuit described above, the carrier wave frequency received through the transmission path is
If the distance is greater than the allowable frequency deviation from the reference carrier frequency.

The disadvantage is that the carrier wave cannot be reproduced and correct demodulation cannot be performed.

An object of the present invention is to provide a demodulator control method that eliminates these drawbacks.

[Means for solving problems]

The demodulator control method of the present invention is configured to sequentially perform a 9th order three-step process. First, the reference carrier frequency in the demodulator is swept at high speed by a reference carrier sweep circuit. Next, the frame synchronization detection circuit detects the establishment of frame synchronization between the two communication data circuits, and at the same time, when the line bit error rate estimation circuit estimates that the bit error rate of one line is worse than normal, the reference carrier sweep circuit Instantly slow down the sweep speed. Finally, as soon as the estimated line bit error rate of the 9 line bit error rate estimating circuit falls within the normal range, the reference carrier sweep circuit stops sweeping. The above-mentioned operations are performed in sequence to control so that a correct reproduction reference carrier wave is obtained.

[Example] Next, an example of the present invention will be described in detail with reference to two drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.

In addition to the conventional configuration shown in FIG. 6, a reference carrier wave sweep circuit 7. controls the frequency of the reference carrier generator 50. The frame synchronization detection circuit 89 detects the establishment of frame synchronization, the line bit error rate estimation circuit 9 estimates the line bit error rate, and an adder 10.

In FIG. 1, a received modulated wave 11 is multiplied by a reference carrier wave 12 outputted from a reference carrier wave generator 5. In FIG. Here, the deviation between the carrier wave frequency component of the modulated wave 11 and the reference carrier wave frequency is often larger than the frequency deviation that can be reproduced by the carrier wave regeneration circuit 1. Therefore, the range of possible frequency deviations is swept at high speed by the reference carrier wave sweep circuit 7. Sweep at high speed until the deviation becomes 0.

Since the optimum point will be missed, the sweep speed should be slowed down when the deviation has disappeared to a certain extent. The timing of this switching is when the frame synchronization detection circuit 8 detects the establishment of frame synchronization and the 9-line bit error rate estimating circuit 9 estimates a value worse than that under normal conditions.

At this point, as shown in FIG. 2, the eye of the demodulated signal 13 is not completely open and strikes a negative point.

This is due to false detection of synchronization. By slowing down the sweep of the reference carrier wave and gradually approaching the optimum point so that the frequency deviation disappears, the eye of the demodulated signal 13 opens completely and rises above the line bit error rate, as shown in Figure 3. The carrier wave is regenerated by control.

An example of the reference carrier sweep circuit 7 described above is shown in FIG.

In FIG. 4, a sweep determiner 104 that controls a sweep speed selection switch 103 determines which state is in the three stages of control based on a frame synchronization establishment detection signal 101 and a line bit error rate estimated value 102. counter 105
Select the speed of the clock sent to. That is, the 2 selection switch 103 is controlled to switch between high speed (H in the figure), low speed (L in the figure), and stop (S in the figure). counter 1
05 is converted into an analog signal by a converter 106 at the speed of the sent clock and sent to the reference carrier generator 5 as a control signal 107. 109 is an oscillator, 11O
is a 1/N frequency divider.

FIG. 5 shows an example of the output of the D/A converter 106 shown in FIG.

〔Effect of the invention〕

As explained above, the demodulator control method of the present invention has the advantage that even if the frequency deviation between the received carrier wave and the reference carrier wave in the demodulator is large, it is possible to reproduce the correct carrier wave, and moreover, it can be reproduced quickly.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention. FIG. 2 is a diagram showing a demodulated signal when synchronization is incorrectly detected. FIG. 3 is a diagram showing a demodulated signal during normal operation. FIG. 4 is a diagram showing an example of a reference carrier wave sweep circuit. FIG. 5 is a diagram showing an example of a control signal for the reference carrier generation circuit. FIG. 6 shows a conventional demodulator control system in block M.1...Carrier recovery circuit, 2...Clock recovery circuit. 3...Low pass filter, 4...Vo converter, 5...
... Reference carrier wave generator, 6... Multiplier, 7... Reference carrier wave sweep circuit, 8... Frame synchronization detection circuit, 9.
... Line bit error rate estimation circuit, 10... Adder. Figure 4 Figure 6 Figure 6

Claims (1)

[Claims] 1. In a PSK demodulator using a synchronous detection method, the reference carrier frequency within the demodulator is swept at a varying speed by a reference carrier sweep circuit using a detection signal for establishing frame synchronization and an estimated value of the line bit error rate. A demodulator control method that is characterized by controlling the carrier wave so that it can reproduce the carrier wave accurately.