JPS62157397A - Sensing amplifier - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to sense amplifiers for integrated circuits, in particular for RAM memories and similar devices manufactured by N-channel MOS or P-channel MO5 technology. Pertains to sense amplifiers.

[Prior Art] As is well known, a two-branch differential sense amplifier is used to sense the switching on and off of a bit line in a RAM memory, and in the same amplifier, a normal form and a reverse form bit line are detected. A signal is applied to the gate of each MOS l-transistor, and the MO
The drains of the Sl-transistors, which are fed through resistive or similar loads, provide the normal and reverse output signals, respectively.

[Technical Problem] An object of the present invention is to provide a sense amplifier that accommodates a differential gain larger than the gain of known amplifiers, and which is capable of increasing the difference between output differential signals when the input signals are the same. The present invention provides a new configuration of sense amplifiers for N-channel MOS integrated circuits suitable for incorporation into standard logic circuits.

Another object of the invention is to provide an amplifier having a response speed faster than that of known amplifiers, thereby enabling RAM memories and similar devices to operate at faster speeds than were hitherto possible. is to provide.

Yet another object of the invention is to adapt the above amplifier for wire-OR combination in parallel with other similar amplifiers,
This makes it possible to select just one or several of the amplifiers mentioned above by applying a control signal to the control input of the selected amplifier.

[Means for the Technical Problem] The above objects and advantages will become clear from the description given below. in a sense amplifier, wherein the drains of the first and second transistors are respectively coupled to a differential output signal line; said 52 transistors are coupled to sources of said third and fourth transistors, drains of said third and fourth transistors being coupled to a supply voltage source, and said gate of said third transistor being coupled to said 52 transistors; , while the gate of said fourth transistor is coupled to the gate of said first transistor.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Particularly preferred embodiments of the invention will now be described in detail, by way of example only, with reference to the accompanying drawings, in which: FIG.

As shown in FIG. 1, a conventional configuration of a sense amplifier in MOS technology includes a pair of high gain transistors 10, ]:2;
The gates of the same transistors are connected by the bit line BL and its complement BL", respectively i + JJ]. The sources of the two transistors l (1, 12 are connected to the control transistor (
or strobe transistors) 14, the gate of the control transistor is driven by the control line, and the drains of the transistors 10.12 are each coupled to two resistive loads 18.18, with the positive supply A voltage Vcc is supplied.

At the ends of this resistive load are output differential signals OUT'', OUT of complementary and normal signals, respectively.

The resistive load 16, 18 may consist of an integrated resistor, but is most commonly a circuit generally considered a power supply, the "enhancement type" being a transistor with a fixed biased gate of the "depression" type. It is composed of various complicated circuits.

Furthermore, the control transistor 14 is considered a power supply, the value of which is determined by the power supply (voltage), such as a strobe or enable signal, for example, obtained by a read or write command, sent by a microprocessor to a RAM memory containing a sense amplifier therein. controlled by

A sense amplifier according to the present invention will be explained using FIG. The amplifier according to the present invention (transistor 10 in FIG.
．． 12), the gates of which are driven by differential signals BL, BL''.

The sources of the two transistors 20,22 are both coupled in a manner similar to that described above to a control transistor 24 driven by a strobe signal.

The drain of the transistor 20.22, instead of being coupled to a fixed resistive load, is coupled to the sources of two transistors 26.28, the gates of which are respectively connected to the gates of the transistors 20.22, i.e. the signals BL, It is connected to BL', but it is cross-linked. Finally, the drains of transistors 26 and 28 have
The supply voltage cc is supplied via another control transistor 30 which is driven by the same signal as that which drives the control transistor 24.

The output difference lines OUT, OUT” are again in this case,
Extending from the drain of transistor 20.22, a "pull-up" resistor 32.34 is preferably, but not necessarily, provided to the supply voltage, as shown in FIG. The output of the amplifier is maintained at the condition selected by the control signal when the amplifier is not being strobed by the control signal.

When the signal BL is applied simultaneously to both transistors 20.28 (while the complementary signal BL'' is applied simultaneously to the transistor 22.25), the switching speed of the circuit increases, while the range of the signals UT, OUT' is effectively the supply voltage. It will be clear that it extends to the complete difference in ground.

In practice, the known amplifier resistive load 16.1 permanently cuts off the amplitude of the supply voltage depending on its action.
8 is here replaced by a circuit element that changes in response to the human input signal, keeping the control signal low (in positive logic) in order to increase the voltage provided as an output signal in the appropriate direction. Transistor 20
．． The value of the current flowing through 22 can be adjusted up to 100%.

That is, by using a control signal as a strobe signal, it is possible to use multiple sense amplifiers coupled in parallel.

Two sense amplifiers 40, each constructed in accordance with the present invention.
42 such a parallel arrangement is shown in FIG.

It should be pointed out that although in FIG. 3 only two amplifiers are shown for simplicity, in practice this number is usually much larger, for example 8.16 or more.

Two amplifiers 40, 42, respectively, each pair of differential signals BLI, BL, corresponding to two different bit lines.
", BL2.BL2" is received. Each of the two amplifiers further receives a respective control signal CI, C2. The output lines of the two amplifiers are coupled into a wired OR'' line OUT.

Give the car-differential signal to ``OUT'', and especially to the same line,
Individual pull-up resistors 44, 46 are provided for all of the sense amplifiers thus incorporated.

OUT the pair of differential signals corresponding to the strobed single sense amplifier signals BL, BL'' by the control signals CI+C2 by enabling only one and keeping the other low.

OUT”. Under special conditions, for example when the amplifier is isolated (i.e. not coupled in parallel to other similar amplifiers), the control transistor 3
0 may be omitted; in this case, the transistor 26.
28 trains are coupled directly to the power supply.

Obviously, the circuit described above may be modified as described or otherwise, whether for positive logic or negative logic, without departing from the spirit of the invention.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram of a typical known sense amplifier made by N-channel MOS technology. FIG. 2 is a circuit diagram of a sense amplifier according to the present invention. FIG. 3 is a block circuit diagram illustrating a particularly advantageous application of the sense amplifier of FIG.

Claims (1)

Claims: 1, a first transistor and a second transistor, the gates of the transistors being driven by a drive signal and a complementary signal thereof, respectively, and the sources of the transistors both being coupled to a control circuit element; , the drains of the transistors are each coupled to a differential output signal line.
In a sense amplifier for an integrated RAM memory according to the present invention, the drains of said first and second transistors are coupled to the sources of said third and fourth transistors, respectively; a drain of the third transistor is coupled to a supply voltage source, a gate of the third transistor is coupled to a gate of the second transistor, and a gate of the fourth transistor is coupled to a gate of the first transistor. A sense amplifier characterized in that: 2. The sense amplifier according to claim 1, wherein said supply voltage source is constituted by a fixed power source. 3. The control circuit element is composed of transistors,
said supply source comprises another transistor coupled between the drains of said third and fourth transistors and a fixed power supply source, said gate of said other transistor being a gate of said control transistor; Sense amplifier according to claim 1, characterized in that it is coupled to. 4. A sense amplifier according to claim 1, wherein the output lines of said first and second transistors are coupled to respective pull-up circuit elements.