JPS62157000U - - Google Patents

Info

Publication number
JPS62157000U
JPS62157000U JP3187986U JP3187986U JPS62157000U JP S62157000 U JPS62157000 U JP S62157000U JP 3187986 U JP3187986 U JP 3187986U JP 3187986 U JP3187986 U JP 3187986U JP S62157000 U JPS62157000 U JP S62157000U
Authority
JP
Japan
Prior art keywords
output
signal
synthesizer
delay
integrator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3187986U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3187986U priority Critical patent/JPS62157000U/ja
Publication of JPS62157000U publication Critical patent/JPS62157000U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の一実施例の回路ブロツク図
である。 1…合成器、2…△M変調器、3…RAM、4
…カウンタ、8…積分器、9…可変減衰器。
FIG. 1 is a circuit block diagram of an embodiment of the present invention. 1...Synthesizer, 2...△M modulator, 3...RAM, 4
...Counter, 8...Integrator, 9...Variable attenuator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アナログ入力信号を後記の積分器出力と合成す
る合成器と、該合成器の出力を△M変調する変調
器と、△M符号化信号を入力して遅延を与える遅
延器と、該遅延信号を積分してアナログ遅延信号
を作成する積分器とを有し、該積分器の出力を後
続回路に出力するとともに、減衰器を介して入力
側の前記合成器に帰還して、入力信号に残響付加
効果を与えることを特徴とする残響付加回路。
A synthesizer that combines an analog input signal with an integrator output (described later), a modulator that modulates the output of the synthesizer by ΔM, a delay device that inputs the ΔM encoded signal and provides a delay, and a delay signal that outputs the delayed signal. The output of the integrator is output to the subsequent circuit, and is also fed back to the input side synthesizer via an attenuator to add reverberation to the input signal. A reverberation adding circuit characterized by giving an effect.
JP3187986U 1986-03-07 1986-03-07 Pending JPS62157000U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3187986U JPS62157000U (en) 1986-03-07 1986-03-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3187986U JPS62157000U (en) 1986-03-07 1986-03-07

Publications (1)

Publication Number Publication Date
JPS62157000U true JPS62157000U (en) 1987-10-05

Family

ID=30838021

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3187986U Pending JPS62157000U (en) 1986-03-07 1986-03-07

Country Status (1)

Country Link
JP (1) JPS62157000U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59121094A (en) * 1982-12-27 1984-07-12 松下電器産業株式会社 Reverberation apparatus

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59121094A (en) * 1982-12-27 1984-07-12 松下電器産業株式会社 Reverberation apparatus

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