JPS62154776A - Surge absorbing element - Google Patents

Abstract

PURPOSE:To obtain an element, by which an arbitrary breakdown voltage is obtained with good design property and a large current can be absorbed with a dynamic current phenomenon being suppressed, by absorbing a surge current by punch through between specified semiconductor regions, and controlling a holding current in a recombination region. CONSTITUTION:On the main surface side of a first semiconductor region (first conductivity type) 1, a second semiconductor region (reverse conductivity type), which forms a p-n junction diode, is provided. A third region 3 is contacted with the region 2 at its side opposite to the side of the region 1. Thus the region 3 specifies the effective thickness of the region 2. A fourth semiconductor region (reverse conductivity type) 4 is separated from the region 2 in the lateral direction and forms an implanted junction together with the region 1. A carrier recombination region 1R is provided at either or both of the following parts: a part between the regions 2 and 4 on said one surface side of the region 1; and at least parts beneath the region 2 and the region 4 at the back surface of the region 1. A surge current is generated by punch through between the region 1 and the region 3 when a depletion layer yielded by a reverse bias to said p-n junction diode reaches the region 3. With the surge current being absorbed, a holding current is controlled with the recombination region 1R.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a surge absorption element for protecting an electric circuit system from abnormal voltages caused by various surge factors such as lightning and switching surges, and in particular, the present invention relates to a surge absorption element for protecting an electric circuit system from abnormal voltages caused by various surge factors such as lightning and switching surges. This invention relates to a surge absorbing element using.

<Prior art> A surge absorbing element is a surge absorbing element that, when a high voltage higher than a specified voltage value called ``breakdown voltage'' is applied, it forms an equivalent low-impedance current line within itself in the subsequent process. , which absorbs the large current associated with the high voltage and clamps the voltage across the element below a certain voltage value to prevent the abnormal voltage from affecting the electrical circuit system to be protected. The operating mechanism of most of the devices used for this purpose was based on the avalanche yield principle.

That is, the avalanche breakdown voltage when a reverse bias is applied to a pn junction diode structure or a transistor diode connection structure is used to define the breakdown voltage as a surge absorbing element.

<Problems to be solved by the invention> In the conventional surge absorption element based on the avalanche yield principle,
As mentioned above, the avalanche breakdown voltage itself directly defines the "breakdown voltage" used when discussing the characteristics of a surge absorbing element.

However, on the other hand, the avalanche breakdown voltage in such conventional elements depends on the impurity concentration of one of the semiconductor regions forming the high resistivity side of the two regions forming the pn junction, and thus generally of the semiconductor substrate. It is decided that

Therefore, in such conventional avalanche breakdown type surge absorbing elements, as long as semiconductor substrates with the same impurity concentration are used, it is impossible or extremely difficult to change the breakdown voltage arbitrarily, and it is difficult to obtain products with different breakdown voltages. Therefore, semiconductor substrates with different impurity concentrations must be used accordingly.

Not only is this in itself unreasonable, but changing the breakdown voltage causes changes in junction capacitance, series resistance, etc.
Other electrical characteristics besides breakdown voltage will also change. In other words, the junction capacitance and iμ series resistance cannot be designed independently of the breakdown voltage.

Conversely, in such conventional devices, even if each loft is within the allowable tolerance range, the impurity concentration varies from the beginning between different lofts. In the case where the board has been supplied, and even if this was known in advance, there is no easy way to correct this, and the result is that the surge absorbing element after it is completed as a product. It is honestly reflected as loft-to-loft variations or variations in breakdown voltage.

Furthermore, in this type of conventional avalanche breakdown type surge absorbing element, there are often limitations in the actual physical structure.

This is because, in this type of surge absorbing element, when the second semiconductor region is buried by diffusion of impurities into the first semiconductor region, avalanche breakdown is generally likely to occur from the electric field concentration areas at both ends of the junction. This is because it becomes extremely difficult to uniformly flow current over the entire area of the junction when clamping the input voltage after breakdown.

In addition to these drawbacks, the conventional device described above also has the drawback that the voltage across the device (clamp voltage) does not become very low when the input voltage is clamped after breakdown. In the case of avalanche breakdown, the clamp voltage is rather higher than the breakdown voltage at which avalanche breakdown begins.

is the product of this clamp voltage and the absorption current, which is quite high in absolute value, resulting in a large amount of heat generation in the device. It means to produce one limit.

This last drawback can be solved by reducing the clamp voltage during surge absorption to a sufficiently low voltage compared to the breakdown voltage.
This type of surge absorption element is inserted between the power supply part of the circuit system to be protected and the tuft in parallel to the load, so the clamp voltage of the element used is sufficiently low and lower than the power supply voltage of the power supply part. If the voltage is low, once the element is turned on due to a surge, it will remain turned on even if the surge factor disappears, and power supply energy will continue to be wasted. This phenomenon is especially called the "follow-on effect."

Therefore, if it is possible to set the holding current (Ih, described later) for maintaining this type of surge absorbing element in the turned-on state to a value higher than the current value supplied from a device such as a power supply, it is possible to , the device will automatically reset without causing a follow-on phenomenon.

The present invention has been made in view of the conventional circumstances and various shortcomings as described above, and it is possible to improve designability to a considerable extent regardless of the impurity concentration, resistivity, or thickness of the semiconductor substrate used. It is possible to obtain an arbitrary breakdown voltage, and therefore, other electrical characteristics such as junction capacitance and series resistance can be designed independently regardless of the breakdown voltage, and furthermore, it is possible to create a configuration in which the holding current can be controlled. By disclosing the present invention, it is possible to provide a surge absorption element that can absorb large currents while effectively suppressing follow-on current phenomena by setting a holding current value higher than the normal current value supplied from a power source, etc. This is what I am trying to do.

〈Means for solving problems〉 In order to achieve the above object, in the present invention.

In place of the conventional avalanche breakdown type, a punch-through phenomenon is introduced as a new operating principle, and a punch-through type surge absorption element having the following configuration is provided.

l) a first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; and a first semiconductor region formed on one surface side of the first semiconductor region; The one conductivity type is the opposite conductivity type, and the p
A second semiconductor region forming an n-junction diode; By contacting the second semiconductor region from the opposite side to the first semiconductor region, the separation distance between the second semiconductor region and the first semiconductor region can be reduced. a third region that defines the effective thickness of the second semiconductor region; a third region that is formed on the one surface side of the first semiconductor region and spaced apart from the second semiconductor region in the lateral direction; a fourth region forming an injection junction; a fourth region on the one surface side of the first semiconductor region and on the one surface side of the second semiconductor region and the fourth region, the one surface of the second semiconductor region; and a carrier recombination region provided on one or both of at least a portion of at least a portion from below the second semiconductor region to below the fourth region on the back surface side opposite to the pnm combination diode; Controlling a holding current in the recombination region while absorbing a surge current due to bunch through between the first semiconductor region and the third region, which is produced when the depletion layer produced in the third region reaches the third region: A surge absorption element featuring:

2) a first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; a second semiconductor region having a conductivity type opposite to the one conductivity type and forming a first pn junction diode with the first semiconductor region; a third region that defines an effective thickness of the second semiconductor region by contacting the first semiconductor region; a third region that defines the effective thickness of the second semiconductor region by contacting the first semiconductor region; A pn junction diode is formed horizontally apart from the second semiconductor region, is of a conductivity type opposite to the first conductivity type, and is disposed between the first semiconductor region and the first pn junction diode in a direction opposite to the first pn junction diode. a fourth semiconductor region forming a second pn junction diode; contacting the fourth semiconductor region from the opposite side to the first semiconductor region, thereby reducing the separation distance between the fourth semiconductor region and the first semiconductor region; a third region that defines the effective thickness of the fourth semiconductor region; a third region that is located on the one surface side of the first semiconductor region and on the one surface side of the second semiconductor region and the fourth semiconductor region; a carrier recombination region provided in one or both of at least a portion from below the second semiconductor region to below the fourth semiconductor region on the back surface side opposite to the one surface of the second semiconductor region; the first semiconductor formed when a depletion layer generated by reverse biasing one of the first and second two pn junction diodes reaches either the corresponding third region or fifth region; A surge absorption element characterized by: controlling a holding current in the recombination region while absorbing a surge current by bunch-through between the region and the third region or the first semiconductor region and the third region.

(Function) In the surge absorbing element of the first invention, when a reverse bias is applied to the pn junction diode constituted by the first semiconductor region and the second semiconductor region, a depletion is generated in the junction. As the layer extends toward the first semiconductor region, it also extends toward the third region.

When this depletion layer continues to grow according to the magnitude of the applied voltage and eventually reaches the third region, bunch-through occurs between the first semiconductor region and the third region, and a surge occurs through this current path. Current begins to be absorbed. This bunch-through operation starting voltage is shown as the breakdown voltage in FIG.

However, since this absorbed current flows along a path from the fourth region to the first semiconductor region, as mentioned in the abstract, the fourth region can inject minority carriers into the first semiconductor region. As long as it is made of a material that forms a junction (for example, a semiconductor or silicide of a conductivity type opposite to that of the first semiconductor region, or even a metal capable of injecting electrons if the first semiconductor region is p-type). , minority carriers are injected from the fourth region into the first semiconductor region, and therefore even if the second semiconductor region and the third region are electrically short-circuited via the external terminal, the minority carriers are injected into the first semiconductor region. As a result of flowing into the two semiconductor regions, a voltage drop occurs in the second semiconductor region, and carrier injection occurs from the third region into the second semiconductor region.

While this carrier injection process is being reversed, eventually a current exceeding the value shown as the breakover current in Figure 2 will be generated, and through a positive feedback phenomenon, the current will flow across the device. The voltage, ie, the clamp voltage, becomes extremely low. Therefore, the surge absorbing element of the present invention can absorb large currents while suppressing heat generation of the element.

Note that the voltage that exhibits a breakover current is
This breakover voltage, which can be referred to as an overvoltage, is generally higher than the breakdown voltage, as shown in FIG.

Therefore, if we follow the voltage history across the device from its initial operation to voltage clamping, we can see that with surge application,
If it is above the breakdown voltage, punch-through operation will begin, and the voltage across the device will rise somewhat until the absorbed current reaches the breakover current, but once the breakover current is exceeded, the breakover current will rise. Move from overvoltage to extremely low clamp voltage.

The value of the breakover current is determined by the resistance of the second semiconductor region, the shape of the third region with respect to the first semiconductor region, the shape of the fourth region with respect to the first semiconductor region, and further, as described below. When the first semiconductor region is directly connected to an external terminal, it can be determined depending on the resistance of the first semiconductor region and the shape of the vicinity of the fourth region.

On the other hand, considering the breakdown voltage that starts the punch-through operation, in the surge absorbing element of the present invention, to what extent is the height position of the third semiconductor region that is in contact with the second semiconductor region on the opposite side with respect to the first semiconductor region? In other words, depending on how much the effective thickness of the intermediate second semiconductor region is set, the bunch-through voltage between the first and third regions, that is, the breakdown voltage can be arbitrarily changed and controlled. Become something.

For example, if the effective thickness of the intermediate second semiconductor region is set thick, a larger reverse bias will be required for the generated depletion layer to extend to the third region, assuming other conditions are the same. This ultimately increases the breakdown voltage at which the device breaks down, and conversely, if the effective thickness of the intermediate second semiconductor region is set thin, the generated depletion layer can easily become the third semiconductor region even at a relatively low applied voltage. This means that the breakdown voltage has been set low.

Of course, such breakdown voltage can also be controlled by the impurity concentration of the intermediate second semiconductor region.

In any case, in view of the above, in the case of the present invention, it is possible to use an appropriate commercially available semiconductor substrate wafer as the first semiconductor region as it is, and also to use the same type of semiconductor substrate as the starting material. It can be seen that a surge absorbing element with a desired breakdown voltage can be obtained.

Furthermore, by appropriately controlling the effective thickness of the second semiconductor region and its impurity concentration, it becomes possible to design the junction capacitance and series resistance independently for any breakdown voltage.

Furthermore, the method of sequentially forming the second semiconductor region and the third region on the semiconductor substrate itself or on the first semiconductor region formed separately on the semiconductor substrate may be performed using existing epitaxial growth technology. However, it is also possible to use ion implantation, selective diffusion, etc., but in any case, the effective thickness and impurity concentration of the second semiconductor region can be extremely well controlled even with the current technology, so in the end, the present invention The surge absorption element made by .

If necessary, the accuracy can be made extremely high.

On the other hand, from a structural point of view, the effective thickness of the second semiconductor region can be set thin regardless of the thickness of the first region. It can also be used as is without pre-processing (which is also more common), so it does not require an increase in the number of steps or decrease in physical strength, and can be used as a single semiconductor substrate. It is also possible to form a plurality of elements of the present invention within the device, which has the effect of facilitating integration.

In addition to these, in the structure of the present invention, there is a part on one surface side of the first semiconductor region between the second semiconductor region and the fourth region, and a part opposite to the one surface of the first semiconductor region. Since a carrier recombination region is provided in one or both of at least a portion (the entire portion if necessary) from below the second semiconductor region to below the fourth region on the back side, the reference numeral in FIG. The value of the holding current shown in 1h can also be controlled.

That is, while the current injected from the fourth region is small,
Minority carriers that try to pass through or near areas where these carrier recombination regions are provided recombine with majority carriers in the carrier recombination regions, but as the current increases, the recombination speed decreases. A mechanism occurs in which minority carriers cannot keep up with the carrier supply speed and begin to pass directly through the recombination region or its vicinity, resulting in a mechanism in which the device eventually turns on. In this case, more current must flow than in the case without, and the holding current can be controlled.

In practice, such carrier recombination regions are formed as regions with many crystal defects due to abrading, etc., or are formed as regions with many crystal defects due to abrading, etc.
) It can also be formed by a double-barrel junction or by thermal diffusion of heavy metals such as iron or gold, but the value of the holding current controlled by this method depends on the area and depth of the carrier recombination region to be formed. Furthermore, when the recombination region is formed using crystal defects or heavy metals, it can be set to a desired value with a considerable degree of freedom in design, depending on factors such as the concentration of recombination centers.

In this way, the ability to control the holding current rh means that there is no surge factor and the holding current value can be increased to a value greater than the minimum current value supplied from the power supply or other equipment under normal operating conditions. This means that the following current phenomenon described above can be effectively prevented, and the device can also be automatically reset after the surge factor disappears.

Further, as is clear from the above principle, the second semiconductor region and the fifth region may be placed at the same potential at the external terminal,
Therefore, it is possible to draw out to the outside from the same drawing terminal, but conversely, it is also possible to draw out from each dedicated terminal independently and apply an appropriate bias between these two terminals. Then, even after the device is completed or even when the device is in operation, the punch-through voltage, that is, the breakdown voltage as a surge absorbing device, can be made variable by changing and adjusting the bias voltage.

Note that, as is clear from the above, the breakover voltage naturally changes as the breakdown voltage changes.

In contrast to the first invention, the second invention is capable of absorbing surge currents of one polarity.

That is, the fourth region is limited to semiconductors and is considered to be a region equivalent to the second semiconductor region in the first invention,
Similarly, if the fifth region is considered to be a region equivalent to the third region in the first invention, it corresponds to the pn junction diode in the first invention constituted by the first semiconductor region and the second semiconductor region as described above. The punch-through phenomenon that can occur in the first pn junction diode in the second invention is due to the reverse bias of the second pn junction diode constituted by the first semiconductor region and the fourth semiconductor region with respect to a surge current of opposite polarity. The same result will occur.

In other words, when punch-through occurs in the second pn junction diode between the first semiconductor region and the fourth semiconductor region, the second semiconductor region is not a semiconductor in the description of the first invention. The function of the fourth area when configured,
will be running a business.

For this reason, the explanations regarding the second semiconductor region can be applied to the fourth semiconductor region, and the explanations regarding the third region can be applied as is to the fifth region, and other considerations are also ignored. .

Therefore, the advantages that the surge absorbing element of the first invention had, such as a sufficiently low clamping voltage and good flexibility in arbitrarily designing breakdown voltage and holding current, are exactly the same as those of the surge absorbing element of the second invention. It can also be demonstrated in

In addition, in this second invention, each carrier recombination region for setting and controlling the holding current value is determined depending on the physical or geometrical arrangement relationship, such as whether the carrier recombination region is close to the second semiconductor region or the fourth semiconductor region. It is also possible to intentionally vary the holding current value depending on the polarity.

<Examples> Some of the illustrated embodiments of the present invention will be described in detail below. Of course, there are individual embodiments for the first invention and the second invention, but as already mentioned, the two are extremely closely related and can be referred to from each other.

The surge absorbing element 10 shown in FIG. 1 is one of the basic embodiments according to the first invention, and uses the semiconductor substrate as it is as the first semiconductor region 1 of the first conductivity type, and uses the semiconductor substrate as it is as the first semiconductor region 1 of the first conductivity type. , a second semiconductor region 2 . While the third region 3 is formed using a double diffusion technique, the fourth region 4 is formed laterally apart from the second semiconductor region 2.

Hereinafter, for convenience, the side where these regions 2, 3.4 are located will be referred to as the front surface of the semiconductor substrate l, and the surface opposite thereto will be referred to as the back surface.

In the above-mentioned relationship between the regions, in this embodiment, the first semiconductor region 1 is an n-type semiconductor, so by diffusion technology of an appropriate impurity such as boron, the second semiconductor region 2 is made p-type, and the second semiconductor region 1 is made p-type. The fourth region 4 is also a p-type semiconductor region.

On the other hand, since the third region 3 forms one end of the main current line when punch-through occurs, it is preferable that the third region 3 has high conductivity. The medium-sized region is formed by double diffusion of impurities into the second semiconductor region 2. In practice, this can be obtained by high concentration phosphorous diffusion or the like.

Furthermore, as shown by the solid line in the figure, the carrier recombination region IR is located at least in a portion from below the second semiconductor region 2 to below the fourth semiconductor region 4 (in the case shown) on the back side of the semiconductor substrate l. are formed in the portions that straddle parts of both the viewing areas 2 and 4), or are formed in the second semiconductor region on the surface side of the semiconductor substrate 1, as shown by the imaginary lines in the figure. 2 and the fourth semiconductor region 4.

However, in some cases, this carrier recombination region IR
may be provided on both the front and back surfaces of the substrate, and particularly when provided on the back surface of the substrate, may be provided on the entire surface of the substrate for convenience of manufacturing.

In addition, this carrier recombination region IR may be a region where crystal defects are intentionally increased by abrading or the like.
can be obtained as a region forming a Schottky junction,
Furthermore, a region in which heavy metals such as iron or gold are selectively diffused into the first semiconductor region 1 can be obtained.

In such a configuration, the device is finally completed by attaching ohmic lead terminals to the second, third, and fourth regions 2, 3.4, respectively. The extraction terminal 3t in area 3 may be short-circuited at the manufacturing stage, as shown by the virtual line Ls in the figure, or it may be pulled out separately and short-circuited by the user. An appropriate bias source may be inserted as described below.

In the case of short-circuiting, the line Ls is actually connected in series on the exposed surface of the second semiconductor region 2 and the exposed surface of the third region 3.
It can be formed of a metal layer or the like that is in ohmic contact, such as by being attached to a metal layer.

First, the description will be made assuming that both the terminals 2t and 3t are thus short-circuited by the line Ls, and a surge voltage is applied between them and the lead terminal 4t of the fourth semiconductor region 4.

In such a surge absorbing element 10, as already explained in the operation section, when a reverse bias is applied to the pn junction between the first semiconductor region 1 and the second semiconductor region 2,
The resulting depletion layer extends not only toward the m-semiconductor region 1 side but also toward the third region 3 side.

Therefore, if a surge voltage is applied between the terminals 2t, 3t and the terminal 4, and it is considerably large in the phase of applying a reverse bias to the pn junction, the upper end of the depletion layer will be It is possible that region 3 is reached.

This state is the start of a punch-through state between the first semiconductor region 1 and the third region 3, and is the start of a low impedance state in which a large current can flow or a breakdown state as the present surge absorbing element. This starting point is shown in FIG. 2 as the breakdown voltage on the voltage axis.

When such a breakdown start state is realized, the terminal 2t.

A surge current flows between the terminal 3t and the terminal 4, and holes are injected from the fourth semiconductor region 4 into the first semiconductor region 1, collected in the second semiconductor region 2, and passed through the external terminal 2t to form an external current ( element current).

Therefore, the product of the resistance of the first semiconductor region 2 sandwiched between the third region 3 and the first semiconductor region 1 and the above-mentioned current is
, 3, electrons are injected from the third region 3 into the second semiconductor region 2, which causes an increase in current, and once again the fourth semiconductor A positive feedback phenomenon occurs in which holes are injected from region 4.

The current value at which such a positive feedback phenomenon begins to occur is the breakover current described above, and the voltage across the element at this time (the voltage between the external terminals 4t and 3) becomes the breakover voltage.

As already mentioned, this breakover voltage is somewhat larger than the breakdown voltage, but when -El, positive feedback begins to occur, the voltage across the device transitions to a significantly lower value. This value is shown as the clamp voltage in Figure 2, but it is approximately equal to the product of the absorbed current and the series resistance of each part plus one forward voltage of the pn junction. C
equal.

As can be understood from this mechanism, the surge absorbing element 10 of the present invention maintains a high breakdown voltage when no surge is applied, minimizes the current flowing within the element, and reduces waste by this element. Although it consumes a lot of power, once a surge is applied above the breakdown voltage, it will soon exhibit an extremely low clamping voltage, absorbing a large current and reliably protecting the subsequent circuit system. Become.

The breakdown voltage in the wood surge absorbing element lO is determined not only by the resistivity or impurity concentration of the first semiconductor region l, but also by the distance between the first semiconductor region l and the third region 3 of the second semiconductor region. Since the bunch through voltage can be controlled depending on the effective thickness at of 2 and/or the impurity concentration, it can be arbitrarily set within a fairly wide design range. In fact, according to experiments conducted by Mizu Applicant, it has been confirmed that this design width ranges over an extremely wide range from several volts to several hundred ports.

In the case of the embodiment shown in the first figure, as described above, the second semiconductor region 2. In this case, the effective thickness Dt of the second semiconductor region 2 is changed after the first semiconductor region 2 is formed. This can be directly controlled by controlling the diffusion depth Od of the impurity for forming the third region from the surface. That is, when using the double diffusion technique, changing or changing the height position of the third region 3 with respect to the first semiconductor region directly changes the effective thickness Dt of the first semiconductor region 2.

On the other hand, when the second semiconductor region 2 and the third region 3 are formed by epitaxial growth technology, the effective thickness Dt of the second semiconductor region 2 is the growth film thickness itself determined based on the conditions in the epitaxy. Generally, it is defined by , but even in that case, the existence of the third region 3 does not change the fact that the effective thickness at regarding bunch-through is actually defined.

Whether by diffusion technology or epitaxy, the effective thickness Dt of the second semiconductor region 2 can be controlled with extremely high precision even with existing technology. The breakdown voltage can be set with extremely high accuracy.

Similarly, the impurity concentration of the second semiconductor region 2, which is another factor that determines the bunch-through voltage and, ultimately, the breakdown voltage of this device, can be adjusted with extremely high precision using existing technology.
can be controlled.

In other words, in the case of the device of the present invention, when designing the breakdown voltage, the effective thickness at
This means that it has two variables, ie, and impurity concentration, which are both well designed and independent of each other.

Therefore, by using only one of these variables or using both and arranging them appropriately.

It can be seen that not only can the breakdown voltage be set over a very wide range, but also that other electrical properties such as junction capacitance and series resistance can be designed independently of the breakdown voltage.

Of course, regarding the fourth semiconductor region 4, impurity diffusion,
It can be formed with good controllability by using conventional techniques such as epitaxy, and as already mentioned, in the first invention, the fourth region 4 is formed with respect to the first semiconductor region 1. It is sufficient that the material is made of a material that forms an injection junction into which minority carriers can be injected. , first semiconductor region 1
If it is p-type, it is conceivable to use metal that can inject electrons into it.

In addition to these, the carrier recombination region IR provided in the present invention can control the holding current 1h shown in FIG. 2 for the following reason.

As also shown in FIG. 1, the minority carriers injected from the fourth semiconductor region 4 according to the above-described operation move into the semiconductor substrate as indicated by arrows fl, f2a, and f2b, respectively. Various routes can be considered, but among them, the minority carriers that move along the arrow fl reach the second semiconductor region 2 as they are, but the minority carriers move along the arrow f2.
The minority carriers that moved along the direction a form the above-mentioned carrier recombination region on the surface side of the semiconductor substrate 1! If R is provided, it will be captured by majority carriers and disappear.

Similarly, if a carrier recombination region IR is provided on the back side of the semiconductor substrate l, the minority carriers that have moved along the arrow f2b are captured by the majority carriers there and disappear.

However, when the amount of minority carriers supplied to these carrier recombination regions increases, the supply speed becomes higher than the recombination speed, and the minority carriers pass through the carrier recombination region and the vicinity thereof and are transferred to the second semiconductor. Carriers begin to form that reach region 2, and thus the device eventually turns on.

Therefore, in other words, the holding current value 1h shows a higher value when there is a carrier recombination region IR as in this embodiment than when there is no carrier recombination region IR.

The value of this holding current value 1h can be controlled by the area, depth, etc. of the carrier recombination region IR, and especially when the carrier recombination region IR is formed by crystal defects or thermal diffusion of heavy metals, It can also be controlled by the degree of recombination center.

By the way, as is clear from the explanation through the first embodiment above, in the surge absorbing element of the present invention, in principle, the current of the surge current after punch-through occurs between the first and third regions. The distribution will be relatively uniform. However, if you want to ensure even more uniformity, the third
A configuration as shown in the figure can also be adopted.

That is, in the second embodiment shown in the third figure, half, one side I
The third region 3 formed for the second semiconductor region 2 of the opposite conductivity type is divided into a plurality of third regions. Elements 31 and 32
, 33 , , , , , , 3n (21 in the case shown)
! 15), each area element 31 to 3
n is designed to be electrically conductive to the outside from a common lead-out terminal 3t.

With such a structure, the electric field concentration effect seen in conventional avalanche breakdown devices can be avoided, and a uniform current distribution can be obtained. Therefore, the current capacity can also be increased approximately in proportion to the area of the S'' element.

The other considerations described in the first embodiment can be similarly adopted in the third embodiment. The carrier recombination region IR is naturally provided on both or one of the front and back surfaces of the substrate, and exhibits exactly the same effect as described above. Regarding these points, the same applies to other embodiments related to the second invention below. In addition, two terminals 2t
, 3t can not only be short-circuited due to the principle of operation as described above, but also can be used with the t5 line 1- to cause a short circuit.

In the surge absorbing element configured as in the present invention, when the breakdown voltage, which should originally be defined by the punch-through phenomenon, becomes close to the avalanche breakdown voltage of the first semiconductor region 1 and the second semiconductor region 2, the controllability becomes poor. It is also possible that it gets worse.

When there is such a risk, in order to prevent or suppress the avalanche breakdown that begins to occur at the junction of the end portions of the second semiconductor region 2 at an early stage, as shown in FIG. 4 as an embodiment of the second invention to be described later. A guard ring region 2G of the same conductivity type as the second semiconductor region surrounds the second semiconductor region 2.
Similarly, as shown in FIG. 5 as a second embodiment of the second invention, ohmic electrodes 6 are formed in series on the surfaces of the second semiconductor region 2 and the third semiconductor region 3. It is preferable that the edge portion 6a further extends through the insulating film 8 so as to extend beyond the junction with the first semiconductor region at the end of the second semiconductor region.

In this way, concentration of the electric field at the end of the second semiconductor region can be alleviated, and designability of the breakdown voltage can be expanded and improved by effectively reducing the avalanche breakdown voltage by punching through the avalanche breakdown voltage.

Next, the embodiment of the second invention shown in FIG. 4.5 will be described.

Also in the embodiment shown in FIGS. 4 and 5, regarding the first semiconductor region l, the second semiconductor region 2, the third region 3, and the third region elements 3i, 32, 33, , -1, 3n. The same configuration, shape, and arrangement relationship as in the embodiment according to the first invention shown in FIG. 51 and FIG. 3 can be applied. Rather, in this embodiment of the second invention, in addition to the configuration of the surge absorbing element shown in FIG.
3, , , , , , , 5th region element 5t , 52 , 53 , , , substantially similar to 3n
It can be considered that 5n is added.

Therefore, in the surge absorbing element shown in Figure 4.5, the diode that causes punch-through is connected to the first semiconductor region l and the second semiconductor region depending on the polarity of the surge voltage applied between the terminals 3t and 5t. 2, or a second diode consisting of the first semiconductor region 1 and the fourth semiconductor region 4, the punch-through phenomenon occurs in either diode 1. However, the operating mechanism is exactly the same as that already explained regarding the diode constituted by the first semiconductor region 1 and the second semiconductor region 2 of the first invention.

In other words, the surge absorbing element as an embodiment according to the second invention can exhibit an absorbing function for surge voltage or surge current of one polarity. Of course, it is possible to determine the breakdown voltage, holding current value To, etc. with good design efficiency for surge voltage.

This is exactly the same as in the surge absorbing element described in connection with the first invention.

Therefore, although the carrier recombination region IR exhibits the same function as in the first embodiment with respect to a bipolar surge,
It is also possible to intentionally vary the holding current value 1h for each polarity depending on whether the arrangement position is close to the second semiconductor region 2 or the fourth semiconductor region 4.

The difference between the embodiment shown in FIG. 4 and the embodiment shown in FIG. The only difference is in the means used to prevent or suppress it at different stages.

In other words, in the embodiment shown in FIG. 4, as mentioned above, the second semiconductor region 2 and the fourth semiconductor region 4 are surrounded by a second semiconductor region having the same conductivity type as the second and fourth semiconductor regions. Guard ring regions 2G and 4G are formed, and in the embodiment shown in FIG.
and the respective end edges 8a, ? of the ohmic electrodes 6, 7 formed in series on the surfaces of the fourth semiconductor region 4 and the fifth region 5, respectively. a further extends beyond the junction end with the first semiconductor region l via the insulating film 8.

Of course, in the embodiment shown in Figure 4.5, the third and fifth regions 3 and 5 are each composed of a plurality of region element groups 31 to 3n and 51 to 5n for the region, but As represented by the third area 3 shown in FIG. 1 of the first invention, these third areas 3. Each of the fifth regions 5 may be formed as a single undivided region.

In the case of the surge absorbing element of the present invention as shown in each of the embodiments described so far, in principle, additional treatments such as end face polishing, which are required in conventional avalanche yield type, are not required after the element is completed. Therefore, a plurality of structures of each of the above-mentioned embodiments can be simultaneously manufactured in one semiconductor substrate 1.

However, when there is no need to accumulate a large number of
As another means for increasing the avalanche breakdown voltage mentioned above, as shown in FIG. 6, the first and second semiconductor regions 1.
A portion corresponding to the joint end between the two may be etched or cut with a slope perpendicular or at an angle to one surface.

The fact that even the side surfaces of the fourth region 4 are similarly treated can be seen as simply a result of the above-mentioned processing, but on the contrary, the same p-type layer is automatically etched into the second region by the above-mentioned etching process. , also shows that the fourth region can be formed separately.

Further, although the case shown in FIG. 6 concerns the surge absorbing element corresponding to the first invention of the present invention, the same idea can be applied to the surge absorbing element corresponding to the second invention. However, if such a simple method is used, appropriate protection 11! J (not shown).

Next, as a representative example in the first illustrated embodiment of the first invention,
To explain a somewhat special usage of the surge absorbing element of the present invention, the second semiconductor region 2 and the third region 3 are connected to different terminals 2.
If you draw separately from t and 3t, the 7th
As shown in Figure (A), by inserting a suitable bias source vb between these terminals 2t and 3, it is also possible to control the punch-through voltage from the outside.

As a model of the surge voltage, a high voltage source V connected between the third region terminal 3t and the terminal 4t of the fourth semiconductor region 4 is used.
Considering r, the energy band structure of this surge absorbing element changes from the state shown by the solid line when no surge voltage is applied, to the high voltage corresponding to the surge voltage, as shown in Figure 7 (B). When voltage Vr is applied, in the figure,
The state changes to the state shown by the virtual line. However, in the illustrated case, in order to observe the bias effect as described below, the high voltage source potential corresponding to the surge voltage is shown in a state that has not yet reached the level of causing punch-through.

In this state, depending on the polarity and magnitude of the bias potential supplied from the bias source vb, when the second region 2 and the third region 3 are reversely biased, the forward direction is changed as shown by the arrow “°°”. In case of bias, arrow ° “I”
As shown, the band structure changes for each. Therefore, it can be seen that the punch-through voltage of the surge absorbing element can be controlled externally by the bias potential and its polarity.

Such a bias configuration is applicable to the surge absorbing element of the second invention shown in FIGS.
'+ +- is Hokuchuku σmade! ÷Senjiji correction is also very good.

Finally, as an example, the effects of the present invention will be confirmed by comparing actual devices.

First, a surge absorbing element conforming to the configuration of the second invention was created through the steps described below.

Resistivity 5Ω-Cl conductivity type n-type, (111) plane, 300j
A 1 m thick silicon wafer was used as the starting material for the first semiconductor region 1, and 8000 5iOz films were first formed on its surface.

Next, in order to define the planar shapes of the second semiconductor region 2 and the fourth semiconductor region 4, a photo-etching process is applied to the silicon oxide film on the surface according to a predetermined pattern to open impurity diffusion windows, and each diffusion window is Boron was diffused through the p-type regions 2 and 4 having a depth of 2.5 squares.

In this pattern, the second and fourth regions 2 and 4, each having a width of 200+m, are alternately turned at intervals of 7 hm.

After newly forming a silicon oxide film on the wafer surface, a plurality of third region elements 31 to 3n and fifth region elements 51 to 5 are formed.
In order to define each planar shape of n, the silicon oxide film was photo-etched in accordance with a predetermined pattern to form impurity diffusion windows for a plurality of third region elements and fifth region elements.

Phosphorus is diffused in high concentration through this diffusion window, and its depth is 1.2
Similarly to the third region 3 made up of a set of n medium-sized third region elements 31 to 3n extending over the threshold, a fifth region 5 made of a set of fifth region elements 51 to 5n was formed. Therefore, at the same time, the second semiconductor region 2 and the fourth semiconductor region 4 were finally completed.
was formed and defined, and its effective thickness Dt was set to 1.3 threshold.

After abrading, alumina powder was sprayed onto the back surface of the wafer, and a device A of the present invention was abraded to form a carrier recombination region, and a comparative device B was prepared without ablation and therefore without a carrier recombination region.

Thereafter, in order to provide common ohmic contacts for the second and third regions and common ohmic contacts for the fourth and fifth regions in both the device A of the present invention and the comparative device B, photo-etching and metal thin film etching were performed. Electrodes 6, 7 or terminals 2t, 3t; 4t, 5t were formed through vapor deposition and etching steps. Electrodes or terminals It on the semiconductor substrate side were also formed at the same time in the metal thin film deposition process.

Under such a configuration, as a third comparison surge absorbing element C in a different sense, the terminal 2t on the front surface side of the substrate
, 3t (or 4t, 5t) and the terminal I on the back of the board
When a model was constructed to absorb surges between
I was able to get up to 2 A/C units.

On the other hand, as a surge absorbing element A according to the idea of the present invention,
In the structure described above, which absorbs bipolar surges between terminals 2t, 3t and 4t, 5t, the breakdown voltage was 121V, which was approximately the same as C, but the breakover current density was 4A/cm2. The surge absorption current density was able to reach a maximum of 5000 A/c2.

Looking at this characteristic example, the effect of the fourth semiconductor region on the set of second and third regions provided by the present invention and the effect of the second semiconductor region on the set of fourth and fifth regions are extremely large. It turns out that it is.

Also, under the same conditions as above, when forming the n0-type third and fifth regions 3 and 5, which will substantially define the effective thickness of the second and fourth semiconductor regions 2 and 4. By changing the diffusion time, the breakdown voltage could be varied from 30V to 170V.

Of course, this variation range is not the maximum variation range, and it has been confirmed that if other conditions are also taken into account, an extremely wide variation range from several volts to several hundred volts can be obtained.

Furthermore, when we compared device A with the carrier recombination region according to the present invention and device B without it with respect to the holding current of 1 h, the device A of the present invention had a holding current of 0.3 A, while the comparative device B had a holding current of 40 A. ■I only got an A.

This clearly shows that the carrier recombination region incorporated according to the present invention greatly controls the holding current.

It was also verified that the breakdown mechanism in this device can be controlled solely by the Tongru phenomenon.

Of course, from the characteristic example taken for the second invention, even in the surge absorbing element according to the first invention in which there is no fourth semiconductor region in the fourth semiconductor region, the surge absorption polarity is unipolar. It is almost self-evident that the characteristics tend to be the same in terms of holding current and the like.

In addition, in order to further increase the breakover current so that it does not respond to small surges, the area in which the second semiconductor region and/or the fourth semiconductor region is in contact with the metal thin film must be increased, or especially the In the case of a device according to one aspect of the invention, as shown in FIG.
1) a first semiconductor region portion 11, 1 consisting of a set and sandwiched laterally between adjacent fourth semiconductor region elements;
2, , , , 1n-1 are formed in the first semiconductor region portions 11, 12.

, , , , electrodes 8 - which make common ohmic contact with In-+ are provided, and terminals 1t and 17 are also provided, and similarly common to the four-way single-track reconnaissance bullet table group 41 , 42 , , , , , , 4n It is better to form a line, pull out the terminal 4t, and use it.

In any case, the breakover current can also be arbitrarily designed within a considerable range.

<Effects of the Invention> According to the present invention, various superior effects can be obtained as compared to existing avalanche breakdown type elements, as listed below.

■Semiconductor substrates or semiconductor wafers are the most expensive and most inflexible components of this type of device, but according to the present invention, even starting wafers with the same material constant can have different breakdown voltages. A surge absorbing element can be obtained.

■Since the set of the second semiconductor region and the third region and the set of the fourth semiconductor region and the fifth region can be formed only from the same side with respect to the first semiconductor region, the breakdown voltage can be changed and Control to achieve a predetermined breakdown voltage is extremely simple and can be performed with high precision.

■ Other electrical characteristics such as the amount of junction rB and series resistance can be designed independently of the breakdown voltage, and therefore, for example, other electrical characteristics can be made to be approximately the same as C even if the breakdown voltage is different. .

It is also easy to integrate multiple elements within a common semiconductor substrate.

■It has a design principle that reduces the terminal voltage (clamp voltage) even more than the breakdown voltage in the large, single-current region, so it can absorb extremely large surge currents and has an extremely high ability to protect single circuit systems. have

(ΦEven though the clamp voltage can be greatly reduced as described in ■ above, the holding current can be set to a large value due to the presence of the carrier recombination region, so after the surge disappears, the element is automatically reset and the The flow effect can be avoided.

(2) In the case of the second invention, in addition to the above effects, bipolar surge currents can be absorbed.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram of a first embodiment according to the first invention of the present invention, FIG. 2 is an operational characteristic diagram of the first illustrated embodiment, and FIG. 3 is a schematic configuration diagram of a second embodiment according to the first invention. , Figures 4 and 5
The figure is a schematic configuration diagram of each embodiment according to the second invention of the present invention, Figure 6 is an explanatory diagram of an example for eliminating the influence of avalanche breakdown voltage in the surge absorbing element of the present invention, and Figure 7 is the surge absorbing element of the present invention. FIG. 8 is a schematic configuration diagram of yet another modified example of the surge absorbing element according to the first invention. In the figure, 1 is a first semiconductor region or a semiconductor substrate, IR is a carrier recombination region, 2 is a second semiconductor region, 3 is a third region, 31 to 3n are third region elements, 4 is a fourth semiconductor region, 4
1 to 4n are fourth semiconductor region elements, 5 is a fifth region, and 51 to 4n are fourth semiconductor region elements;
5n is the fifth area element, 20.4G is the guard ring, 1
0 is the surge absorbing element of the present invention as a whole. Agent: Fuku Maki: Figure 1: Amendment to government agency procedures (voluntary) March 18, 1985

Claims (1)

[Claims] 1) a first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; one surface side of the first semiconductor region; is formed in a conductivity type opposite to the first conductivity type, and has a p-type conductivity between it and the first semiconductor region.
a second semiconductor region that forms an n-junction diode; and a second semiconductor region that contacts the second semiconductor region from the opposite side to the first semiconductor region, thereby reducing the distance between the second semiconductor region and the first semiconductor region; a third region defining the effective thickness of the two semiconductor regions; a third region formed on the one surface side of the first semiconductor region and spaced apart from the second semiconductor region in the lateral direction, and implanted with the first semiconductor region; a fourth region forming a junction; a portion located on the one surface side of the first semiconductor region between the second semiconductor region and the fourth region, and opposite to the one surface of the first semiconductor region; a carrier recombination region provided in one or both of at least a portion from below the second semiconductor region to below the fourth region on the back side of the pn junction diode; Controlling a holding current in the recombination region while absorbing surge current by punch-through between the first semiconductor region and the third region that occurs when the layer reaches the third region; surge absorption element. 2) a first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; and a first semiconductor region formed on one surface side of the first semiconductor region; a second semiconductor region having a conductivity type opposite to the one conductivity type and forming a first pn junction diode with the first semiconductor region; a third region that defines the effective thickness of the second semiconductor region by contacting the first semiconductor region; A pn junction diode is formed laterally apart from the second semiconductor region, is of a conductivity type opposite to the first conductivity type, and is connected to the first semiconductor region in a direction opposite to the first pn junction diode. a fourth semiconductor region that forms a second pn junction diode; and a fourth semiconductor region that contacts the fourth semiconductor region from the opposite side to the first semiconductor region to reduce the distance between the fourth semiconductor region and the first semiconductor region; a fifth region that defines the effective thickness of the fourth semiconductor region; a portion of the first semiconductor region on the one surface side between the second semiconductor region and the fourth semiconductor region; a carrier recombination region provided on one or both of at least a portion of the region from below the second semiconductor region to below the fourth semiconductor region on the back surface side opposite to the one surface of the first semiconductor region; , the first semiconductor region that is formed when the depletion layer that is generated by reverse biasing one of the first and second two pn junction diodes reaches either the corresponding third region or the fifth region; A surge absorption element characterized by: controlling a holding current in the recombination region while absorbing surge current by punch-through between the third region or the first semiconductor region and the fifth region.