JPS62154721A - Formation of semiconductor single crystal thin film - Google Patents

Formation of semiconductor single crystal thin film

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Publication number
JPS62154721A
JPS62154721A JP29486085A JP29486085A JPS62154721A JP S62154721 A JPS62154721 A JP S62154721A JP 29486085 A JP29486085 A JP 29486085A JP 29486085 A JP29486085 A JP 29486085A JP S62154721 A JPS62154721 A JP S62154721A
Authority
JP
Japan
Prior art keywords
semiconductor
layer
single crystal
layers
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP29486085A
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Japanese (ja)
Other versions
JP2508456B2 (en
Inventor
Koji Tamamura
好司 玉村
Yoshifumi Mori
森 芳文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
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Priority to JP60294860A priority Critical patent/JP2508456B2/en
Publication of JPS62154721A publication Critical patent/JPS62154721A/en
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Publication of JP2508456B2 publication Critical patent/JP2508456B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To form a semiconductor single crystal thin film insulatedly isolated from a semiconductor substrate on insulating layers on the surface of semiconductor substrate by a method wherein the second semiconductor layer is formed on the first semiconductor substrate and the first insulating layers and after removing the second semiconductor layer formed on the first semiconductor substrate, the second insulating layers are formed on the surface of the first semiconductor substrate to form the second semiconductor layers again on the second insulating layers. CONSTITUTION:Within the first epitaxial growing process to form the second semiconductor layer 3 [Ga(Al)As layer] on the first semiconductor (silicon) substrate 1 and the first insulating layers (SiO2) 2, proper single crystal semiconductor layers 3A are grown on the semiconductor substrate 1 while similar single crystal semiconductor layers 3B are formed on the second insulating films 2 by lateral (in the sideward direction) growing process. Furthermore, within the second epitaxial growing process to form the second semiconductor layers 3C on the second insulating films 2' previously formed, the single crystal semiconductor layers 3C are formed by laterally growing the former single crystal semiconductor layers 3B again. Resultantly, a semiconductor single crystal thin film 4 [Ga(Al)As] isolated from the semiconductor substrate 1 by the insulating layers 2, 2' can be formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体基板上に絶縁層で分離した半導体単結
晶薄膜を形成するための半導体単結晶薄膜の形成方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a semiconductor single crystal thin film on a semiconductor substrate, which is separated by an insulating layer.

〔発明の概要〕[Summary of the invention]

本発明は、半導体単結晶薄膜の形成方法において、半導
体基板上に選択的に第1の絶縁層を形成し、この半導体
基板と第1の絶縁層上に半導体層を形成して後、半導体
基板上に形成された半導体層を除去し、次で半導体層を
除去した半導体基板表面に第2の絶縁層を形成してこの
第2の絶縁層上に半導体層を形成することによって、半
導体基板上に絶縁層で分離した半導体単結晶薄膜を形成
できるようにしたものである。
The present invention provides a method for forming a semiconductor single crystal thin film, in which a first insulating layer is selectively formed on a semiconductor substrate, a semiconductor layer is formed on the semiconductor substrate and the first insulating layer, and then the semiconductor layer is formed on the semiconductor substrate. By removing the semiconductor layer formed above, then forming a second insulating layer on the surface of the semiconductor substrate from which the semiconductor layer has been removed, and forming the semiconductor layer on this second insulating layer, the semiconductor substrate is It is possible to form semiconductor single-crystal thin films separated by insulating layers.

〔従来の技術〕[Conventional technology]

シリコン基板上へのGa (Ajり Asエピタキシャ
ル成長は、GaAsP/ GaP超格子を使う方法、G
eをバッファ層として用いる方法、ゆっくりした成長に
て直接GaAsを成長させる方法等がある。一方、Ga
As基板上に、 5i02又はSiNx等の絶縁膜のマ
スクを介して単結晶GaAsを選択成長させる場合、M
BE(分子線エピタキシー)法では絶縁膜上に、多結晶
GaAsが析出し、MOMBE  (有機金屈分子線エ
ビタキシ−)法及び減圧間CVD  (有機金属気相成
長)法では絶縁膜上に何も堆積しない。また常圧MOC
VD法では厳密な成長条件でない限り絶縁股上に粒子状
のものが析出されることが報告されている。厳密な成長
条件では絶縁膜上に多少ラテラル成長するが、十分な長
さのラテラル成長は得られない。
Ga(As) epitaxial growth on a silicon substrate is performed using a GaAsP/GaP superlattice.
There are a method of using e as a buffer layer, a method of directly growing GaAs by slow growth, etc. On the other hand, Ga
When selectively growing single crystal GaAs on an As substrate through a mask of an insulating film such as 5i02 or SiNx, M
In the BE (molecular beam epitaxy) method, polycrystalline GaAs is deposited on the insulating film, and in the MOMBE (organo-metallic molecular beam epitaxy) method and the reduced pressure CVD (metal-organic chemical vapor deposition) method, nothing is deposited on the insulating film. Does not accumulate. Also, normal pressure MOC
It has been reported that in the VD method, particles are deposited on the insulation crotch unless the growth conditions are strict. Under strict growth conditions, some lateral growth occurs on the insulating film, but lateral growth of sufficient length cannot be obtained.

そして、5iOz又はSiNx等の絶縁膜上にm−v族
化合物半導体単結晶薄膜例えばGa (ΔA)As単結
晶薄膜を成長させる方法は未だ提案されていない。
No method has yet been proposed for growing an m-v group compound semiconductor single crystal thin film, such as a Ga(ΔA)As single crystal thin film, on an insulating film such as 5iOz or SiNx.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで、例えばシリコン基板上に絶縁層で分離したm
−v族化合物半導体単結晶薄膜が形成できれば、夫々シ
リコン系素子とm−v族化合物半導体系素子の複合デバ
イスが得られる。又、例えばシリコン基板上に絶縁層で
分離したシリコン単結晶薄膜が形成できれば、三次元デ
バイスへの応用が可能となる。
By the way, for example, m separated by an insulating layer on a silicon substrate
If a -v group compound semiconductor single crystal thin film can be formed, a composite device of a silicon-based element and an m-v group compound semiconductor-based element can be obtained. For example, if a silicon single crystal thin film separated by an insulating layer can be formed on a silicon substrate, application to three-dimensional devices becomes possible.

本発明は、上述の点に鑑み、半導体基板上に絶縁層で分
Nli、 した半導体単結晶薄膜を形成′4゛るJ、と
ができる半導体単結晶薄膜の形成方法を提供するもので
ある。
In view of the above-mentioned points, the present invention provides a method for forming a semiconductor single crystal thin film, which can form a semiconductor single crystal thin film with an insulating layer on a semiconductor substrate.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、第1゛の半導体基板(1)上に選択的に第1
の絶縁層(2)を形成し、エピタキシャル成長にで第1
の半導体基板(1)と第1の絶縁j# +21 )に第
2の半導体1i(3)を形成する。次に第1の半導体基
板fll上に形成された第2の半導体層(3Δ)を選択
的に除去し、その第2の半導体層(3A)を除去した部
分の第1の半導体基板表面に第2の絶縁層(2′)を形
成する。しかる後、再びエピタキシャル成長にて第2の
絶縁層(2′)上に上記第2の半導体層(3C)を形成
する。
The present invention provides a method for selectively disposing a first semiconductor substrate (1) on a first semiconductor substrate (1).
An insulating layer (2) is formed, and the first layer is epitaxially grown.
A second semiconductor 1i (3) is formed on the semiconductor substrate (1) and the first insulator j# +21 ). Next, the second semiconductor layer (3Δ) formed on the first semiconductor substrate full is selectively removed, and a second semiconductor layer is formed on the surface of the first semiconductor substrate in the area where the second semiconductor layer (3A) is removed. A second insulating layer (2') is formed. Thereafter, the second semiconductor layer (3C) is again formed on the second insulating layer (2') by epitaxial growth.

〔作用〕[Effect]

第1の半導体基板(11と第1の絶縁層(2)上に第2
の半導体層(3)を形成する第1のエピタキシャル成長
工程では、半導体基板(1)上では本来の単結晶半導体
層(3A)が成長し、第2の絶縁層(2)上ではラテラ
ル(横方向)成長が起きて同様に単結晶半導体層(3B
)が形成される。また、第2の絶縁層(2′)を形成し
た後、この上に第2の半導体層(3C)を形成する第2
のエピタキシャル成長工程では先の単結晶半導体!(3
B)より再びラテラル成長して単結晶半導体層(3C)
が形成される。その結果、半導体基板(11に絶縁層(
21(2’)で分離された半導体単結品薄l1IA(4
)が形成される。
A second insulating layer (2) is formed on the first semiconductor substrate (11) and the first insulating layer (2).
In the first epitaxial growth step to form the semiconductor layer (3), the original single crystal semiconductor layer (3A) grows on the semiconductor substrate (1), and the lateral (lateral direction) grows on the second insulating layer (2). ) growth occurs and the single crystal semiconductor layer (3B
) is formed. Further, after forming the second insulating layer (2'), a second insulating layer (2') is formed on which a second semiconductor layer (3C) is formed.
The first single crystal semiconductor in the epitaxial growth process! (3
From B), the single crystal semiconductor layer (3C) is grown laterally again.
is formed. As a result, an insulating layer (
Semiconductor single-crystal thin l1IA (4
) is formed.

〔実施例〕〔Example〕

以下、図面を参照して本発明の詳細な説明する。 Hereinafter, the present invention will be described in detail with reference to the drawings.

実施例1 先ず、第1図Aに示すように■族半導体例えばシリコン
基板(1)の表面に選択酸化(LOGO5)法により選
択的に5i(h l5(2)を形成する。
Embodiment 1 First, as shown in FIG. 1A, 5i (hl5(2)) is selectively formed on the surface of a group III semiconductor, for example, a silicon substrate (1), by selective oxidation (LOGO5).

次に第1図Bに示すように選択的に5iO2Jti((
21が形成されたシリコン基板(11上に例えばVPE
  (気相成長)法、LPE(液相成長)法、常圧MO
CVD(有機金属気相成長)法等によってm−v族化合
物半導体例えばGa (i ) As層(3)をエピタ
キシャル成長させる。このとき、 5i02層(2)の
形成されないシリコン基板(1)上にはGa(AIりA
S層(3八)がエピタキシャル成長する。また、ラテラ
ル成長が起き5i(h #(2)上にも単結晶のGa 
(八!!、)八s’FA(3B)が成長する。
Next, as shown in FIG. 1B, 5iO2Jti((
21 (for example, VPE on 11)
(vapor phase epitaxy) method, LPE (liquid phase epitaxy) method, normal pressure MO
An m-v group compound semiconductor, such as a Ga(i)As layer (3), is epitaxially grown by CVD (metal-organic chemical vapor deposition) or the like. At this time, Ga (AI) and A
The S layer (38) is epitaxially grown. In addition, lateral growth occurred and single crystal Ga also formed on 5i(h #(2)).
(8!!,) 8s'FA (3B) grows.

次に、第1図Cに示すように5iOz JBf2)上の
Ga (Al ) As層4 (3B)のみを残して他
のGa (Al) As層(3A)を選択的にエツチン
グ除去する。次に、第1図りに示すように5i02層(
21に覆われない全ての部分のシリコン基板(1)上に
選択的に5io2屓(2′)を形成する。コ(7) 5
in2.rtf (2’)ノ形成ハ、例えば通常の方法
を用い、Ga (AI ) As層(3B)を耐酸化膜
で覆って後、全体を熱酸化するよ・うになす。
Next, as shown in FIG. 1C, only the Ga(Al)As layer 4 (3B) on the 5iOz JBf2) is left and the other Ga(Al)As layer (3A) is selectively removed by etching. Next, as shown in the first diagram, the 5i02 layer (
5io2 layers (2') are selectively formed on all parts of the silicon substrate (1) that are not covered by 21. Ko (7) 5
in2. For forming rtf (2'), for example, the Ga (AI) As layer (3B) is covered with an oxidation-resistant film using a conventional method, and then the whole is thermally oxidized.

しかる後、再び上記の方法でGa (Aff) Asを
エピタキシャル成長し、Ga (Aff) As層(3
0)を種として再度ラテラル成長により 5i02E 
(2’) J二に単結晶のGa (Aff ) As1
ei (3C)を形成する。この場合、先にGa (A
l) As層(3B)が形成されているために全体のG
a (AJ) As層は多少凹凸する。
Thereafter, Ga (Aff) As is epitaxially grown again using the above method to form a Ga (Aff) As layer (3
5i02E by lateral growth again using 0) as seeds.
(2') J2 single crystal Ga (Aff) As1
Form ei (3C). In this case, Ga (A
l) Because the As layer (3B) is formed, the overall G
a (AJ) The As layer is somewhat uneven.

従って、この後、Ga (Aff) As層の表面を平
坦化するを可とする。これによって第1図已に示すよう
に、シリコン基板(11上に5i02層(2)(2’)
が形成され、その上に基板(1)と分離されたGa(A
β) As単結晶薄膜(4)が形成された半導体基板(
6)が得られる。
Therefore, after this, the surface of the Ga (Aff) As layer can be flattened. As a result, as shown in Figure 1, 5i02 layers (2) (2') are formed on the silicon substrate (11).
is formed, and Ga(A) separated from the substrate (1) is formed on it.
β) Semiconductor substrate on which As single crystal thin film (4) is formed (
6) is obtained.

実施例2 第2図の実施例は5i02層の形成法が第1図の場合と
異なるものである。
Example 2 In the example shown in FIG. 2, the method of forming the 5i02 layer is different from that shown in FIG.

先ず、第2図Aに示すようにシリコン基板(11上に5
i02層(2)を蒸着して後、この5i(h層(2)を
所定パターンにエツチング除去する。
First, as shown in FIG. 2A, a silicon substrate (5
After depositing the i02 layer (2), the 5i(h layer (2)) is etched away in a predetermined pattern.

次に、第2図Bに示すように5i(h !(2]が選択
的に形成されたシリコン基板(1)上に例えばVPE法
Next, as shown in FIG. 2B, the silicon substrate (1) on which 5i(h!(2) is selectively formed) is subjected to, for example, VPE.

Ll)E法、又は常圧MOCvD法等によってGa (
All> As層(3)をエピタキシャル成長させる。
Ga (
All> As layer (3) is epitaxially grown.

次に第2図Cに示すように5i02層(2)が形成され
ない領域上のGa (Anり As層(3八)を選択エ
ツチングにて除去する。次に、第2図りに示すようにS
iO2の再蒸着を行い、選択エツチング除去で露呈した
シリコン基板(1)上に5i02層(2′)を被着形成
する。このとき、Ga (八jりAs層(3B)の側面
にもSiO2が被着されることが考えられる。
Next, as shown in Figure 2C, the Ga (An or As) layer (38) on the area where the 5i02 layer (2) is not formed is removed by selective etching.
iO2 is redeposited and a 5i02 layer (2') is deposited on the silicon substrate (1) exposed by selective etching removal. At this time, it is conceivable that SiO2 is also deposited on the side surfaces of the Ga layer (3B).

この場合にはGa (AJ2) As層(3B)の側面
に被着された5i02をイオンミリング又は反応性イオ
ンエツチング等の異方性エツチングによって除去するよ
うになす。
In this case, the 5i02 deposited on the side surface of the Ga (AJ2) As layer (3B) is removed by anisotropic etching such as ion milling or reactive ion etching.

次に、第2図已に示すように再度Ga (A1.) A
s層をエピタキシャル成長させ、Ga (Al ) A
s層(3B)を種としてラテラル成長により 5i02
層(2′)上に単結晶Ga (八l)へS層(3c)を
形成する。この後Ga (Ajり As層の平坦化処理
を施する。
Next, as shown in Figure 2, Ga (A1.) A
The s-layer is grown epitaxially, and Ga(Al)A
By lateral growth using the s layer (3B) as a seed 5i02
An S layer (3c) is formed on the layer (2') using single crystal Ga (8l). After this, the Ga (Aj and As layers) are planarized.

これによってシリコン基板(11上ニ5i02!(21
(2’)が形成され、この上に基板(1)と分離された
Ga (AI) /ls単結晶薄膜(4)が形成された
半導体基板(6)が得られる。
This results in a silicon substrate (11 on 5i02! (21
(2') is formed, and a semiconductor substrate (6) is obtained on which a Ga (AI) /ls single crystal thin film (4) separated from the substrate (1) is formed.

この方法によれば、 SiO2層上にGa (AJ2)
 Asの単結晶成長ができ、シリコン基板上での任意な
GaAs系素子の作成が可能となる。そして、良質かつ
耐熱性にすぐれた安価なシリコン基板が使え、Si系素
子と、GaAs系素子を同一基板に作成することが可能
となる。GaAs系素子としては、レーザダイオード、
発光ダイオード、太陽電池、電界効果トランジス外 2
次元電子ガスチャンネルを利用した高移動度デバイス(
IIEMT、 TEGFET)等が考えられる。
According to this method, Ga (AJ2) is deposited on the SiO2 layer.
Single-crystal growth of As is possible, and arbitrary GaAs-based elements can be created on a silicon substrate. In addition, an inexpensive silicon substrate of good quality and excellent heat resistance can be used, and it is possible to fabricate a Si-based element and a GaAs-based element on the same substrate. GaAs-based elements include laser diodes,
Outside of light emitting diodes, solar cells, and field effect transistors 2
High mobility device using dimensional electron gas channel (
IIEMT, TEGFET), etc. can be considered.

尚、上例では■族半導体−絶縁層−1n−v族化合物半
導体構造について述べたが、その他IV族半導体−絶縁
層−1v族半導体構造にも通用できる。
Incidentally, in the above example, a group IV semiconductor-insulating layer-1n-v group compound semiconductor structure has been described, but it can also be applied to a group IV semiconductor-insulating layer-1v group semiconductor structure.

また、上例では絶縁層(2)(2’)としてSio2を
用いたが、SiNx等の他の絶縁層を用いることもでき
る。また両絶縁層(2+(2’)としては同じ5i02
を用いたが、互に異なる絶縁層を用いても良い。
Further, in the above example, Sio2 is used as the insulating layers (2) (2'), but other insulating layers such as SiNx can also be used. Also, both insulating layers (2+(2') are the same 5i02
However, different insulating layers may be used.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、半導体基板表面の絶縁層上に半導体基
板と絶縁分離した状態で半導体単結品薄nりを形成する
ことができる。従って例えばSi基板上に絶縁層を介し
てGa (Al) As単結晶薄膜を形成することが可
能となるため、光素子、四速素子としてのGaIts系
素子と、Si系素子との混合による光電子IC,三次元
素子への応用が可能となる。
According to the present invention, it is possible to form a thin semiconductor single-crystalline product on an insulating layer on the surface of a semiconductor substrate in a state insulated and separated from the semiconductor substrate. Therefore, for example, it is possible to form a Ga(Al)As single crystal thin film on a Si substrate with an insulating layer interposed therebetween. Applications to ICs and tertiary elements become possible.

図面のwItJiな説明 第1図A−E及び第2図A−Eは夫々本発明による半導
体単結晶a膜の形成方法の実施例を示す工程図である。
Brief Description of the Drawings FIGS. 1A-E and 2A-E are process diagrams showing an embodiment of the method for forming a semiconductor single crystal a film according to the present invention, respectively.

(11はシリコン基板、(2)(2’)はSio2&、
(3)〔(3八’)  (3B)  (3C) )はG
a (Aj’ ) AsFii、(4)はGa(1)へ
S単結晶薄1漠である。
(11 is a silicon substrate, (2) (2') is Sio2&,
(3) [(38') (3B) (3C) ) is G
a (Aj') AsFii, (4) is a S single-crystal thin 1 complex to Ga(1).

Claims (1)

【特許請求の範囲】 a、第1の半導体基板上に選択的に第1の絶縁層を形成
する工程と、 b、上記第1の半導体基板と上記第1の絶縁層上に第2
の半導体層を形成する工程と、 c、上記第1の半導体基板上に形成された上記第2の半
導体層を除去する工程と、 d、上記第2の半導体層を除去した上記第1の半導体基
板表面に第2の絶縁層を形成する工程と、e、上記第2
の絶縁層上に、上記第2の半導体層を形成する工程とを
有する半導体単結晶薄膜の形成方法。
[Scope of Claims] a. selectively forming a first insulating layer on the first semiconductor substrate; b. forming a second insulating layer on the first semiconductor substrate and the first insulating layer;
c. removing the second semiconductor layer formed on the first semiconductor substrate; d. the first semiconductor from which the second semiconductor layer has been removed; a step of forming a second insulating layer on the substrate surface, e.
forming the second semiconductor layer on the insulating layer.
JP60294860A 1985-12-27 1985-12-27 Method for forming semiconductor single crystal thin film Expired - Fee Related JP2508456B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60294860A JP2508456B2 (en) 1985-12-27 1985-12-27 Method for forming semiconductor single crystal thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60294860A JP2508456B2 (en) 1985-12-27 1985-12-27 Method for forming semiconductor single crystal thin film

Publications (2)

Publication Number Publication Date
JPS62154721A true JPS62154721A (en) 1987-07-09
JP2508456B2 JP2508456B2 (en) 1996-06-19

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JP60294860A Expired - Fee Related JP2508456B2 (en) 1985-12-27 1985-12-27 Method for forming semiconductor single crystal thin film

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS575328A (en) * 1980-06-13 1982-01-12 Matsushita Electronics Corp Growing method for semiconductor crystal

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS575328A (en) * 1980-06-13 1982-01-12 Matsushita Electronics Corp Growing method for semiconductor crystal

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