JPS62154650A - Insulating substrate having high thermal conductivity and manufacture thereof - Google Patents

Insulating substrate having high thermal conductivity and manufacture thereof

Info

Publication number
JPS62154650A
JPS62154650A JP29543485A JP29543485A JPS62154650A JP S62154650 A JPS62154650 A JP S62154650A JP 29543485 A JP29543485 A JP 29543485A JP 29543485 A JP29543485 A JP 29543485A JP S62154650 A JPS62154650 A JP S62154650A
Authority
JP
Japan
Prior art keywords
substrate
thermal conductivity
insulating layer
high thermal
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP29543485A
Other languages
Japanese (ja)
Other versions
JPH0740599B2 (en
Inventor
Kenji Yamamoto
憲治 山本
Takehisa Nakayama
中山 威久
Yoshihisa Owada
善久 太和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kanegafuchi Chemical Industry Co Ltd
Original Assignee
Kanegafuchi Chemical Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kanegafuchi Chemical Industry Co Ltd filed Critical Kanegafuchi Chemical Industry Co Ltd
Priority to JP60295434A priority Critical patent/JPH0740599B2/en
Priority to EP94112466A priority patent/EP0635871A2/en
Priority to EP19860115233 priority patent/EP0221531A3/en
Priority to US06/927,211 priority patent/US4783368A/en
Publication of JPS62154650A publication Critical patent/JPS62154650A/en
Publication of JPH0740599B2 publication Critical patent/JPH0740599B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/147Semiconductor insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3732Diamonds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Insulating Bodies (AREA)

Abstract

PURPOSE:To be able the use of a substrate as a hybrid IC substrate or a substrate for a high frequency high power transistor by preparing the substrate by providing an insulating layer having a large thermal conductivity on a single crystal silicon or a polycrystalline silicon substrate to make it to be of a high thermal conductivity and a low permittivity. CONSTITUTION:A silicon substrate 1 is set at an RF applying electrode 2 side, a DC voltage is applied through a high frequency choke coil 3, and a magnetic field B is applied to the vicinity of the substrate in a direction perpendicular to an electric field, i.e., parallel to the surface of the substrate. The substrate is heated to 200-300 deg.C to discharge with both DC and RF mixture. H2, CH4, SiH4 are fed as reaction gases from a gas inlet 4, an RF power is applied and a DC voltage is applied. The pressure of a reaction chamber is 0.3-5Torr, and a silicon carbide film having approx. 3-5mum is obtained in approx. 1hr of reaction time.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は高熱伝導性絶縁基板およびその製法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a highly thermally conductive insulating substrate and a method for manufacturing the same.

〔従来の技術・発明が解決しようとする問題点〕IC,
LSIなどの発展によって電子回路の小型化、高集積化
、高出力化が進むとともに、半導体素子の実装密度も高
密度化している。このような半導体素子の高集積化、高
出力化、高密度化にともない、チップ当りの素子数は年
々増大しており、チップ当りの発熱量も増大している。
[Problems to be solved by conventional technology/invention] IC,
With the development of LSI and other technologies, electronic circuits are becoming smaller, more highly integrated, and have higher output, and the packaging density of semiconductor elements is also increasing. As semiconductor devices become more highly integrated, have higher output power, and become more dense, the number of devices per chip is increasing year by year, and the amount of heat generated per chip is also increasing.

この発熱量の増大は、半導体素子の信頼性に大きな影響
を及ぼすため、高熱伝導性のパッケージ材料に対する要
望が強くなってきている。またハイブリッドICでは、
発熱部品が同一パッケージ内に同居する様になり、高密
度化実装をさらにすすめるためには、高熱伝導性絶縁基
板が必要となってきている。
This increase in heat generation has a significant effect on the reliability of semiconductor devices, and therefore there is an increasing demand for packaging materials with high thermal conductivity. Also, in hybrid IC,
Heat-generating components are now coexisting in the same package, and in order to further promote high-density packaging, highly thermally conductive insulating substrates are becoming necessary.

さらに実際に素子を搭載することを考えると、熱膨張係
数が素子および他のパッケージ構成材料や回路基板の熱
膨張係数に近似していることが重要である。
Furthermore, when considering actually mounting an element, it is important that the coefficient of thermal expansion is close to that of the element, other package constituent materials, and circuit board.

前記両者を満足する基板として、MN、ヒタセラムSi
C、BeOなどのセラミック基板が考えられているが、
いずれも高価格で、その上BcOには毒性があり、ヒタ
セラムSICには焼結助剤としてBeOを用いており、
高周波での誘電率がI M Hzで約40と大きいとい
う問題があり、MNには水またはアルカリに対して安定
性がわるいという問題があるなどの欠点を有している。
As a substrate that satisfies both of the above, MN, Hitaceram Si
Ceramic substrates such as C and BeO are being considered, but
Both are expensive, and BcO is toxic, and Hitaceram SIC uses BeO as a sintering aid.
There is a problem that the dielectric constant at high frequencies is as large as about 40 at I MHz, and MN has drawbacks such as poor stability against water or alkali.

本発明は、素子あるいは他のパッケージ構成材料や回路
基板の熱膨張係数に近似する高熱伝導性絶縁基板であっ
て、NN1ヒタラセムSiC。
The present invention is a high thermal conductivity insulating substrate having a coefficient of thermal expansion close to that of an element or other package constituent material or circuit board, the substrate being made of NN1 Hitaracem SiC.

BeOなどのセラミック基板が有する欠点を有しない絶
縁基板をうることを目的とする。
The object of the present invention is to provide an insulating substrate that does not have the drawbacks of ceramic substrates such as BeO.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、単結晶シリコンまたは多結晶シリコン基板表
面に、熱伝導率の大きい高周波での誘電率の小さい絶縁
層を被覆した基板を用いると、上記問題を解決しうろこ
とを見出したことによりなされたものであり、単結晶シ
リコンまたは多結晶シリコン基板表面の少なくとも一部
を熱伝導率の大きい絶縁層で被覆した高熱伝導性絶縁基
板、および単結晶シリコンまたは多結晶シリコン基板表
面の少なくとも一部を熱伝導率の大きい絶縁層で被覆し
た高熱伝導性絶縁基板を製造する際に、単結晶シリコン
または多結晶シリコン基板をRF投入電極側にセットし
、この電極にDC電圧およびRFパワーを印加し、基板
表面と平行に磁界をかけて絶縁層を形成することを特徴
とする高熱伝導性絶縁基板の製法に関する。
The present invention was made based on the discovery that the above problems can be solved by using a substrate in which the surface of a single crystal silicon or polycrystalline silicon substrate is coated with an insulating layer that has a high thermal conductivity and a low dielectric constant at high frequencies. A highly thermally conductive insulating substrate in which at least a portion of the surface of a single-crystal silicon or polycrystalline silicon substrate is covered with an insulating layer having high thermal conductivity; When manufacturing a highly thermally conductive insulating substrate covered with an insulating layer with high thermal conductivity, a single crystal silicon or polycrystalline silicon substrate is set on the RF injection electrode side, and a DC voltage and RF power are applied to this electrode. The present invention relates to a method for manufacturing a highly thermally conductive insulating substrate, which is characterized by forming an insulating layer by applying a magnetic field parallel to the surface of the substrate.

〔実施例〕〔Example〕

本発明に用いる単結晶シリコンまたは多結晶シリコン基
板とは、50W/m・K以上の熱伝導率を有する単結晶
シリコンまたは多結晶シリコンからなる、たとえば10
〜200 mmφまたは10〜200mm口で厚さ 0
.1〜2 mmのごとき形状を有する基板のことである
The single crystal silicon or polycrystalline silicon substrate used in the present invention is made of single crystal silicon or polycrystalline silicon having a thermal conductivity of 50 W/m·K or more, for example, 10
~200mmφ or 10~200mm opening thickness 0
.. It refers to a substrate having a shape of 1 to 2 mm.

本発明においては、前記基板の表面の少なくとも一部が
熱伝導率の大きい絶縁層で被覆されている。
In the present invention, at least a portion of the surface of the substrate is covered with an insulating layer having high thermal conductivity.

表面の少なくとも一部を被覆するとは、少なくとも必要
な部分は被覆するという意味で、基板表面の被覆される
割合にはとくに限定はなく、基板表面全体であってもよ
く、ごく一部であってもよい。
Coating at least a part of the surface means that at least a necessary part is covered, and there is no particular limitation on the proportion of the substrate surface to be covered, and it may be the entire substrate surface or only a small part. Good too.

熱伝導率の大きい、好ましくは50W/ll1・K以上
、さらに好ましくは100W/ll1・K以上の熱伝導
率を有する絶縁層を形成する材料としては、たとえばダ
イヤモンド、ダイヤモンド状炭素、シリコンカーバイド
、非晶質シリコンカーバイド、c−BN、、h−BN、
 M Nなどがあげられ、これらの1種以上を用いて、
好ましくは膜厚1〜50加、さらに好ましくは2〜20
燗の絶縁層が形成される。2種以上の材料を用いて絶縁
層を形成するばあいには、複合した絶縁層にしてもよい
Examples of materials for forming an insulating layer having a high thermal conductivity, preferably 50 W/ll1·K or more, more preferably 100 W/ll1·K or more, include diamond, diamond-like carbon, silicon carbide, and non-silicon. Crystalline silicon carbide, c-BN, h-BN,
M, N, etc., and using one or more of these,
Preferably the film thickness is 1 to 50%, more preferably 2 to 20%
An insulating layer of the hot pot is formed. When an insulating layer is formed using two or more types of materials, a composite insulating layer may be used.

絶縁層を形成する材料がダイヤモンド状炭素のばあいに
は、シリコンまたはゲルマニウム原子のいずれか1種ま
たは両者を9 atm%以下の範囲で含むものが、内部
応力が小さく、付着力が大きく、よりダイヤモンドに近
い物理的特性があるため好ましく、0.1〜4 atm
%の範囲で含むものがさらに好ましい。なお、膜中のシ
リコン量あるいはゲルマニウム量が9atm%をこえる
と熱伝導率が低下する。
When the material forming the insulating layer is diamond-like carbon, a material containing one or both of silicon or germanium atoms in a range of 9 atm% or less has a small internal stress, a large adhesion force, and is more effective. It is preferable because it has physical properties close to those of diamond, and is 0.1 to 4 atm.
It is more preferable that the content be within the range of %. Note that if the amount of silicon or germanium in the film exceeds 9 atm %, the thermal conductivity decreases.

微量の91% Geのこのような効果に関しては、現在
詳細は不明であるが、おそら< 5tSGeのs p 
3軌道がダイヤモンドの核生成に存効に働くものと考え
られる。
Regarding this effect of a trace amount of 91% Ge, the details are currently unknown, but it is likely that the sp of <5tSGe
It is thought that the three orbits are effective in nucleation of diamond.

微量の81、Geを含む硬質カーボン膜に関しては、す
でに特許出願済である。
A patent application has already been filed for a hard carbon film containing trace amounts of 81 and Ge.

絶縁層を形成する材料が非晶質シリコンカーバイドのば
あいには、水素原子およびハロゲン族元素のうちの少な
くとも1種を30atm%以下の範囲で含むものが熱伝
導率が大きいという点から好ましく、0,1〜LOat
m%の範囲で含むものがさらに好ましい。
When the material forming the insulating layer is amorphous silicon carbide, it is preferable that the material contains at least one of hydrogen atoms and halogen group elements in a range of 30 atm% or less from the viewpoint of high thermal conductivity. 0,1~LOat
More preferably, the content is in the range of m%.

前記のごとき絶縁層は、通常108(Ω・印)以上の電
気抵抗率と20V/胴以上の耐電圧を有し、絶縁性基板
として用いるのに好ましい。
The insulating layer as described above usually has an electrical resistivity of 10 8 (Ω·mark) or more and a withstand voltage of 20 V/body or more, and is preferably used as an insulating substrate.

つぎに本発明の高熱伝導性絶縁基板の製法について説明
する。
Next, a method for manufacturing the highly thermally conductive insulating substrate of the present invention will be explained.

単結晶シリコンまたは多結晶シリコン基板表面に絶縁層
を形成する方法にはとくに限定はなく、前記のごとき材
料からなる絶縁層が形成されるかぎりいかなる方法も適
応しうる。
There are no particular limitations on the method for forming an insulating layer on the surface of a single-crystal silicon or polycrystalline silicon substrate, and any method can be applied as long as an insulating layer made of the above-mentioned materials can be formed.

このような方法の具体例としては、ダイヤモンド、ダイ
ヤモンド状炭素、シリコンカーバイド、非晶質シリコン
カーバイド、六方晶BN、立方晶BNなどからなる絶縁
層を形成するばあいに適応されつるDC放電プラズマC
VD法、RF放電プラズマCVD法、DC放電・RF放
電両者混合のプラズマCVD法、電界に直交する磁界も
ったDC放電φRF放電両者混合のプラズマCVD法な
どがあげられる。とくにダイヤモンド、ダイヤモンド状
炭素、シリコンカーバイド、非晶質シリコンカーバイド
からなる絶縁層を形成する際に、基板上で電界と直交す
る磁界をもつDC放電・RF放電両者混合のプラズマC
VD法を適応すると、より結晶性で熱伝導率に優れた膜
が高速に作製されるなどの点から好ましい。
A specific example of such a method is a DC discharge plasma C which is suitable for forming an insulating layer made of diamond, diamond-like carbon, silicon carbide, amorphous silicon carbide, hexagonal BN, cubic BN, etc.
Examples include the VD method, the RF discharge plasma CVD method, the plasma CVD method in which both DC discharge and RF discharge are mixed, and the plasma CVD method in which both DC discharge and φRF discharge are mixed in a magnetic field perpendicular to the electric field. In particular, when forming an insulating layer made of diamond, diamond-like carbon, silicon carbide, or amorphous silicon carbide, plasma C is a mixture of both DC discharge and RF discharge with a magnetic field perpendicular to the electric field on the substrate.
It is preferable to apply the VD method because a film with more crystallinity and excellent thermal conductivity can be produced at high speed.

基板上で電界と直交する磁界をもつDC放電・RF放電
両者混合のプラズマCVD法により高熱伝導性絶縁基板
を製造する際の具体的な方法としては、たとえば第1図
に示すように、RF投入電極(′2J側に単結晶シリコ
ンまたは多結晶シリコン基板(1)をセットし、この電
極に高周波チョークコイル(3)をとおしてDC電圧、
好ましくは−150〜−600■のDC電圧を印加し、
RFパワー、好ましくは 100〜400w(140〜
560+llW /cJ)のRFパワ−を印加し、好ま
しくは0.1〜20Torrの反応圧力、200〜35
0℃の基板温度で、基板表面と平行に磁界(B)、好ま
しくは100〜1000ガウスの磁界(13)をかけな
がら絶縁層を形成するごとき方法があげられる。
A specific method for manufacturing a highly thermally conductive insulating substrate using a plasma CVD method that combines both DC discharge and RF discharge with a magnetic field perpendicular to the electric field on the substrate is as shown in Figure 1. A single crystal silicon or polycrystal silicon substrate (1) is set on the electrode ('2J side), and a DC voltage is applied to this electrode through a high frequency choke coil (3).
Applying a DC voltage of preferably -150 to -600,
RF power, preferably 100~400w (140~
Apply an RF power of 560+llW/cJ), preferably a reaction pressure of 0.1 to 20 Torr, and a reaction pressure of 200 to 35 Torr.
An example of this method is to form an insulating layer at a substrate temperature of 0° C. while applying a magnetic field (B), preferably a magnetic field (13) of 100 to 1000 Gauss, parallel to the substrate surface.

このようにして製造された本発明の基板は、熱伝導率力
50W/m・K以上、好ましく Lt 100W/a+
・K以上、表面ビッカーズ硬度が500以上、好ましく
は1500以上、さらに好ましくは2000以上、絶縁
層の種類により異なるが電気絶縁性がIXLO9Ω・c
m以上、IMHzでの誘電率が20以下(シリコンカー
バイドのばあいには15以下)、I M Hzでの誘電
損失が0.02以下のごとき特性ををするものである。
The substrate of the present invention manufactured in this way has a thermal conductivity of 50 W/m·K or more, preferably Lt 100 W/a+
・K or more, surface Vickers hardness is 500 or more, preferably 1500 or more, more preferably 2000 or more, electrical insulation is IXLO9Ω・c, although it varies depending on the type of insulating layer.
m or more, the dielectric constant at I MHz is 20 or less (15 or less in the case of silicon carbide), and the dielectric loss at I MHz is 0.02 or less.

また、熱膨張係数は絶縁層を形成する基板として単結晶
シリコンまたは多結晶シリコン基板を用いているので、
高温処理を必要とする厚膜回路用ハイブリッドIC基板
材料に適し、また酸、アルカリに対して非常に安定であ
る。
In addition, the coefficient of thermal expansion is
It is suitable for hybrid IC substrate materials for thick film circuits that require high-temperature processing, and is extremely stable against acids and alkalis.

以下、本発明を実施例に基づいて説明する。Hereinafter, the present invention will be explained based on examples.

実施例1〜2 第1図に示すごときプラズマCVD装置にて単結晶シリ
コン上にSiC膜を作製した。
Examples 1 to 2 A SiC film was produced on single crystal silicon using a plasma CVD apparatus as shown in FIG.

LOOX  toox  0.5mmのシリコン基板(
1)を、第1図に示すようにRF投入電極(2)側にセ
ットした。
LOOX toox 0.5mm silicon substrate (
1) was set on the RF injection electrode (2) side as shown in FIG.

DC電圧は高周波チョークコイル(3)を通して印加し
た。基板付近には電界と直交する方向、つまりシリコン
基板表面と平行に磁界(B)をかけた。
DC voltage was applied through a high frequency choke coil (3). A magnetic field (B) was applied near the substrate in a direction perpendicular to the electric field, that is, parallel to the silicon substrate surface.

磁場強度は 100〜500ガウスであった。この装置
にて基板温度を200〜300℃に加熱し、DC。
The magnetic field strength was 100-500 Gauss. The substrate temperature was heated to 200 to 300°C using this device, and DC was applied.

RF両者混合の放電をおこした。反応ガスとして、H2
−100〜200900M、CH4= 20〜80SC
CM、S i H4−10〜809CCMをガス導入口
(4)から流し、R,Fパワー 100〜300W(1
40〜420mW/cJ )を印加し、DC電圧を−1
50〜−400v印加した。反応室圧力は0.3〜5T
orrであった。反応時間約1時間で約3〜5虜のシリ
コンカーバイド膜かえられた。
A mixed discharge of both RF was generated. As a reaction gas, H2
-100~200900M, CH4=20~80SC
CM, S i H4-10~809CCM is flowed from the gas inlet (4), R, F power is 100~300W (1
40 to 420 mW/cJ) and set the DC voltage to -1.
50 to -400v was applied. Reaction chamber pressure is 0.3-5T
It was orr. Approximately 3 to 5 silicon carbide membranes were replaced in a reaction time of approximately 1 hour.

えられた膜は、X線回折分析の結果、微結晶β−8iC
であることがわかった。膜のIR測測定ら、膜中にはシ
リコンおよびカーボンに結合した水素の吸収が存在し、
膜中の水素含量は1〜15ato+%であった。
As a result of X-ray diffraction analysis, the obtained film was found to contain microcrystalline β-8iC.
It turned out to be. IR measurements of the film show that there is absorption of hydrogen bonded to silicon and carbon in the film.
The hydrogen content in the membrane was 1-15 ato+%.

えられた膜の一例の諸特性を第1表に示した。Table 1 shows various properties of an example of the obtained film.

膜厚は約5虜ものである。第1表に示したのは膜中のカ
ーボン含量がそれぞれ40atm%、6゜atIn%の
ものである。
The film thickness is approximately 5 mm. The films shown in Table 1 have carbon contents of 40 atm % and 6 atIn %, respectively.

膜中のシリコン量、カーボン量により諸特性の値は変化
し、傾向としてはカーボン量が50atm%をこえると
硬度は増加するが、熱伝導度が低下した。
The values of various properties change depending on the amount of silicon and carbon in the film, and as a tendency, when the amount of carbon exceeds 50 atm %, hardness increases, but thermal conductivity decreases.

えられた絶縁基板が通常の焼結によってえられた高熱伝
導性SiCと比較して誘電率が小さいのは、SICか完
全な結晶または多結晶になっているのではなく、水素を
含むアモルファスシリコンカーバイドと結晶SiCの両
者からなる構造で、水素を含む非晶質部分により誘電率
が小さく、結晶部分により熱伝導率がよくなっているた
めと考えられる。
The reason why the obtained insulating substrate has a lower dielectric constant than high thermal conductivity SiC obtained by normal sintering is that it is not SIC, completely crystalline or polycrystalline, but amorphous silicon containing hydrogen. This is thought to be because it has a structure consisting of both carbide and crystalline SiC, and the dielectric constant is low due to the amorphous portion containing hydrogen, and the thermal conductivity is good due to the crystalline portion.

実施例3 通常のRFプラズマCVD装置(磁場および直流電源の
ない装置)にて実施例1と同様にして絶縁基板を作製し
た。えられた膜はアモルファスで、カーボン含ff14
0atm%のばあいの膜の諸特性は、第1表に示すよう
に絶縁性が非常に優れており、熱伝導率が50〜90W
/1Il・Kであった。
Example 3 An insulating substrate was produced in the same manner as in Example 1 using a normal RF plasma CVD apparatus (equipment without magnetic field and DC power supply). The resulting film is amorphous and contains carbon ff14.
As shown in Table 1, the properties of the film in the case of 0 atm% are very good insulating properties, and the thermal conductivity is 50 to 90 W.
/1Il・K.

実施例4 実施例1と同様の装置にて製膜を行なった。Example 4 Film formation was performed using the same apparatus as in Example 1.

磁場強度(B)  300〜1000ガウス、基板温度
250〜350℃、反応ガスとしてH2−100〜30
0SCCM、CH4−1〜IO3CCMを用い、RFパ
ワー 100〜400W(140〜 560+++W/
 ci ) 、DC電圧−200〜−eoov 、反応
室圧力0.1〜20Torrであった。
Magnetic field strength (B) 300-1000 Gauss, substrate temperature 250-350°C, H2-100-30 as reaction gas
Using 0SCCM, CH4-1~IO3CCM, RF power 100~400W (140~560+++W/
ci), DC voltage -200 to -eoov, and reaction chamber pressure 0.1 to 20 Torr.

実験条件は実施例1と比較して、I?l’パワー、DC
電圧とも大きめ、CH4をH2にて10容量%以下に希
釈することが異なっていた。
Compared to Example 1, the experimental conditions were I? l'power, DC
The difference was that both voltages were higher and CH4 was diluted to 10% by volume or less with H2.

反応時間2時間で約3〜5燗のダイヤモンド状炭素膜か
えられた。えられた膜の表面ビッカース硬度は6000
〜8000と天然ダイヤモンドに近い値であった。また
、膜のTED (電子線回折)分析によると、ダイヤモ
ンド粒子の生成が確かめられた。条件により作製される
膜はかなり異なった。比較的低濃度のメタン(5容量%
以下)を用いて作製した5加の膜の諸特性を第1表に示
す。付着硬度は20〜50kg/cJと小さかった。
Approximately 3 to 5 cups of diamond-like carbon film were replaced in a reaction time of 2 hours. The surface Vickers hardness of the obtained film is 6000.
~8000, a value close to that of natural diamond. Furthermore, TED (electron diffraction) analysis of the film confirmed the formation of diamond particles. The films produced differed considerably depending on the conditions. Relatively low concentration of methane (5% by volume)
Table 1 shows the properties of the pentagonal film produced using the following methods. The adhesion hardness was as low as 20 to 50 kg/cJ.

実施例5 実施例4と同様の条件でメタンガスに対してシランガス
を0゜1〜7重量%または水素化ゲルマニウムガスを0
.1〜5容量%添加して、ダイヤモンド状炭素膜を作製
した。
Example 5 Under the same conditions as Example 4, 0.1 to 7% by weight of silane gas or 0% germanium hydride gas was added to methane gas.
.. A diamond-like carbon film was produced by adding 1 to 5% by volume.

シランガスを0.5容量%添加して作製した膜の諸特性
を第1表に示した。
Table 1 shows the properties of the film prepared by adding 0.5% by volume of silane gas.

膜中にはシリコンが1aU%存在していた(ESCAに
より定ff1)。
Silicon was present in the film at 1aU% (defined as ff1 by ESCA).

このシリコンを微量含むダイアモンド状炭素膜は膜自身
の内部応力が非常に小さく、またシリコンを含まない膜
と比較して、付着力も数倍で、電気絶縁性も向上してい
た。
This diamond-like carbon film containing a small amount of silicon had very low internal stress, and compared to a film that did not contain silicon, its adhesion was several times higher and its electrical insulation properties were improved.

[以下余白] 〔発明の効果〕 単結晶シリコンまたは多結晶シリコン基板上に熱伝導率
の大きい絶縁層を設けた本発明の基板は、高熱伝導性お
よび低誘電率であるので、ハイブリッドIC基板、高周
波ハイパワートラン′ シスター用の基板として使用し
つる。
[Margins below] [Effects of the Invention] The substrate of the present invention, in which an insulating layer with high thermal conductivity is provided on a single-crystal silicon or polycrystalline silicon substrate, has high thermal conductivity and low dielectric constant, so it can be used as a hybrid IC substrate, Used as a substrate for high-frequency high-power transformer sister.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の基板を製造するのに用いるプラズマC
VD装置に関する説明図である。 (図面の主要符号) (1)シリコン基板
Figure 1 shows the plasma C used to manufacture the substrate of the present invention.
FIG. 2 is an explanatory diagram regarding a VD device. (Main symbols in drawings) (1) Silicon substrate

Claims (1)

【特許請求の範囲】 1 単結晶シリコンまたは多結晶シリコン基板表面の少
なくとも一部を熱伝導率の大きい絶縁層で被覆した高熱
伝導性絶縁基板。 2 熱伝導率の大きい絶縁層が、ダイヤモンド、ダイヤ
モンド状炭素、シリコンカーバイド、非晶質シリコンカ
ーバイド、c−BN、h−BN、AlNの1種または2
種以上からなる層である特許請求の範囲第1項記載の基
板。 3 ダイヤモンド状炭素が、シリコンおよびゲルマニウ
ム原子の少なくとも1種を9atm%以下含むダイヤモ
ンド状炭素である特許請求の範囲第2項記載の基板。 4 非晶質シリコンカーバイドが、水素原子およびハロ
ゲン族元素のうちの少なくとも1種を含む特許請求の範
囲第2項記載の基板。 5 熱伝導率の大きい絶縁層が、電気抵抗率10^8(
Ω・cm)以上で耐電圧20V/μmである特許請求の
範囲第1項または第2項記載の基板。 6 高熱伝導性絶縁基板の熱伝導率が50W/m・K以
上である特許請求の範囲第1項記載の基板。 7 高熱伝導性絶縁基板の熱伝導率が100W/m・K
以上である特許請求の範囲第1項記載の基板。 8 高熱伝導性絶縁基板の表面ビッカース硬度が500
以上である特許請求の範囲第1項または第2項記載の基
板。 9 高熱伝導性絶縁基板の表面ビッカース硬度が150
0以上である特許請求の範囲第1項または第2項記載の
基板。 10 1MHzでの誘電率が20以下で、1MHzでの
誘電損失が0.02以下である特許請求の範囲第1項記
載の基板。 11 熱伝導率の大きい絶縁層が、DC放電プラズマC
VD法、RF放電プラズマCVD法、DC放電とRF放
電両者混合のプラズマCVD法または電界に直交する磁
界をもったDC、RF放電両者混合のプラズマCVD法
によってえられる特許請求の範囲第1項または第2項記
載の基板。 12 ダイヤモンド、ダイヤモンド状炭素、非晶質シリ
コンカーバイド、シリコンカーバイドが、基板上に電界
と直交する磁界をもつDC、RF放電両者混合プラズマ
CVD法によりえられる特許請求の範囲第2項記載の基
板。 13 単結晶シリコンまたは多結晶シリコン基板表面の
少なくとも一部を熱伝導率の大きい絶縁層で被覆した高
熱伝導性絶縁基板を製造する際に、単結晶シリコンまた
は多結晶シリコン基板をRF投入電極側にセットし、こ
の電極にDC電圧およびRFパワーを印加し、基板表面
と平行に磁界をかけて絶縁層を形成することを特徴とす
る高熱伝導性絶縁基板の製法。 14 絶縁層が、単結晶シリコンまたは多結晶シリコン
基板をセットしたRF投入電極に−150〜−600V
のDC電圧および100〜400W(140〜560m
W/cm^2)のRFパワーを印加し、基板表面と平行
に100〜1000ガウスの磁界をかけ、反応圧力0.
1〜20Torr、基板温度200〜350℃で形成さ
れる特許請求の範囲第13項記載の製法。
[Scope of Claims] 1. A highly thermally conductive insulating substrate in which at least a portion of the surface of a single-crystal silicon or polycrystalline silicon substrate is covered with an insulating layer having high thermal conductivity. 2 The insulating layer with high thermal conductivity is one or two of diamond, diamond-like carbon, silicon carbide, amorphous silicon carbide, c-BN, h-BN, and AlN.
The substrate according to claim 1, which is a layer consisting of at least one species. 3. The substrate according to claim 2, wherein the diamond-like carbon contains 9 atm % or less of at least one of silicon and germanium atoms. 4. The substrate according to claim 2, wherein the amorphous silicon carbide contains at least one of a hydrogen atom and a halogen group element. 5 The insulating layer with high thermal conductivity has an electrical resistivity of 10^8 (
3. The substrate according to claim 1 or 2, which has a withstand voltage of 20 V/μm at a dielectric strength of 20 V/μm. 6. The substrate according to claim 1, wherein the high thermal conductivity insulating substrate has a thermal conductivity of 50 W/m·K or more. 7 The thermal conductivity of the high thermal conductive insulating substrate is 100 W/m・K
The substrate according to claim 1, which is the above. 8 The surface Vickers hardness of the highly thermally conductive insulating substrate is 500.
The substrate according to claim 1 or 2, which is the above. 9 The surface Vickers hardness of the highly thermally conductive insulating substrate is 150.
3. The substrate according to claim 1 or 2, wherein the number is 0 or more. 10. The substrate according to claim 1, which has a dielectric constant of 20 or less at 1 MHz and a dielectric loss of 0.02 or less at 1 MHz. 11 The insulating layer with high thermal conductivity is
Claim 1 obtained by VD method, RF discharge plasma CVD method, plasma CVD method with a mixture of DC discharge and RF discharge, or plasma CVD method with a mixture of DC discharge and RF discharge with a magnetic field perpendicular to the electric field, or The substrate according to item 2. 12. The substrate according to claim 2, wherein diamond, diamond-like carbon, amorphous silicon carbide, and silicon carbide are obtained by a DC and RF discharge mixed plasma CVD method with a magnetic field perpendicular to an electric field on the substrate. 13 When manufacturing a highly thermally conductive insulating substrate in which at least a portion of the surface of a single-crystal silicon or polycrystalline silicon substrate is covered with an insulating layer having high thermal conductivity, the single-crystal silicon or polycrystalline silicon substrate is placed on the RF input electrode side. A method for manufacturing a highly thermally conductive insulating substrate, which comprises: setting the electrodes, applying a DC voltage and RF power to the electrodes, and applying a magnetic field parallel to the substrate surface to form an insulating layer. 14 The insulating layer is -150 to -600V to the RF input electrode set on the single crystal silicon or polycrystal silicon substrate.
DC voltage and 100~400W (140~560m
An RF power of W/cm^2) was applied, a magnetic field of 100 to 1000 Gauss was applied parallel to the substrate surface, and a reaction pressure of 0.
The manufacturing method according to claim 13, which is formed at a temperature of 1 to 20 Torr and a substrate temperature of 200 to 350°C.
JP60295434A 1985-11-06 1985-12-26 High thermal conductive insulating substrate and manufacturing method thereof Expired - Lifetime JPH0740599B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP60295434A JPH0740599B2 (en) 1985-12-26 1985-12-26 High thermal conductive insulating substrate and manufacturing method thereof
EP94112466A EP0635871A2 (en) 1985-11-06 1986-11-04 High heat conductive insulated substrate and method of manufacturing the same
EP19860115233 EP0221531A3 (en) 1985-11-06 1986-11-04 High heat conductive insulated substrate and method of manufacturing the same
US06/927,211 US4783368A (en) 1985-11-06 1986-11-05 High heat conductive insulated substrate and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60295434A JPH0740599B2 (en) 1985-12-26 1985-12-26 High thermal conductive insulating substrate and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPS62154650A true JPS62154650A (en) 1987-07-09
JPH0740599B2 JPH0740599B2 (en) 1995-05-01

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ID=17820548

Family Applications (1)

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Country Link
JP (1) JPH0740599B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4847215A (en) * 1987-10-31 1989-07-11 Nippon Soken, Inc. Method for forming silicon carbide semiconductor film
JP2008502816A (en) * 2004-06-15 2008-01-31 シーメンス パワー ジェネレーション インコーポレイテッド Nano-filler diamond-like coating

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58103156A (en) * 1981-12-15 1983-06-20 Sumitomo Electric Ind Ltd Substrate for semiconductor device
JPS6256385A (en) * 1985-05-24 1987-03-12 松下電工株式会社 High heat conductive substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58103156A (en) * 1981-12-15 1983-06-20 Sumitomo Electric Ind Ltd Substrate for semiconductor device
JPS6256385A (en) * 1985-05-24 1987-03-12 松下電工株式会社 High heat conductive substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4847215A (en) * 1987-10-31 1989-07-11 Nippon Soken, Inc. Method for forming silicon carbide semiconductor film
JP2008502816A (en) * 2004-06-15 2008-01-31 シーメンス パワー ジェネレーション インコーポレイテッド Nano-filler diamond-like coating
US8313832B2 (en) 2004-06-15 2012-11-20 Siemens Energy, Inc. Insulation paper with high thermal conductivity materials
KR101279940B1 (en) * 2004-06-15 2013-07-05 지멘스 에너지, 인코포레이티드 Diamond like coating of nanofillers

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