JPS62152512U - - Google Patents
Info
- Publication number
- JPS62152512U JPS62152512U JP3980686U JP3980686U JPS62152512U JP S62152512 U JPS62152512 U JP S62152512U JP 3980686 U JP3980686 U JP 3980686U JP 3980686 U JP3980686 U JP 3980686U JP S62152512 U JPS62152512 U JP S62152512U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- transistor
- reference potential
- potential point
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第1図は本考案のレベル調整回路の一実施例を
示す回路図、第2図は第1図のレベル調整用可変
抵抗の抵抗変化特性を示す特性図、第3図は第1
図の回路における音量コントロール特性を示す特
性図、第4図は従来のレベル調整回路を示す回路
図、第5図は従来回路における可変抵抗値の変化
に対する出力レベルの変化特性を示す特性図であ
る。
12,14……トランジスタ、13,15,1
6,17,19……抵抗、18……可変抵抗。
FIG. 1 is a circuit diagram showing an embodiment of the level adjustment circuit of the present invention, FIG. 2 is a characteristic diagram showing the resistance change characteristics of the level adjustment variable resistor shown in FIG. 1, and FIG.
FIG. 4 is a circuit diagram showing the conventional level adjustment circuit; FIG. 5 is a characteristic diagram showing the change characteristics of the output level with respect to changes in the variable resistance value in the conventional circuit. . 12, 14...transistor, 13, 15, 1
6, 17, 19...resistance, 18...variable resistance.
Claims (1)
、出力レベル調整用の直流電圧がこれらトランジ
スタのベースに抵抗を介して供給されることによ
つて、各ベース間の差電圧を調整し、共通エミツ
タ側に加えられる入力信号を前記直流電圧の変化
に応じて増幅し、一方のトランジスタのコレクタ
からレベル調整された信号を出力する差動増幅器
と、 この差動増幅器のベースと基準電位点との間に
コレクタ・エミツタ路が互に直列に接続された第
3、第4のトランジスタと、 電圧源と基準電位点との間に接続された分圧回
路と、 両端が前記電圧源と基準電位点との間に接続さ
れ、摺動端が前記分圧回路の分圧点に接続される
可変抵抗であつて、抵抗両端の機械的中点と基準
電位点間の抵抗変化特性が直線状に上昇する直線
特性を有し、前記電圧源と前記機械的中点間の抵
抗変化特性が急峻に上昇する曲線特性を有した可
変抵抗と、 この可変抵抗の摺動端を摺動することによつて
得た変化電圧を前記第3のトランジスタのベース
に供給する手段と、 前記可変抵抗の摺動端を摺動することによつて
得た変化電圧を前記第4のトランジスタのベース
に供給し、その変化電圧が所定レベルに達したと
きに第4のトランジスタを導通から非導通へ変化
させる手段とを具備したことを特徴とするレベル
調整回路。[Claims for Utility Model Registration] It has first and second transistors forming a differential pair, and a DC voltage for output level adjustment is supplied to the bases of these transistors via a resistor, so that each a differential amplifier that adjusts the voltage difference between the bases, amplifies the input signal applied to the common emitter side according to the change in the DC voltage, and outputs the level-adjusted signal from the collector of one transistor; third and fourth transistors whose collector-emitter paths are connected in series between the base of the dynamic amplifier and the reference potential point; a voltage divider circuit connected between the voltage source and the reference potential point; , a variable resistor whose both ends are connected between the voltage source and the reference potential point, and whose sliding end is connected to the voltage dividing point of the voltage dividing circuit, the mechanical midpoint of both ends of the resistor and the reference potential point a variable resistor having a linear characteristic in which a resistance change characteristic between the voltage source and the mechanical midpoint rises in a straight line, and a curved resistance change characteristic in which a resistance change characteristic between the voltage source and the mechanical midpoint rises steeply; means for supplying the variable voltage obtained by sliding the sliding end of the variable resistor to the base of the third transistor; 1. A level adjustment circuit comprising means for supplying a voltage to the base of a fourth transistor and changing the fourth transistor from conductive to non-conductive when the changing voltage reaches a predetermined level.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3980686U JPS62152512U (en) | 1986-03-20 | 1986-03-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3980686U JPS62152512U (en) | 1986-03-20 | 1986-03-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62152512U true JPS62152512U (en) | 1987-09-28 |
Family
ID=30853322
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3980686U Pending JPS62152512U (en) | 1986-03-20 | 1986-03-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62152512U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01109809A (en) * | 1987-10-23 | 1989-04-26 | Hitachi Ltd | Sound volume control circuit for audio equipment |
-
1986
- 1986-03-20 JP JP3980686U patent/JPS62152512U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01109809A (en) * | 1987-10-23 | 1989-04-26 | Hitachi Ltd | Sound volume control circuit for audio equipment |
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