JPS62152443U - - Google Patents
Info
- Publication number
- JPS62152443U JPS62152443U JP1986039138U JP3913886U JPS62152443U JP S62152443 U JPS62152443 U JP S62152443U JP 1986039138 U JP1986039138 U JP 1986039138U JP 3913886 U JP3913886 U JP 3913886U JP S62152443 U JPS62152443 U JP S62152443U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- semiconductor element
- electrodes
- view
- electrode structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/10175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/11011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/11013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the bump connector, e.g. solder flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Description
第１図イは本考案による基板の電極構造の一実
施例を交換前の不良半導体素子が接続された状態
で示す断面図、ロはその一部破断平面図、第２図
イは第１図の実施例を交換後の新たな半導体素子
が接続された状態で示す断面図、ロはその一部破
断平面図、第３図および第４図はそれぞれ従来の
半導体素子の接続状態を示す断面図である。
１…基板、２…基板配線、３…判導体素子、４
…バンプ、５…ダム、６，６ａ，６ｂ…電極。
Figure 1A is a cross-sectional view showing one embodiment of the electrode structure of the substrate according to the present invention with a defective semiconductor element connected before replacement, Figure 1B is a partially cutaway plan view thereof, and Figure 2A is the same as the one shown in Figure 1. A sectional view showing the embodiment with a new semiconductor element connected after replacement, B is a partially cutaway plan view thereof, and FIGS. 3 and 4 are sectional views showing the connected state of the conventional semiconductor element, respectively. It is. DESCRIPTION OF SYMBOLS 1... Board, 2... Board wiring, 3... Size conductor element, 4
...bump, 5...dam, 6, 6a, 6b...electrode.
Claims (1)
に少なくとも２個の電極を近接して設け、 前記電極の一方に導電性結合部材を介して半導
体素子を接続するようにした基板の電極構造。[Claims for Utility Model Registration] At least two electrodes are provided close to each end of a plurality of substrate wirings formed on a substrate, and a semiconductor element is connected to one of the electrodes via a conductive coupling member. The electrode structure of the substrate is designed to
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986039138U JPS62152443U (en) | 1986-03-19 | 1986-03-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986039138U JPS62152443U (en) | 1986-03-19 | 1986-03-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62152443U true JPS62152443U (en) | 1987-09-28 |
Family
ID=30852033
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986039138U Pending JPS62152443U (en) | 1986-03-19 | 1986-03-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62152443U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014063932A (en) * | 2012-09-21 | 2014-04-10 | Ngk Spark Plug Co Ltd | Wiring board and manufacturing method of the same |
-
1986
- 1986-03-19 JP JP1986039138U patent/JPS62152443U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014063932A (en) * | 2012-09-21 | 2014-04-10 | Ngk Spark Plug Co Ltd | Wiring board and manufacturing method of the same |
| US9516751B2 (en) | 2012-09-21 | 2016-12-06 | Ngk Spark Plug Co., Ltd. | Wiring board and method for manufacturing same |