JPS62151940A - Register saving/return system - Google Patents

Abstract

PURPOSE:To obtain a register which is efficient in both performance and memory capacity and does not give the burden to the software development by providing a means to hold the type of a register used by an instruction and saving/return the register based upon the information. CONSTITUTION:For the saving of a register, an SFR 309 and an SMR 308 as ANDed through an AND circuit 310, and the information is latched to a register successive selecting circuit 311 by an one-shot generating circuit 313 by having a register storing signal line 312 outputted at the time of executing the register saving instruction. Out of the information latched by the register successive selecting circuit 311, the register information corresponding to the place where one stands is successively outputted to an address bus 304, and actually, out of the information latched by a register successive selecting circuit 311, saving is executed only to the register corresponding to the place where one stands. Consequently, in such a case, the memory saving is executed in which reg1-reg3 only are the stack area and the data area, and reg(n) does not come to be the object. In order to judge at the time of returning a register which register is saved, the present SFR is also simultaneously saved.

Description

Detailed Description of the Invention (Technical Field) The present invention relates to a central processing unit (CPU) having a plurality of registers.
) This paper relates to procedure calls/returns that occur in a program running on a program or an efficient register save/return method when a task is unavailable.

(Prior Art) When returning from a procedure call 1 procedure or switching tasks, the current execution environment (context) changes, so it is necessary to save/restore registers, which are the main execution environment. This processing is generally performed by a compiler, which is a high-level language processing system, for procedure calls/returns, and by an operating system (aS) for task switching.

When calling/returning a dependent procedure, the compiler saves/restores registers to all registers owned by the cPU, or only registers used within the procedure by using complex software technology. Ta. Additionally, when switching tasks, the operating system cannot fully determine which registers are used by the task, so register save/restore is performed on all registers regardless of whether they are used or not. In this way, in the conventional register saving/restoring method, unnecessary registers are also subject to saving/returning, and performance is improved by reducing the wasted time caused by saving/restoring these unnecessary registers. Furthermore, there was also a problem in terms of memory capacity in that a save area was created for unnecessary registers. Also,
It is possible to exclude unnecessary registers from being saved/restored only during procedure calls/returns, but this places a burden on compiler development, so in practice a method of saving/restoring all registers is adopted. Ta.

(Object of the Invention) An object of the present invention is to provide a register saving/restoring method that is efficient and does not burden software development by eliminating problems in conventional register saving/restoring.

(Structure of the Invention) According to the present invention, in a central processing unit having a plurality of registers, a memory consisting of a plurality of flags that hold on/off values (hereinafter referred to as a save flag register) and a save flag register when an instruction is executed are provided. A means for turning on a flag corresponding to a register used in an instruction among the flag registers, a means for turning off all save flag registers, and a means for storing in memory the self-response of the register corresponding to the flag turned on in the save flag register. When saving registers, the contents of the register group corresponding to the flags turned on by executing an instruction that uses the registers are stored in memory, and then the save flags are saved. Stores the register contents in memory, then turns off all save flag registers, and when the registers are restored,
Loads the contents of the save flag register when saving registers stored in memory into the save flag register,
A register save/restore method is obtained which is characterized in that the save flag register is read and the contents of the memory are loaded into the register group corresponding to the flag that is turned on.

Furthermore, by providing means for holding information that specifies in advance the register group to be saved/restored (hereinafter referred to as a save mask register), registers can be A register save/restore method is obtained which is characterized by a store to memory 2 and a loader from memory to register.

(Operations and Effects) In the present invention, the save flag register (hereinafter abbreviated as 8FR) is updated every time an instruction is executed, and the flag corresponding to the used register is turned on.

Therefore, by referring to 8FR7a, it is possible to determine the type of register used in the instruction execution up to now. For this reason, the compiler uses procedure calls/
1. It is possible to specify the registers to be saved/restored without using complicated software technology at the time of restoration. In fCOS, by referring to 5PR-i of the task being executed, it is possible to easily know the register to be processed at the time of context switching.

In this way, according to the present invention, only the minimum necessary registers can be saved/restored by simply performing register saving/restoring based on the SFR, which is a simple and effective register saving/restoring process. can be realized.

Furthermore, by providing a register (save mask register...hereinafter abbreviated as SMR) that specifies in advance a group of registers to be saved/restored, effective register saving/restoring processing can be performed. This creates register save/restore information by combining 8F'R and SMR during register save/restore, for example by taking a logical product.
Based on this, register save/restore processing is performed. This limitation of registers subject to register save/restore using SMR is effective when registers are used as global variable areas (variables common to multiple procedures) in the compiler, or when registers are used as common variable areas between tasks. be.

(Example) Next, an example of the present invention will be described with reference to all the drawings.

Examples of the present invention are shown in FIGS. 1 to 6. FIG. 1 shows an outline of an embodiment. 1 is a central processing unit, 2 is a storage device, 3 is a register group, 4 is a save flag register (hereinafter referred to as SFR), and 5 is a save mask register (hereinafter referred to as SMB). Here, there are n registers (n
>1) 6, SFB, SMR are n 7 lags J
It consists of an on bit. Also, each flag of 8FH.

When it is 1, it indicates that the register corresponding to that flag has been used in the previous instruction group.

Does it mean that it is not used when it is 0? show. S.M.R.

When each flag is 1, it indicates that the register corresponding to the flag is a target register for register save/restore, and when it is 0, it indicates that it is not a target register.

Here, among register group 3, register number m (0≦m
≦n) (hereinafter referred to as regm, and generally regi is
Register number it-means. ) to re-gn is defined as a variable area common to a procedure group (global variable area) or a common area between tasks.

Therefore, in this case r e gn'xr e g n
There is no need to save/restore registers even if a procedure is called/restored or a task is switched, and these registers are not subject to register saving/restoration. FIG. 2 shows the details of the SMR representing the above-mentioned state rs, b, regl~reg(m-1)
This indicates that the iE register is a register to be saved/restored, and indicates that the registers up to regm''-regn are registers not to be saved/restored.

FIG. 3 is a diagram showing the configuration of this embodiment. 301 is a central processing unit, 302 is a storage device, 303 is a data bus, 304 is an address bus for selecting a register, 305
306 is an external bus, 306 is a register group, 307 is an instruction decoder, 308 is an SMR, 309 is an SFR, 310 is an AND circuit, and 311 is an SMR.

A register sequential selection circuit 312 sequentially selects registers corresponding to flags that are turned on from the register save/restore information obtained by ANDing the register save/restore information and SFR. A load signal line 313 is a one-shot generation circuit for latching the register save/restore information output from the AND circuit 310 into a register sequential selection circuit when executing a register save/restore command, 314 is an 8FR clear signal, and 315 is a , shows a read/write circuit that performs data transfer between the central processing unit and the storage device.

FIG. 4 shows a program executed in this embodiment. 401 is the program, 402 is the procedure name AB
403 indicates that it is C.

%404, which indicates that the value 1 is assigned to regl, indicates that another procedure 1r is being called.

In addition, Figure 5 shows the 8 times when the program in Figure 4 is executed.
FIG. 6 shows the register save/restore state at the time of one procedure call/return.

Next, the operation of the register save/restore method in this embodiment will be explained with reference to FIGS. 2 to 6.

When a register is used in an instruction when executing an instruction, register selection information from the instruction decoder 307 in FIG. The corresponding flag is set to 1. In addition, before the execution of the procedure is started, the 8FR clear signal 314 and each flag of 9.8FR are all cleared to 0.

When the instruction 403 in the program 401 in FIG. 4 is executed, the first bit of SFB becomes 1 because regl is used in this instruction.

FIG. 5 (al shows 8FB at this time. Next, instruction 40
4, registers regl, re
g2+reg3. regn is used, and as shown in FIG. 5(b), the SFR is 1.2, 3. The nth bit becomes 1.

Next, the instruction 404 is executed and one procedure is called, but at this time it is necessary to save the register in order to save the context of the calling procedure.

Register saving processing is normally performed at the beginning of a called procedure or immediately before a procedure call instruction.

Register saving in this embodiment is as follows.

SFR and 8 MRffi groups. This register saving is performed by 5FR309 and 5MR308 in FIG.
is passed through the AND circuit 310, the logical product is taken, and the information is transferred to the register store signal line 312 that is output when the register save instruction is executed. Out of the information latched by the sequential selection circuit, register information corresponding to where 1 is set is sequentially output to the address bus 304, and in reality, among the information latched by the register sequential selection circuit, 1 is set. This is done only for the register corresponding to the location. Therefore, in this case, regl.

reg2. Only reg3 is saved in memory, which is a stack area and a data area, and reg3 is not saved. Furthermore, in order to determine what kind of register has been saved at the time of register restoration, the current SFB is also saved at the same time. FIG. 6 (al indicates this state; in this figure, 2, 601 is a register group, 602 is 8FR, 60
3 indicates an SMR, and 604 indicates a register group saved in memory.

After the register is saved, the flags J and 8F are all cleared to O when a new procedure is executed as described above.

At the end of a procedure, a direct return of one procedure return instruction or a register return is performed immediately after the procedure return. In this embodiment, register restoration is performed first.

SFR saved by register save, 8PR from 6 memory
.

After that, in the same way as register saving, register restoration is performed by taking the AND of SFB and SMH, and only registers corresponding to where 1 is set are performed, and regl,
reg2. Only reg3 is loaded from memory. FIG. 6(b) shows this state.

I have explained above about procedure calls/returns.

Exactly the same thing can be done when switching tasks.

Although this embodiment has a register (save mask register) that specifies all the register groups to be saved/restored, efficient register saving/return can be performed even without this register.

Furthermore, in this embodiment, a series of register saving and restoring processes may be implemented as one instruction, thereby simplifying the register saving/restoring software processing.

(Summary of the Invention) As explained above, the present invention provides a means for retaining the type of register used in an instruction, and saves/restores registers based on that information, thereby making procedure calls/returns possible. At the same time, the save/restore process is performed on the minimum necessary registers when switching tasks, making it possible to realize register save/restore processes that are efficient in terms of performance and memory capacity, and do not place a burden on software development.

Furthermore, by providing a means to specify in advance a group of registers to be saved/restored, it is possible to use registers in the compiler as a global variable area, or as a common variable area between tasks. , very effective.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a schematic diagram of this embodiment, FIG. 2 is a state diagram of the save mask register (SMH) in this embodiment, and FIG. 3 is a diagram showing the configuration of this embodiment. The figures are the program diagram in this embodiment, Figure 5 (al, (bl) is the state diagram of the save flag register (SFL'L) when the program in Figure 4 is executed, and Figure 6 (al, (blU, book). It is a diagram showing the state of register save/restore in the embodiment. l...Central processing unit, 2...Storage device, 3...Register group, 4... ...SFR,
5...SMR, 301...Central processing unit%302...Storage device, 303...Data bus, 304...Select register Address, 305... External bus, 306...
・Register group, 307...Instruction encoder, 30
8......SFR, 309...SFR, 310
771 circuit, 311... Register sequential selection circuit %312... Register store/load signal line, 313... 1 shot generation circuit,
314...SFR clear signal, 315...
...Read/write circuit, 401...Program in this embodiment, 402, 403, 404...
...Program element, 601...Register group, 602...8FR, 603...SM
R, 604...Memory〇

Claims (2)

[Claims] (1) In a central processing unit that has multiple registers, there is a storage means (hereinafter referred to as a save flag register) consisting of multiple flags that hold on and off values, and a save flag register that is used by an instruction when an instruction is executed. means to turn on the flag corresponding to the register to be turned on, means to turn off all save flag registers, store the contents of the register corresponding to the flag turned on in the save flag register to memory, and load the contents of memory to the register. When saving registers, the contents of the register group corresponding to the flags that are turned on are stored in the memory by executing an instruction that uses the registers, and then the contents of the save flag register are stored in the memory, After that, all save flag registers are turned off, and when the registers are restored,
Loads the contents of the save flag register when saving registers stored in memory into the save flag register,
A register save/restore method characterized by reading the save flag register and loading the contents of memory into a group of registers corresponding to flags that are turned on. (2) The register save/restore method as claimed in claim (1), which includes means (hereinafter referred to as a save mask register) for holding information that specifies in advance a group of registers to be saved/restored, and a save flag register. A register save/restore method characterized by storing registers to memory and loading registers from memory based on information obtained by combining the register and save mask register.