JPS62150717A - Forming method of fine pattern - Google Patents

Forming method of fine pattern

Info

Publication number
JPS62150717A
JPS62150717A JP29494285A JP29494285A JPS62150717A JP S62150717 A JPS62150717 A JP S62150717A JP 29494285 A JP29494285 A JP 29494285A JP 29494285 A JP29494285 A JP 29494285A JP S62150717 A JPS62150717 A JP S62150717A
Authority
JP
Japan
Prior art keywords
pattern
monitor
dimensional accuracy
dimensional
electron beam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP29494285A
Other languages
Japanese (ja)
Other versions
JPH0789531B2 (en
Inventor
Kazuhiro Tanaka
和裕 田中
Tadayoshi Imai
今井 忠義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60294942A priority Critical patent/JPH0789531B2/en
Publication of JPS62150717A publication Critical patent/JPS62150717A/en
Publication of JPH0789531B2 publication Critical patent/JPH0789531B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Electron Beam Exposure (AREA)

Abstract

PURPOSE:To obtain a forming method of fine pattern of high accuracy, by arranging a fine pattern capable of monitoring dimensional accuracy, on a semiconductor chip. CONSTITUTION:Monitor patterns 41, 42a, 42b and 43 are arranged on a semiconductor chip 3. Longitudinal dimensions of the monitor patterns 42a and 42b, and a gap dimension (b) between the two monitor patterns 42a and 42b are measured at the same time. Based on these dimensional differences, the dimensional differences in X-direction and Y-direction which generate at the time of electron beam exposure can be monitored. The dimensional accuracy of a scanning-connection part can be monitored by measuring the monitor pattern 41. The monitor pattern 43 is arranged at the scanning-connection part to show being the scanning-connection part. The dimensional accuracy in X-direction and Y-direction can be monitored by a dimensional difference between the width of the monitor pattern 42a, (a), and that of the monitor pattern 41, (a').

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は半導体集積回路に使用されろウェハやフォト
マスクの微細パターン形成方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming fine patterns on wafers and photomasks used in semiconductor integrated circuits.

〔従来の技術〕[Conventional technology]

近年、半導体集積回路はますます高集積化され、高精度
化している。半導体集積回路の制作上写真製版工程は必
要不可欠な工程であり、ますます高精度化が要求されて
いる。
In recent years, semiconductor integrated circuits have become increasingly highly integrated and highly accurate. The photolithography process is an essential process in the production of semiconductor integrated circuits, and increasingly high precision is required.

写真製版工程の精度を向上させるための要因としては、
寸法精度、欠陥、レジストレーション精度等が挙げられ
るが、電子ビーム露光においては高精度なパターンニン
グが可能となっており、寸法精度、レジストレーション
精度等が改良されてきた。
Factors to improve the accuracy of the photolithography process include:
Examples include dimensional accuracy, defects, registration accuracy, etc., but electron beam exposure has made it possible to perform highly accurate patterning, and dimensional accuracy, registration accuracy, etc. have been improved.

しかし、パターンの微細化、高集積化に伴い、寸法精度
がさらに厳しく要求されるようになってきている。
However, as patterns become finer and more highly integrated, dimensional accuracy is increasingly required.

第4図は従来の電子ビーム露光方法によるフォトマスク
作成方法を示す拡大図である。(1)はフォトマスク、
(2)は配置、(3)は半導体チップ、(4)はモニタ
パターンである。
FIG. 4 is an enlarged view showing a photomask manufacturing method using a conventional electron beam exposure method. (1) is a photomask,
(2) is the arrangement, (3) is the semiconductor chip, and (4) is the monitor pattern.

次に、工程について説明する。フォトマスク(11にお
いて、配置(2)は半導体チップ(3)を繰り返し描画
して作成する。フォトマスクfll内の半導体チップ(
3)は、電子ビーム露光装置により順次半導体チップ(
3)の下部よりスキャン毎に分割して露光されていく。
Next, the process will be explained. In the photomask (11), the arrangement (2) is created by repeatedly drawing the semiconductor chip (3).
3) Semiconductor chips (
From the bottom of 3), the light is divided and exposed for each scan.

露光完了後、キユアリング、現像、リンス、ベーキング
およびエソチング工程を経てモニタパターン(4)を含
むパターンが形成される。
After the exposure is completed, a pattern including the monitor pattern (4) is formed through curing, development, rinsing, baking, and etching steps.

従来の微細パターン形成方法では、寸法精度をモニタす
るパターンとして半導体チップ(3)上にモニタパター
ン(41を配置してその寸法精度を測定してきた。した
がって、フォトマスクfllの寸法精度を確認する方法
としては、モニタパターン(4)を測定してフォトマス
ク(1)の面内でのばらつき等を評価できるだけであっ
た。
In the conventional fine pattern forming method, a monitor pattern (41) is placed on the semiconductor chip (3) as a pattern for monitoring the dimensional accuracy and its dimensional accuracy is measured.Therefore, a method for checking the dimensional accuracy of the photomask full However, it was only possible to measure the monitor pattern (4) and evaluate the in-plane variations of the photomask (1).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の微細パターン形成方法は以上のように構成されて
いるので、単にプロセスによる寸法精度しかモニタでき
ず、電子ビーム自身の寸法精度がモニタできないので、
半導体チップ自身の寸法精度を正確にモニタすることは
不可能であるという問題点があった。
Since the conventional fine pattern forming method is configured as described above, it is only possible to monitor the dimensional accuracy due to the process, and it is not possible to monitor the dimensional accuracy of the electron beam itself.
There has been a problem in that it is impossible to accurately monitor the dimensional accuracy of the semiconductor chip itself.

この発明は上記のような問題点を解消するためになされ
たもので、電子ビーム露光により作成された基板に寸法
精度をモニタできるパターンを配置し、より高精度な微
細パターン形成方法を得ることを目的とする。
This invention was made in order to solve the above-mentioned problems, and aims to obtain a method of forming fine patterns with higher precision by arranging a pattern whose dimensional accuracy can be monitored on a substrate created by electron beam exposure. purpose.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る微細パターン形成方法は、寸法精度をモ
ニタできる微細パターンを半導体チップ上あるいは基板
内の有効エリア外に配置することにより、半導体チップ
の電子ビーム露光により生ずる寸法精度等を測定できる
ようにしたものである。
The fine pattern forming method according to the present invention makes it possible to measure the dimensional accuracy caused by electron beam exposure of a semiconductor chip by arranging a fine pattern that can monitor dimensional accuracy on a semiconductor chip or outside an effective area in a substrate. This is what I did.

〔作用〕[Effect]

この発明におけるモニタパターンは、電子ビーム露光時
に特有な走査つなぎ部の寸法精度をモニタすることを可
能にするとともに、白パターンと黒パターンとの寸法差
からX方向とY方向との寸法差をモニタすることを可能
とする。
The monitor pattern according to the present invention makes it possible to monitor the dimensional accuracy of the scanning joint part that is unique to electron beam exposure, and also monitor the dimensional difference between the X direction and the Y direction from the dimensional difference between the white pattern and the black pattern. make it possible to

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。第1
図において、(1)はフォトマスク、(2)は配置、(
3)は半導体チップ、(41)、(42a) 、(42
b)、(43)はモニタパターンである。
An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (1) is the photomask, (2) is the arrangement, (
3) are semiconductor chips, (41), (42a), (42
b) and (43) are monitor patterns.

次に、工程について説明する。フォトマスクfilに半
導体チップ(3)を配置(2)のように矩形に繰り返し
配置ηする。フォトマスク(1)内の半導体チップ(3
)は電子ビーム露光装置により順次半導体チップ(3)
の下部より分割して露光され、半導体チップ(3)の一
点鎖線以下が一回の走査で露光されていく。走査つなぎ
部に、例えば3μmの幅のモニタパターン(41)を横
方向に配置する。次に、次回の走査に移りモニタパター
ン(41)の一部を順次露光していく。
Next, the process will be explained. Semiconductor chips (3) are repeatedly arranged in a rectangular pattern η as shown in arrangement (2) on a photomask fil. Semiconductor chip (3) inside photomask (1)
) are sequentially processed into semiconductor chips (3) using an electron beam exposure device.
The semiconductor chip (3) below the dotted line is exposed in one scan. A monitor pattern (41) having a width of, for example, 3 μm is arranged in the horizontal direction at the scanning junction. Next, moving to the next scan, parts of the monitor pattern (41) are sequentially exposed.

モニタパターン(41)の下部に例えば3μmの幅のモ
ニタパターン(42a)を縦方向に配置し、このモニタ
パターン(42a)から例えば3μm離してもう1つ同
じモニタパターン(42b)を縦方向に配置する。
A monitor pattern (42a) with a width of, for example, 3 μm is arranged vertically below the monitor pattern (41), and another identical monitor pattern (42b) is arranged vertically at a distance of, for example, 3 μm from this monitor pattern (42a). do.

電子ビーム露光後に現像およびエツチングを行い、これ
らのモニタパターン(41)、(42a)および(42
b)を測定する。モニタパターン(42a)の幅aを測
定することによりパターン寸法の絶対精度が確かめられ
、フォトマスク(11の面内を測定することによりこの
面内のばらつき精度が確かめられることは従来と同様で
ある。モニタパターン(42a)および(42b)の縦
寸法と2つのモニタパターン(42a) 、(42b)
間の間隙の寸法すとを同時に測定する。これらの寸法差
から電子ビーム露光時に発生するX方向とY方向との寸
法差をモニタできる。
After electron beam exposure, development and etching are performed to form these monitor patterns (41), (42a) and (42).
b) Measure. As in the past, by measuring the width a of the monitor pattern (42a), the absolute accuracy of the pattern dimensions can be confirmed, and by measuring the inside of the photomask (11), the accuracy of variations within this plane can be checked. .Vertical dimensions of monitor patterns (42a) and (42b) and two monitor patterns (42a) and (42b)
Measure the size of the gap between the two at the same time. From these dimensional differences, the dimensional difference between the X direction and the Y direction that occurs during electron beam exposure can be monitored.

つまり、電子ビーム制御系、ステージ異常等の理由でX
方向とY方向との寸法差が生じていると、未露光部であ
る白パターンと露光部である黒パターンとの寸法差が助
長されてより顕著になるためである。
In other words, due to an abnormality in the electron beam control system or stage,
This is because if there is a dimensional difference between the direction and the Y direction, the dimensional difference between the white pattern, which is an unexposed area, and the black pattern, which is an exposed area, will be promoted and become more noticeable.

次に、モニタパターン(41)を測定することにより、
走査つなぎ部の寸法精度がモニタできる。走査つなぎ部
にモニタパターン(43)を配置し走査つなぎ部である
ことを示す。また、モニタパターン(42a)の幅aと
モニタパターン(41)の幅a゛ との寸法差によって
もX方向とY方向との寸法精度がモニタできる。
Next, by measuring the monitor pattern (41),
The dimensional accuracy of the scanning joint can be monitored. A monitor pattern (43) is placed at the scan junction to indicate that it is a scan junction. Further, the dimensional accuracy in the X direction and the Y direction can also be monitored by the dimensional difference between the width a of the monitor pattern (42a) and the width a' of the monitor pattern (41).

電子ビーム露光により生ずる寸法精度におよぼす要因に
は、以下のような種々のものが挙げられる。パターン絶
対寸法値の大小によるもの、X方向とY方向との寸法差
によるもの、走査つなぎ部によるもの、パターンのチッ
プ内におけるばらつきによるもの、白パターンと黒パタ
ーンとの差によるもの、ビーム径によるもの、スキャン
リニアリティによるもの、パターン密集度の差によるも
の、フォトマスク面自身のばらつきによるもの、近接効
果によるものなどが挙げられる。
Various factors that affect the dimensional accuracy caused by electron beam exposure include the following. Due to the size of the pattern absolute dimension value, due to the dimensional difference between the X direction and the Y direction, due to the scanning joint, due to variations within the pattern chip, due to the difference between the white pattern and the black pattern, due to the beam diameter Examples of the causes include scan linearity, differences in pattern density, variations in the photomask surface itself, and proximity effects.

これらの要因について調べると、近接効果によ〜るもの
を除いて、走査つなぎ部における寸法差、X方向とY方
向との寸法差の2つの要因が半導体チップ自身の寸法精
度に大きく影響していることが判明した。
When we investigate these factors, we find that, excluding the proximity effect, two factors, the dimensional difference at the scanning junction and the dimensional difference between the X and Y directions, have a large effect on the dimensional accuracy of the semiconductor chip itself. It turned out that there was.

もちろん、フォトマスク面内のばらつきおよび絶対精度
についても寸法精度として重要であるが、今まで比較的
容易にモニタが可能であった。
Of course, in-plane variations and absolute accuracy of a photomask are also important as dimensional accuracy, but until now they have been relatively easy to monitor.

これらの観点から、この発明においては電子ビーム露光
時に特有な走査つなぎ部め寸法精度をモニタし、かつX
方向とY方向との寸法差から生ずる白パターンと黒パタ
ーンとの寸法差をモニタするパターンを配置し、寸法精
度を確実にかつ精度よく把握でき微細パターンの高精度
形成に極めて有効であることを検証した。
From these points of view, the present invention monitors the dimensional accuracy of the scanning joint, which is unique to electron beam exposure, and
By arranging a pattern that monitors the dimensional difference between the white pattern and the black pattern caused by the dimensional difference between the direction and the Y direction, the dimensional accuracy can be grasped reliably and precisely, and it is extremely effective for high-precision formation of fine patterns. Verified.

なお、上記実施例ではフォトマスクの場合について述べ
たが、半導体ウェハ等でも同様の効果を奏する。
In the above embodiment, the case of a photomask has been described, but the same effect can be achieved with a semiconductor wafer or the like.

また、モニタパターンを半導体子ノブ内に配置したが、
第2図に示すようにを効エリア外に配置してもよい。
Also, although the monitor pattern was placed inside the semiconductor knob,
As shown in FIG. 2, it may be placed outside the effective area.

さらに、3つのモニタパターンを配置したが、配置する
モニタパターンの数は必要に応して変えてもよい。
Furthermore, although three monitor patterns are arranged, the number of monitor patterns arranged may be changed as necessary.

さらにまた、近接効果についてモニタする場合には、よ
り微細なモニタパターンを配置すればモニタ可能である
Furthermore, when monitoring the proximity effect, it is possible to monitor by arranging a finer monitor pattern.

また、寸法精度を上げるには、ビーム径、スキャンリニ
アリティ、パターン密集度の差、フォトマスク面内自身
のバラツキ等の影響を及ぼす要因に応じてモニタパター
ンを配置すればよい。
Furthermore, in order to increase the dimensional accuracy, monitor patterns may be arranged according to influencing factors such as beam diameter, scan linearity, difference in pattern density, and variations within the photomask itself.

さらに、モニタパターンを配置する場所は何処でもよ(
、走査つなぎ部においても走査つなぎ部であれば何処で
もよい。
Furthermore, you can place the monitor pattern anywhere (
, the scan junction may be any location as long as it is a scan junction.

さらにまた、縦方向の自パターンおよび黒パターンにつ
いて示したが、露光部の幅と未露光部の幅が同一の寸法
に設計されていれば、例えば第3図に示すように正方形
のパターン(51)およびこのパターン(51)を一定
の幅で幅と同し一定間隔を開けて取り囲む四角形のパタ
ーン(52)のような他のパターンであってもよい。
Furthermore, although the vertical direction self-pattern and black pattern are shown, if the width of the exposed part and the width of the unexposed part are designed to be the same dimension, for example, a square pattern (51 ) and other patterns such as a rectangular pattern (52) surrounding this pattern (51) with a constant width and a constant interval.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば電子ビーム露光時に特
有な走査つなぎ部の寸法精度をモニ多しかつX方向とY
方向との寸法差から生ずる白パターンと黒パターンとの
寸法差をモニタするパターンを配置するように構成した
ので、高精度の微細パターンの形成に有効であり、微細
パターンの高精度化に伴う高品質の半導体チップを歩留
り良く制作できる微細パターン形成方法が得られる効果
がある。
As described above, according to the present invention, it is possible to monitor the dimensional accuracy of the scanning joint part peculiar to electron beam exposure, and to
The configuration is such that a pattern is placed to monitor the dimensional difference between the white pattern and the black pattern caused by the dimensional difference in the direction, so it is effective in forming fine patterns with high precision, and it is effective in forming fine patterns with high accuracy. This has the effect of providing a fine pattern forming method that can produce high-quality semiconductor chips at a high yield.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例による微細パターン形成方
法を示す拡大図、第2図はこの発明の他の実施例による
微細パターン形成方法を示す拡大図、第3図は露光部と
未露光部とが同一寸法であるモニタパターンの他の例を
示す拡大図、第4図は従来の微細パターン形成方法を示
す拡大図である。 (11はフォトマスク、(2)は配置、(3)は半導体
チ。 プ、(41)、(42a) 、(42b) 、(43)
、(51)、(52)はモニタパターン。 なお、図中、同一符号は同一または相当部分を示す。
FIG. 1 is an enlarged view showing a fine pattern forming method according to one embodiment of the present invention, FIG. 2 is an enlarged view showing a fine pattern forming method according to another embodiment of the present invention, and FIG. 3 is an exposed area and an unexposed area. FIG. 4 is an enlarged view showing another example of a monitor pattern in which portions have the same size. FIG. 4 is an enlarged view showing a conventional fine pattern forming method. (11 is a photomask, (2) is an arrangement, (3) is a semiconductor chip, (41), (42a), (42b), (43)
, (51) and (52) are monitor patterns. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (4)

【特許請求の範囲】[Claims] (1)電子ビームを連続的に走査して基板を露光する電
子ビーム露光方法において、上記露光の寸法精度をモニ
タするパターンを各チップ毎にあるいは上記基板内の有
効エリア外に描写し配置することを特徴とする微細パタ
ーン形成方法。
(1) In an electron beam exposure method in which a substrate is exposed by continuously scanning an electron beam, a pattern for monitoring the dimensional accuracy of the exposure is drawn and arranged on each chip or outside the effective area within the substrate. A method for forming fine patterns characterized by:
(2)上記寸法精度をモニタするパターンが、上記電子
ビームの走査つなぎ部およびX方向とY方向との寸法差
をモニタできるパターンであることを特徴とする特許請
求の範囲第1項記載の微細パターン形成方法。
(2) The fine pattern according to claim 1, characterized in that the pattern for monitoring the dimensional accuracy is a pattern capable of monitoring the scan connection portion of the electron beam and the dimensional difference between the X direction and the Y direction. Pattern formation method.
(3)上記寸法精度をモニタするパターンが、上記電子
ビームの走査つなぎ部であることを示すパターンである
ことを特徴とする特許請求の範囲第2項記載の微細パタ
ーン形成方法。
(3) The method for forming a fine pattern according to claim 2, wherein the pattern for monitoring the dimensional accuracy is a pattern indicating a scanning connection portion of the electron beam.
(4)上記寸法精度をモニタするパターンが、幅と間隔
とが同一寸法の一対のパターンであることを特徴とする
特許請求の範囲第2項記載の微細パターン形成方法。
(4) The fine pattern forming method according to claim 2, wherein the pattern for monitoring the dimensional accuracy is a pair of patterns having the same width and interval.
JP60294942A 1985-12-24 1985-12-24 Fine pattern formation method Expired - Lifetime JPH0789531B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60294942A JPH0789531B2 (en) 1985-12-24 1985-12-24 Fine pattern formation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60294942A JPH0789531B2 (en) 1985-12-24 1985-12-24 Fine pattern formation method

Publications (2)

Publication Number Publication Date
JPS62150717A true JPS62150717A (en) 1987-07-04
JPH0789531B2 JPH0789531B2 (en) 1995-09-27

Family

ID=17814271

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60294942A Expired - Lifetime JPH0789531B2 (en) 1985-12-24 1985-12-24 Fine pattern formation method

Country Status (1)

Country Link
JP (1) JPH0789531B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412676A (en) * 1977-06-30 1979-01-30 Fujitsu Ltd Position matching method for electron beam exposure
JPS5498268A (en) * 1978-01-16 1979-08-03 Ibm Method of inspecting position

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412676A (en) * 1977-06-30 1979-01-30 Fujitsu Ltd Position matching method for electron beam exposure
JPS5498268A (en) * 1978-01-16 1979-08-03 Ibm Method of inspecting position

Also Published As

Publication number Publication date
JPH0789531B2 (en) 1995-09-27

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