JPS62149160A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS62149160A JPS62149160A JP28988985A JP28988985A JPS62149160A JP S62149160 A JPS62149160 A JP S62149160A JP 28988985 A JP28988985 A JP 28988985A JP 28988985 A JP28988985 A JP 28988985A JP S62149160 A JPS62149160 A JP S62149160A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- lead
- metal
- thin
- metal film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000004065 semiconductor Substances 0.000 title claims description 9
- 239000002184 metal Substances 0.000 claims abstract description 32
- 229910052751 metal Inorganic materials 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 abstract 3
- 230000008021 deposition Effects 0.000 abstract 2
- 238000007747 plating Methods 0.000 description 6
- 239000011347 resin Substances 0.000 description 5
- 229920005989 resin Polymers 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 241000251468 Actinopterygii Species 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000013013 elastic material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49582—Metallic layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置、特に樹脂成型を供う半導体装Ｉ〆
の品質を著しく高めるものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention is intended to significantly improve the quality of semiconductor devices, particularly semiconductor devices that require resin molding.
本発明はリードフレームの製造方法に関するものである
。The present invention relates to a method for manufacturing a lead frame.
金＠薄板（通常はフープ材が使われる〕からリードフレ
ームを製造する場曾、フレーム形状をスタンピング又は
エツチングで加工する事が通常行われるが、このスタン
ピング又はエツチングの刀日工前に薄板の一部分Ｋｇ二
の金属薄膜をメッキ等の方法、で形成する事を特徴とし
ている。When manufacturing a lead frame from a thin sheet of gold (usually hoop material), the frame shape is usually stamped or etched. It is characterized by forming a thin metal film using a method such as plating.
このメッキされた膜は、半導体素子とリードフレームを
接層する為のダイパッドやワイヤーボンディング用の接
着部分となる。This plated film serves as a die pad for connecting the semiconductor element and the lead frame, and an adhesive portion for wire bonding.
従来のリードフレーム製造に於いては、金属薄板にリー
ドフレーム形状をスタンピング又はエツチングで加工し
た後にリードフレームの一部分をゴム状の絶縁弾性体で
圧接し必要部分のみ第二の金属をメッキ等で被層させる
という製造方法を採用していた。In conventional lead frame manufacturing, the shape of the lead frame is stamped or etched onto a thin metal plate, then a portion of the lead frame is pressed against a rubber-like insulating elastic material, and only the necessary parts are covered with a second metal by plating, etc. A manufacturing method called layering was used.
〔発明が解決しようとする問題点及び目的〕従来の方法
でリードフレームを製造した場合、第５図■に示した通
りフレーム側面に外側へ同かつて、第二の金属１−が侵
〈被層する。[Problems and objects to be solved by the invention] When a lead frame is manufactured by the conventional method, the second metal 1- is corroded outwardly on the side surface of the frame as shown in Fig. 5 (■). do.
か＼る第二の金属１−のはみ出しは下記の様な問題点を
発生する〇
第二の金属として銀を用いた場合、樹脂成型の外側へこ
のはみ出し部分が露出する。The protrusion of the second metal 1- causes the following problems: When silver is used as the second metal, this protrusion is exposed to the outside of the resin molding.
この様な半導体ｔｉｔが、使用されるとリードの端子間
に電圧が印加される。しかも湿度の高い環境でこれらの
半２淳体装ｌＮが使用されると、露出した第二の金緘（
銀）がマイグレーション現象を起こしリード間をショー
トさせる事になる。When such a semiconductor tit is used, a voltage is applied between the terminals of the leads. Moreover, when these Han2 Jun Taisou INs are used in a humid environment, the exposed second gold strip (
Silver) will cause a migration phenomenon, causing a short between the leads.
本発明はか＼る第二の金属層が外へはみ出す事を全く無
くす＄を目的としたもので、リードの側面には第二の金
属層を被着さぜない様にしたものである。The purpose of the present invention is to completely prevent the second metal layer from protruding outside, and to prevent the second metal layer from adhering to the side surfaces of the leads.
父本発明の第二の目的は、リード加工後に部分メッキを
した場合、部分メッキで機械的に押えつける事により生
じ易いフレームの変形も起こさせない様にする事である
。A second object of the present invention is to prevent deformation of the frame, which is likely to occur when partial plating is applied after lead processing, by mechanically pressing the lead.
リードの側面に第二の金属が被着しない様にする為には
、リードの形成前の薄板状の段階で第二の金属を被層す
る事が有効である。In order to prevent the second metal from adhering to the side surfaces of the leads, it is effective to coat the leads with the second metal at the thin plate stage before forming the leads.
本発明では、薄板状の金属板に第二の金属層を部分メッ
キ等で被着せしめる。しかる後に該被着部分と位ｌ〆を
合せする形でリードフレーム刀０工をする事でリードの
側面への第二の金属層の被ａｔ防止するものである。In the present invention, a second metal layer is applied to a thin metal plate by partial plating or the like. Thereafter, the lead frame is cut in such a manner that it is aligned with the deposited portion, thereby preventing the second metal layer from being deposited on the side surfaces of the leads.
〔実施例１〕
金属薄板（材質は４２アロイ）の一部分を残して絶縁性
の弾刃物（例えばゴム）を圧接して、一部分のみ第二の
金属Ｉｎ （例えば銀ンを約５ミクロンメッキで被）ｕ
せしめ、しかる後にリードフレーム形状にパンチングし
てリードフレームを製造する。[Example 1] Leaving a part of the thin metal plate (42 alloy), an insulating bullet blade (for example, rubber) is pressed against it, and only a part is coated with a second metal In (for example, silver) with about 5 micron plating. ) u
After that, the lead frame is manufactured by punching into the shape of the lead frame.
〔実施例２〕 金属薄板の一部分を除いて樹脂を被層せしめる。[Example 2] The thin metal plate is coated with resin except for a portion.
（又は全面に感光性樹脂を被層せしめ４光及び現像によ
り一部分のみの樹脂を除去することも可能）しかる後に
金属薄板の露出部分のみ第二の金属層をメッキ又は魚屑
、等の方法で被層させ、質脂を除去した後、リードフレ
ーム形状をフォトエツチング又はパンチングで刀ロエ裂
造する。(Alternatively, it is also possible to coat the entire surface with photosensitive resin and remove only a portion of the resin using 4 lights and development.) After that, a second metal layer is applied only to the exposed areas of the thin metal plate by plating or using fish scraps, etc. After coating and removing the fat, the shape of the lead frame is formed by photo-etching or punching.
［発明の効果］
本発明の製造方法によれば第二の金属層は原理的にリー
ドフレームの側面部分にはみ出して被層（第三図の■）
する事はなくなる為、この部分がマイグレーション、外
観不良温の原因にならないこと、従って従来の様にはみ
出した金属薄膜を後工程で手直しにより除去する必要が
無くなった。[Effects of the Invention] According to the manufacturing method of the present invention, the second metal layer in principle protrudes onto the side surface of the lead frame and is coated (■ in Figure 3).
This eliminates the need to remove the protruding metal thin film in the post-process, as was the case in the past.
又、第二の金％Ｉ−を被層する工程をリードフレームの
加工以前に行う為、フレーム形状の変形が発生ぜず、安
定した品質のリードフレームが製造できろ。In addition, since the process of coating the second gold layer is performed before processing the lead frame, deformation of the frame shape does not occur and a lead frame of stable quality can be manufactured.
第１図は半導体装置に使われる一般的なリードフレーム
の部分平面図。
１は半導体素子を凄冴するダイパッド部２けリードを示
す
耶２図は本発明の製造方法により夷遺されたリードフレ
ームの一部（特てダイパッド部）の斜視；菌。
３は被着された第二の金属薄膜を示す
第３図は従来の番造方ｅにより製造されたリードフレー
ムの−８（特にダイパッド部）の斜視図。
４ははみ出した第二の金属薄膜層
以 上FIG. 1 is a partial plan view of a typical lead frame used in semiconductor devices. 1 shows a double lead at the die pad portion that makes the semiconductor device stand out; FIG. 2 is a perspective view of a part of the lead frame (particularly the die pad portion) left behind by the manufacturing method of the present invention; 3 shows the deposited second metal thin film. FIG. 3 is a perspective view of -8 (particularly the die pad portion) of a lead frame manufactured by the conventional manufacturing method e. 4 is the protruding second metal thin film layer or more
Claims (1)
体装置の製造方法に於いて、あらかじめ該第一の金属板
表面の一部分に第二の金属膜を付着させしかる後にリー
ドフレーム形状に加工する事を特徴とする半導体装置の
製造方法。In a method for manufacturing a semiconductor device in which a lead frame is manufactured from a first metal plate in the form of a plate, a second metal film is previously attached to a portion of the surface of the first metal plate and then processed into a lead frame shape. A method for manufacturing a semiconductor device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28988985A JPS62149160A (en) | 1985-12-23 | 1985-12-23 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28988985A JPS62149160A (en) | 1985-12-23 | 1985-12-23 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62149160A true JPS62149160A (en) | 1987-07-03 |
Family
ID=17749079
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28988985A Pending JPS62149160A (en) | 1985-12-23 | 1985-12-23 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62149160A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6695461B2 (en) | 2000-12-25 | 2004-02-24 | Seiko Epson Corporation | Lamp unit, projector, and fixing method of light source lamp and reflector |
-
1985
- 1985-12-23 JP JP28988985A patent/JPS62149160A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6695461B2 (en) | 2000-12-25 | 2004-02-24 | Seiko Epson Corporation | Lamp unit, projector, and fixing method of light source lamp and reflector |
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