JPS62145598A - Memory device - Google Patents

Abstract

PURPOSE:To suppress a demand in a storage element by providing a switch which operates so as to cut off a power supply to a nonvolatile memory when a wait command signal is inputted. CONSTITUTION:When a non-volatile memory 10 is not used, a wait command signal 50a becomes a high level '1', and is inputted from a controls terminal 50. A pre-circuit 34 suppresses a current supplied to the base of a transistor 33, thereby the transistor 33 being turned off. Thereby, the base current of a switching transistor 31 flowing between the collector and the emitter of the transistor 33 is cut off, and the switching transistor 31 becomes an off state, and in a switch circuit 30, the current scarcely flows through the switching transistor 31, and also through the transistor 33 for driving the switching transistor 31, and the demand can be reduced nearly to zero in a wait time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a storage device mainly consisting of a non-volatile memory used in an information processing device such as a computer.

[Conventional technology]

Information processing devices such as computers use a large number of storage elements.

If all of these storage elements are enabled during operation of the device, the power consumption becomes non-negligible. This is a big problem, especially in the case of battery-powered devices.

Therefore, some or all of the memory elements are placed in a standby state with low power consumption, as necessary.

In practice, this is implemented, for example, by lowering the control signal input to the read enable terminal of the "c" storage element that is not to be read for the time being from a high level "1" to a low level "o". .

[Problems to be solved by the invention] This method is relatively effective for so-called MOS devices, but the access time for this device is several hundred nanoseconds or more. Therefore, there is a slight drawback in terms of high speed.

On the other hand, there is also the problem that it is difficult to find a storage element with a fast access time that has a large reduction rate in power consumption in the standby state.

For example, bipolar storage elements are known as high-speed storage elements with short access times, but there are few that can reduce power consumption in standby mode, making them disadvantageous for use in battery-powered devices. ing. In addition, this type of memory element generates a lot of heat on average, and has the disadvantage that the device becomes larger due to heat dissipation, which also causes an increase in cost.

The present invention has been made with attention to the above points, and an object of the present invention is to provide a storage device that can obtain a sufficient power consumption reduction effect in a standby state.

[Means for solving problems]

A storage device of the present invention includes a nonvolatile memory, a power input terminal for supplying power to drive the nonvolatile memory, a switch circuit inserted between the power input terminal and the nonvolatile memory, and a switch circuit inserted between the power input terminal and the nonvolatile memory. It consists of a control terminal that can receive a standby command signal that controls the operation of the circuit, and when the above-mentioned standby command signal is input, the switch circuit operates to cut off the power supply to the non-volatile raw memory. It is characterized by having a switch.

Note that the switch preferably includes a PNP switching transistor, and its open collector output is preferably connected to the nonvolatile memory.

[Effect]

In this way, the storage device of the present invention uses nonvolatile memory as a storage element.

In the standby state, the power supplied to the nonvolatile i-raw memory is cut off.

For this purpose, a switch circuit is inserted between the power input terminal and the nonvolatile memory, and its on/off state is controlled by a standby command signal.

The power consumption of the switch circuit in the standby state is also important.

Therefore, in the present invention, a PNP transistor is used as the switching transistor, and its open collector output is connected to the nonvolatile memory.

〔Example〕

The figure is a wiring diagram showing an embodiment of the storage device of the present invention.

This circuit includes a non-volatile memory IJ 10 which is a combination of a plurality of memory elements 101 to ION, and this non-volatile memory 1
A power input terminal 20 connected to a power supply (not shown) that supplies power to
710, and a switch circuit 30 inserted between the switch circuit 710 and the switch circuit 30.

Each storage element 101 to IO that constitutes the nonvolatile memory 10
N connects the address input terminals AO to An to an address bus (not shown), connects the data output terminals Do to Dm to a data bus (also not shown), grounds the ground terminal G, and connects the power supply terminal Vcc to the ground terminal G. switch circuit 30
It is connected to the output terminal 40 of.

The switch circuit 30 has a power input terminal 20 and an output terminal 40.
The switching transistor 31 is inserted between the nonvolatile memory 10 and turns on and off the supply of power to the nonvolatile memory 10, and a circuit for driving the switching transistor 31.

To drive the switching transistor 31, a resistor 32, a transistor 33, and a pre-circuit 34 are provided, and the pre-circuit 34 receives a standby command from a control terminal 50 to put the nonvolatile memory 10 on standby. It is wired so that the signal 50a is input.

The front circuit 34 outputs a current sufficient to turn on the transistor 33 on the output side when the standby command signal 50a is a TTL signal with a low level "0°", and the standby command signal 50a is at a high level. 1'', the circuit suppresses the output current and is composed of an inverting amplifier or the like. For example, an integrated circuit 75451B manufactured by Texas Instruments, etc. can be used for this purpose.

A resistor 32 is inserted for adjusting the base current of the switching transistor 31. This resistance value is selected to make the voltage drop between the emitter and collector of the switching transistor 31 as low as possible.

A PNP transistor is used as the switching transistor 31, and its open collector output is connected to the nonvolatile memory 10 side.

Next, the operation of the above circuit will be explained.

First, when the nonvolatile memory 10 is in use, the standby command signal 50a is at a low level "0" and is input from the control terminal 50. As a result, current flows from the front circuit 34 to the base of the transistor 33. transistor 33
is switched on.

A current flows from the power supply input terminal 20 through the emitter-base of the switching transistor 31 and the collector-emitter of the transistor 33 through the resistor 32.

In this way, the switching transistor 31 is turned on, and power is supplied from the power input terminal 20 to the nonvolatile memory 10.

Next, if you do not want to use this nonvolatile memory 10,
The standby command signal 50a becomes high level "1" and is input from the control terminal 50.

The front circuit 34 suppresses the current supplied to the base of the transistor 33, and the transistor 33 is turned off.

As a result, the base current of the switching transistor 31 that has been flowing between the collector and emitter of the transistor 33 is cut off. Therefore, the switching transistor 31 is turned off.

In this state, almost no current flows in the switch circuit 30, neither in the switching transistor 31 nor in the driving transistor 33, and the power consumption during standby can be reduced to almost zero.

This is because a PNP transistor is used for switching, its open collector output is connected to the storage element side, and its base input is controlled by a standby command signal.

Note that even if the power supply to the memory elements is cut off in this way, there is no risk of losing the stored contents since these elements are nonvolatile.

Furthermore, such a switch circuit 30 has a fast on/off speed, and can quickly switch from a standby state to a use state or vice versa.

Furthermore, it has the advantage that the voltage drop in the on state is small.

[Modified example]

The storage device of the present invention is not limited to the above embodiments.

Pre-circuit 34 of the switch circuit and driving transistor 33
The part corresponding to can be replaced with a known TTL element or the like having an open collector output.

〔Effect of the invention〕

The storage device of the present invention described above can suppress the power consumption of a storage element in a standby state, and can achieve a great effect, especially in a device that uses a battery drive method.

[Brief explanation of drawings]

The figure is a wiring diagram showing an embodiment of the storage device of the present invention. 10...Non-volatile memory, 20...Power input terminal, 30...Switch circuit, 50... Control terminal.

Claims (1)

[Claims] 1. A nonvolatile memory, a power input terminal for supplying power to drive the nonvolatile memory, and a switch circuit inserted between the power input terminal and the nonvolatile memory;
and a control terminal that receives a standby command signal that controls the operation of the switch circuit, and the switch circuit includes a switch that operates to cut off power supply to the nonvolatile memory when the standby command signal is input. A storage device comprising: 2. The storage device according to claim 1, wherein the switch is composed of a PNP switching transistor, and an open collector output thereof is connected to the nonvolatile memory.