JPS6214541U - - Google Patents
Info
- Publication number
- JPS6214541U JPS6214541U JP10458585U JP10458585U JPS6214541U JP S6214541 U JPS6214541 U JP S6214541U JP 10458585 U JP10458585 U JP 10458585U JP 10458585 U JP10458585 U JP 10458585U JP S6214541 U JPS6214541 U JP S6214541U
- Authority
- JP
- Japan
- Prior art keywords
- data
- fifo
- memory area
- dma controller
- stored
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Bus Control (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10458585U JPS6214541U (bs) | 1985-07-09 | 1985-07-09 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10458585U JPS6214541U (bs) | 1985-07-09 | 1985-07-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6214541U true JPS6214541U (bs) | 1987-01-28 |
Family
ID=30978216
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10458585U Pending JPS6214541U (bs) | 1985-07-09 | 1985-07-09 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6214541U (bs) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100395383B1 (ko) * | 1999-12-27 | 2003-08-21 | 마쯔시다덴기산교 가부시키가이샤 | 데이터 전송 장치 |
-
1985
- 1985-07-09 JP JP10458585U patent/JPS6214541U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100395383B1 (ko) * | 1999-12-27 | 2003-08-21 | 마쯔시다덴기산교 가부시키가이샤 | 데이터 전송 장치 |
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