JPS62144336A - Die bonding device - Google Patents
Die bonding deviceInfo
- Publication number
- JPS62144336A JPS62144336A JP28636985A JP28636985A JPS62144336A JP S62144336 A JPS62144336 A JP S62144336A JP 28636985 A JP28636985 A JP 28636985A JP 28636985 A JP28636985 A JP 28636985A JP S62144336 A JPS62144336 A JP S62144336A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- adhesives
- picture
- adhesive
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
Landscapes
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は接着剤を用いた半導体ダイボンディング装置に
関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor die bonding device using an adhesive.
従来、導電性ペーストによる半導体ペレットのボンディ
ングでは、通常熱硬化性の接着剤を用いているが、ボン
ディング状態:は、熱硬化処理前のダイ剥がしチェック
、熱硬化処理後の接着力強度チェックを抜き取りで行う
ことにより確認している。Conventionally, thermosetting adhesives are usually used for bonding semiconductor pellets with conductive paste, but the bonding condition: checks for die peeling before thermosetting and adhesive strength checks after thermosetting are sampled. This is confirmed by doing this.
上述した従来の確認法では剥がしチェックにおいては、
剥がし作業を人手に頼る為、剥がす際ICダイとリード
フレームのアイランド間に横滑りが生じ易く、実際に接
着されていた接着面績を維持し難い為、良否判断の基準
として好ましくなく、接着強度チェックでは接着不良が
発見されても修正して良品とするのは接着剤が熱硬化さ
せた後の為、不可能である。With the conventional confirmation method mentioned above, when peeling and checking,
Because the peeling process relies on manual labor, side-slipping is likely to occur between the IC die and lead frame island during peeling, and it is difficult to maintain the adhesive surface that was actually bonded. Therefore, it is not recommended as a standard for determining pass/fail, and adhesive strength is not recommended. In this case, even if an adhesion defect is discovered, it is impossible to correct it and return it as a good product because the adhesive has already been cured by heat.
本発明は前記問題点を解消す乙装置を提供するものであ
る。The present invention provides a device that solves the above-mentioned problems.
本発明は接着剤を用いた半導体ダイリボンディング装置
において、透明或いは半透明な材質から成る前記ダイと
同寸法のチップを供給、位置決めする搬送部と、前記チ
ップのボンディング機構ト、前記チップのボンディング
状態を取り込み、画像処理して良否判定を行う認識シス
テム部とを有することを特徴とするダイボンディング装
置である。The present invention provides a semiconductor die bonding apparatus using an adhesive, which includes a transport unit for supplying and positioning a chip made of a transparent or semi-transparent material and having the same size as the die, a bonding mechanism for the chip, and a bonding state of the chip. This die bonding apparatus is characterized by having a recognition system section that takes in the image, processes the image, and makes a quality determination.
次に、本発明の一実施例について図面を参照して説明す
る。Next, an embodiment of the present invention will be described with reference to the drawings.
第1図は本発明の一実施例を示した斜視図である。本装
置は、第2図(b)に示すダイ3をコレット5が吸着す
る所望の位置に定める為のXYθステージ4と、第2図
(a)に示す吸着面がダイ3と同寸法で透明或いは半透
明な材質から成るチップ2をコレット5が吸着する所望
の位置に定める為のXYステージ1と、す゛−ドフレー
ム7をガイド14に沿って送り爪12で搬送を行いリー
ドフレーム7を所定位置に位置決めする搬送部15と、
リードフレーム7のアイランド8に接着剤を塗布ノズル
9により塗布する塗布部10、ボンディングされたチッ
プ2の接着剤の接着状態をITVカメラ11で取り込み
、画像処理し良否判定を行う認識システム部16から構
成される。FIG. 1 is a perspective view showing an embodiment of the present invention. This device consists of an XYθ stage 4 for positioning the die 3 shown in Fig. 2(b) at a desired position where the collet 5 adsorbs it, and an adsorption surface shown in Fig. 2(a) that is transparent and has the same dimensions as the die 3. Alternatively, an XY stage 1 is used to position the chip 2 made of a translucent material at a desired position where the collet 5 will adsorb it, and a lead frame 7 is conveyed along a guide 14 with a feed claw 12 to set the lead frame 7 in a predetermined position. a transport unit 15 that positions the position;
From a coating unit 10 that applies adhesive to the island 8 of the lead frame 7 using a coating nozzle 9, and a recognition system unit 16 that captures the adhesion state of the adhesive on the bonded chip 2 with an ITV camera 11, processes the image, and determines whether it is good or bad. configured.
第3図はコレット5によりボンディングされたチップ2
への接着剤13の接着状態をITVカメラ11で取り込
んだ画像である。第・1図は本装置で使用される認識シ
ステム部16を説明したものであり、画イ象処理回路1
7によりチップ範囲を二値化画像処理する。第5図にこ
の二値化画像Gを示す。この様にチップ2に接着剤が接
着した部位は接着剤が平坦となっている為、接着剤に含
まれている金属成分により照明光は強く反射し白情報(
第5図斜線範囲)として得られる。得られた二値化画像
を良否判定回路18に送り白情報のチップ全面積に対す
る面積比により接着状態の良否を判定し、不良と判定さ
れた場合はダイボンディング装置の制御回路19により
ただちに装置を停止させ、警報信号を出して作業者に知
らせる。Figure 3 shows chip 2 bonded by collet 5.
This is an image captured by the ITV camera 11 showing the state of adhesion of the adhesive 13 to the surface. FIG. 1 explains the recognition system section 16 used in this device, and shows the image processing circuit 1.
7, the chip range is subjected to binarized image processing. FIG. 5 shows this binarized image G. In this way, since the adhesive is flat at the part where the adhesive is attached to the chip 2, the illumination light is strongly reflected due to the metal component contained in the adhesive, and the white information (
(shaded area in Fig. 5). The obtained binarized image is sent to the pass/fail judgment circuit 18, and the adhesion condition is judged based on the area ratio of the white information to the total area of the chip.If it is judged to be defective, the control circuit 19 of the die bonding machine immediately shuts down the device. Stop the machine and issue an alarm signal to notify the operator.
上述した接着良否判別システムを使用してダイボンディ
ング作業開始時及び作業開始後一定時間間隔ごと、或い
は一定ボンデイング数ごとに接着良否判別を実施する様
なダイボンディング装置制御回路を構成すれば、装置が
自己診断機能を持つことになる。By configuring a die bonding equipment control circuit that uses the adhesion quality determination system described above to determine the quality of adhesion at the start of die bonding work, at fixed time intervals after the start of work, or for each fixed number of bondings, the equipment can be It will have a self-diagnosis function.
以上説明したように本発明は通常の半導体ダイと同寸の
透明或いは半透明なチップをボンディングすることによ
り、そのボンディング状態を装置が監視できる。骨って
、接着剤の量、粘度等質的な変化に対する接着状態変化
の確認を人手に頼ることなく品質を維持しながら生産を
行うことができる。さらに接着状態の観察がダイを剥す
ことなく行えるので実際にダイの裏面に接着剤が接着し
た面積を正確に掴むことができる効果を有するものであ
る。As explained above, in the present invention, by bonding a transparent or semi-transparent chip having the same size as a normal semiconductor die, the bonding state can be monitored by an apparatus. It is possible to produce products while maintaining quality without relying on humans to check changes in the adhesive state due to homogeneous changes in the amount and viscosity of the adhesive. Furthermore, since the adhesive state can be observed without peeling off the die, it is possible to accurately determine the area where the adhesive has actually adhered to the back surface of the die.
第1図は本発明の実施例を示す斜視図、第2図(α)は
本発明に使用するチップ、(b)は半導体ダイ、第3図
は第2図(α)をボンディングした状態を観察した平面
図、第4図は接着良否判別システム図、第5図は二値化
画像図である。
1・XYステージ 2・・チップ
3・・・半導体ダイ 4・・・XYθステージ5・
・コレット 6・・・収納マカシン7・・・リー
ドフレーム 8・・・アイランド9・・・塗布ノズル
10・塗布部11・・・ITVカメラ 1
2・・・送り爪13・・・接着剤 14・・
・ガイド15・・・搬送部 16・・・認識
システム部特許出願人 日本電気株式会社
ニー、ユ汐
15 ’lAX*システム節
第1図
(α)
(b)
第2図
第4図Figure 1 is a perspective view showing an embodiment of the present invention, Figure 2 (α) is a chip used in the present invention, (b) is a semiconductor die, and Figure 3 is a state in which Figure 2 (α) is bonded. The observed plan view, FIG. 4 is a diagram of a system for determining adhesion quality, and FIG. 5 is a binarized image diagram. 1.XY stage 2..Chip 3..Semiconductor die 4..XYθ stage 5.
・Collet 6... Storage machine 7... Lead frame 8... Island 9... Application nozzle
10・Application part 11...ITV camera 1
2...Feeding claw 13...Adhesive 14...
・Guide 15... Conveyance section 16... Recognition system department Patent applicant NEC Corporation Ni, Yushio 15 'lAX* System Section Figure 1 (α) (b) Figure 2 Figure 4
Claims (1)
おいて、透明或いは半透明な材質から成る前記ダイと同
寸法のチップを供給、位置決めする搬送部と、前記チッ
プのボンディング機構と、前記チップのボンディング状
態を取り込み、画像処理して良否判定を行う認識システ
ム部とを有することを特徴とするダイボンディング装置
。(1) A semiconductor die bonding device using an adhesive, which includes a transport unit that supplies and positions a chip made of a transparent or translucent material and having the same dimensions as the die, a bonding mechanism for the chip, and a bonding mechanism for the chip. A die bonding apparatus comprising: a recognition system section that captures a state, processes the image, and performs a pass/fail determination.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28636985A JPS62144336A (en) | 1985-12-19 | 1985-12-19 | Die bonding device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28636985A JPS62144336A (en) | 1985-12-19 | 1985-12-19 | Die bonding device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62144336A true JPS62144336A (en) | 1987-06-27 |
Family
ID=17703493
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28636985A Pending JPS62144336A (en) | 1985-12-19 | 1985-12-19 | Die bonding device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62144336A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6190801B1 (en) | 1998-03-24 | 2001-02-20 | Sanyo Electric Co., Ltd. | Sealed alkaline-zinc storage battery |
-
1985
- 1985-12-19 JP JP28636985A patent/JPS62144336A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6190801B1 (en) | 1998-03-24 | 2001-02-20 | Sanyo Electric Co., Ltd. | Sealed alkaline-zinc storage battery |
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