JPS6214140B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit for preventing a shock sound when a radio receiver is turned on.

As shown in the block diagram of FIG. 1, a radio receiver, especially a conventional AM radio receiver, is configured to tune and amplify the signal received by an antenna 1 at a high frequency amplification stage 2, and then perform a high frequency amplification at a frequency conversion stage 3.
is converted into a 455kHz intermediate frequency signal, intermediate frequency multiplication stage 4 amplifies this intermediate frequency signal, detection stage 5 performs AM detection to convert it into an audio signal, and this audio signal is sent via terminal 7 to power amplifier 8. from speaker 9
While obtaining audio, the output of the detection stage 5 is further applied to an automatic gain control circuit 6 to obtain an automatic gain voltage, and this automatic gain voltage is applied to the high frequency amplification stage 2 and the intermediate frequency amplification stage 4 to perform gain control. It's on.

In an AM receiver with such a configuration, a shock sound appears in the output of the detection stage 7 when the power is turned on, and this shock sound is amplified by the power amplification stage 8 and transmitted to the speaker 9.
It will be output as audio. The audio output of this shock sound is very difficult to hear, and when the output of the power amplification stage 8 is large, the speaker 9 may be damaged.

It is thought that such shock noise appears in the output of conventional receivers for the following reasons. First, when the power is turned on, the detection stage 5 rises rapidly to the bias point at which it operates, so the output of the output terminal 7 also rises rapidly. A shock sound is output from the speaker in proportion to the rising speed of the output from the output terminal 7. Second, if the intermediate frequency amplifier 4 and the detection stage 5 are transformer-coupled when the power is turned on, a sudden pulse is applied to the detection input from the power supply through this transformer, and a similar pulse-like shock sound is output from the speaker 9. Ru. The first and second causes are pulse-like shock sounds, but the third cause is
The cause of this is that when the power is turned on during medium to strong input electric field strength, due to the delay in the AGC smoothing circuit, the AGC does not reach the high frequency amplification stage 2 or the intermediate frequency amplification stage 3, but the saturated waveform input is sent to the detection stage 5. This was also output to the speaker 9 as an unpleasant rasping sound.

SUMMARY OF THE INVENTION An object of the present invention is to provide a receiver that prevents the occurrence of a shock sound when the power is turned on.

According to the present invention, the automatic gain control voltage rise detection means is provided, and the detection means detects the point in time when the automatic gain control voltage has sufficiently risen, and the output of the detection stage is not generated until this point. get a receiver.

Next, one embodiment of the present invention will be described in more detail with reference to the drawings.

FIG. 2 shows an embodiment of the present invention. This figure 2 shows the detection stage 5 of the receiver shown in figure 1 _, its surroundings, and the means for detecting the rise of the automatic gain control voltage. is input to the detection stage 5, and its output is taken out from the output terminal 7, and the resistor 1
It is added to a smoothing circuit consisting of capacitors 9 and 21 and capacitors 20 and 22, and an automatic gain control voltage is obtained from terminal 12. Input terminal 11 and output terminal 1 of this smoothing circuit
The collector and emitter of a transistor 18 are connected between the collector and emitter of the transistor 18, and the base thereof is connected to a constant current source 40 driven by the power supply voltage, the capacitor 17 of the series connection circuit of the switch SW ₂ and the capacitor 17, and the switch SW _2. The connection points are connected. switch
SW ₁ and SW ₂ are controlled by the output of a detection circuit 13 that detects the potential of the output terminal 12 of the smoothing circuit.

Next, the operation of this embodiment will be explained with reference to FIGS. 3 and 4. Figure 3 shows switch SW ₁ and
FIG _{. 4} shows the state of voltage fluctuation between the detection output terminal 7 and the AGC voltage terminal 12 when the power is turned on. First, when the power is turned on (t = 0 to t ₁ ), the switch SW ₁ is configured so that the input of the detection stage 5 is grounded via the terminal 14, and the output terminal 7 of the detection stage 5 is connected to the ground. does not occur. Further, the switch SW ₂ is configured such that the capacitor 17 is forcibly charged with a constant current from a constant current source 40 . At this time, the constant current from the constant current source 40 also charges the capacitors 20 and 22 of the smoothing circuit through the base-emitter junction of the transistor 18. Therefore, at this time, even if the shock noise caused by power-on appears in the output of the intermediate frequency amplification stage, it will not be generated in the output of the detection stage, and the shock noise will not be generated in the speaker.

Next, at time t= _t1 , when the potential of the output terminal 12 of the smoothing circuit exceeds a predetermined potential, the states of the switches _SW1 and _SW2 change according to the output of the detection circuit 13. Therefore, the output of the intermediate frequency stage 4 is input to the detection stage 5 from the terminal 10 through the switch _SW1 . or,
Since switch SW ₂ is open, capacitors 17 and 2
Forced charging to 0 and 22 is stopped. At this time, since the input terminal 11 and the output terminal 12 of the smoothing circuit have risen to a DC potential higher than the output DC potential during normal operation of the detection stage 5, the detection stage 5 is not performing a detection operation. Furthermore, such a time is selected as the time _t1 at which the detection circuit 13 produces an output. The voltage between the input terminal 11 and the output terminal 12 of the smoothing circuit is controlled by applying automatic gain control in the first stage to reduce the voltage between the input terminal 11 and the output terminal 12 of the smoothing circuit.
To prevent this, select a value higher than the maximum AGC voltage when a large input is applied during normal operation. At this point, the output has risen to a certain potential as shown in FIG.

Next, between time t= _t1 and _t2 , the voltage at the input terminal 11 of the smoothing circuit is higher than the DC potential of the detection stage output during normal operation of the detection stage 5, so the input terminal 11 is
The potential is determined by the capacitor 17. Now, if there is no transistor 18 and the capacitors 17 and 12 are connected, for example, with diodes, the AGC voltage is high and the input signal does not enter the detection stage 5 immediately after t= _t1 , so the detection output terminal 7 No signal appears. Next, the terminal voltage of the capacitor 17 is applied to the capacitor 22 through the diode, for example.
The output terminal 12 of the smoothing circuit, together with the detection output terminal 7, follows the discharge time constant of the capacitor 17, and the potential drops as shown in FIG. 4B. At this time, the automatic gain control (AGC) becomes closer to normal for the input. At this time, a signal begins to appear normally at input terminal 10, but the AGC
Because the voltage is not normal, due to the AGC time constant
The AGC loop oscillates and the saturated output signal is the AGC
It appears on the detection output terminal 7 due to the loop delay. In order to prevent the shock noise caused by this saturated waveform, the transistor 18 is also used.
and the output terminal 12 are connected by a transistor 18,
The delay time due to the smoothing circuit's low-pass filter characteristics is eliminated, eliminating the delay in the AGC loop.
As this saturation state gradually dissolves, a waveform begins to appear at the detection output terminal 11 as shown in FIG. The capacitor 17 continues to discharge and the (voltage at the output terminal 12) in normal operation with respect to the input
The discharge stops when the voltage reaches + (V _BE of transistor 18). This time is t= _t2 .

Therefore, at t= _t2 , the detection output terminal 7 settles to the direct current potential during normal operation and performs normal operation.

In this way, according to this embodiment, the detection output terminal 7
As shown in Fig. 4, since the DC potential is raised from 0V, there is no sudden change in the DC potential, and it is possible to prevent shock noise even when the power supply suddenly starts up. Also, when the power is turned on with a slow rise, the output appears in a similar manner. In addition, since AGC is applied when the power is turned on, the shock noise caused by the saturated waveform disappears, and the output gradually appears, which improves the audibility.
The sound emitted when the radio wave is turned on is extremely pleasant.

FIG. 5 shows an example of a circuit embodying the embodiment shown in FIG. Here, the detector performs emitter follower detection of a signal input from an input terminal 37 using a transistor 35, and outputs a detected output to an output terminal 36. The detection circuit 13 is composed of transistors 23, 24, 38, etc., and includes a transistor 28 and a resistor 41.
constitutes switch SW ₂ , and transistors 31, 3
2, 34 etc. constitute switch SW ₁ .

Next, the operation will be explained. t=0 in Figures 3 and 4
~ _t1 , the base terminal 25 of the transistor 24 of the differential amplifier is maintained at the reference potential. At this time, since the output terminal 26 of the smoothing circuit composed of resistors 50, 52 and capacitors 51, 53 is 0V, the transistor 24 of the differential amplifier is conductive, and the transistor 23 is cut off. Due to the voltage drop across the collector resistor 27 of the transistor 24, the transistor 2
8 conducts and charges the capacitor 29. At this time, since there is no voltage drop across the collector resistor 30 of the transistor 23, the transistor 31 is turned off, and the transistor 32 is also turned off. Therefore, a base current is applied by the resistor 33 and the transistor 34 becomes conductive, and when it is saturated, the detection transistor 3
5 is cut off, and the signal including the shock sound is sent to the ground, and the output terminal 36 is connected to the detection input terminal 3.
The signal including the shock sound coming from 7 is not output. This operation occurs at the same time as the power is turned on, so there is no shock sound. transistor 28
The capacitor 29 is charged and the transistor 3
7 through output terminal 36 and AGC voltage terminal 26
The potential increases.

Next, in FIGS. 3 and 4, at t= _t1 , the output terminal 26 of the smoothing circuit rises, and the transistors 23 and 2
This is the moment when the differential amplifier consisting of 4 is inverted. At this time, the transistor 23 is turned on, the transistor 24 is turned off, the transistor 31 is turned on, the transistor 32 is turned on, and the transistor 34 is turned off. Also, the transistor 38 becomes conductive, and the transistor 2 passes through the diode 39.
Current continues to flow into the base of transistor 2.
Leave 3 conductive. Therefore, the base of the detection stage returns to its original bias. In addition, the voltage drop across the collector resistor 27 is eliminated, and the transistor 2
8 becomes cut off and stops charging the capacitor 29.

Next, when t= _t1 to _t2 in FIGS. 3 and 4, the above-described operation is performed. After t= _t2 , normal operation occurs and the detection circuit 13 and switch
SW ₁ and SW ₂ are not operating for the detection stage 5 and automatic gain control circuit 6.

Although one embodiment of the present invention has been described above, for example, the switch SW ₁ may be used to stop the power supply to the detection stage 5 to put the detection stage 5 in an inoperable state, or to be provided at the output of the detection stage 5. A similar effect can be obtained.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a normal AM receiver, Figure 2
The figure shows an embodiment of the present invention, FIG. 3 is a diagram explaining the operation of switches SW ₁ and SW ₂ , and FIGS. 4A and B
5 is a diagram showing the time dependence of the output voltage of the wave detector and the AGC voltage, and FIG. 5 is a circuit diagram embodying an embodiment of the present invention. 1...Antenna, 2...High frequency amplification stage, 3...
Frequency conversion stage, 4... Intermediate frequency amplification stage, 5... Detection stage, 6... Automatic gain control circuit, 7... Terminal, 8
...Power amplifier, 9...Speaker, 10...Terminal,
14... terminal, 13, 16... switch, 40...
... Constant current source, 17 ... Capacitor, 11 ... Input terminal, 12 ... Output terminal, 18 ... Transistor, 19, 21 ... Resistor, 20, 22 ... Capacitor, 23, 24, 28, 31, 32 ,34,3
5, 38, 58...transistor, 37...input terminal, 36...detection output, 50,52...resistance,
51, 53... Capacitor, 54... Constant current source,
55... Power supply, 39, 43, 44, 45, 46...
...Diode, 30, 33, 41, 42, 48...
...Resistor, 49,29...Capacitor.

Claims (1)

[Claims] 1 means for detecting a received signal; means for generating an automatic gain control voltage from the output of the detection means; a detection means for generating a detection output when the automatic gain control voltage is at a predetermined potential or higher; means for prohibiting the output from the detection means when there is no detection output; means for charging the capacitor when there is no detection output from the detection means; and DC connection between the input and output terminals of the means for generating the automatic gain control voltage. control means for controlling even the charging voltage of the automatic gain control voltage, and inhibiting the output from the detection means and charging the capacitor until the output of the means for generating the automatic gain control voltage reaches the predetermined potential after power is turned on, and then charging the capacitor. A receiver characterized in that input and output terminals of the means for generating the automatic gain control voltage are connected in a DC manner until the automatic gain control voltage becomes a steady voltage.