JPH0352685B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic gain adjustment circuit, and particularly to improvement of its tracking characteristics.

FIG. 1 shows a general automatic gain adjustment circuit. That is, the AM (amplitude modulation) high frequency signal received by the antenna 2 is applied as an input signal to the mixer circuit 4, mixed with the local oscillation frequency, changed to an intermediate frequency, and then amplified by the intermediate frequency amplifier 6. .

The frequency of this intermediate frequency amplifier 6 is detected by an AM detector 8 and taken out as a low frequency output from an output terminal 10.
is added to form an automatic gain control voltage (AGC voltage).

This automatic gain control output is applied to a filter capacitor 16 connected to the terminal 14, and the AGC voltage generated at the capacitor 16 is applied to the mixer circuit 4 and intermediate frequency amplifier 6 as its gain control input.

As a result, the gains of mixer circuit 4 and intermediate frequency amplifier 6 are adjusted according to the received signal level, and the signal level is adjusted in response to fluctuations in the received signal level, making it possible to obtain audio output at a constant level.

In such an automatic gain adjustment circuit, the filter capacitor 16 is connected to the automatic gain adjustment amplifier 12.
It is repeatedly charged and discharged in relation to the output of the terminal, and an AGC voltage corresponding to the received signal level is formed between its terminals.

The filter time constant is related to the distortion of the signal waveform, and if the capacitance of the capacitor 16 is increased in order to reduce the distortion, the filter time constant becomes large and the charging/discharging speed is restricted.
In addition, if the charging and discharging speed of the capacitor 16 is slow, when the tune is detuned from the strong input band to the weak input band, or from the weak input band to the strong input band, the response becomes difficult instantaneously, resulting in cracking of the sound and noise. This causes inconveniences such as delays in occurrence.

Therefore, the present invention extracts a constant current output according to the level detection output, and uses the constant current output to charge and discharge the filter capacitor from which the AGC voltage voltage for adjusting the amplification gain of the amplification means is to be input. An object of the present invention is to provide an automatic gain adjustment circuit that realizes automatic gain adjustment with good signal followability.

That is, the automatic gain adjustment circuit of the present invention uses the level detection means (AM detector 8) to detect the signal level of the output signal of the amplification means (mixer circuit 4 or intermediate frequency amplifier 6) that amplifies the input signal (received high frequency signal). In the automatic gain adjustment circuit that detects the level and adjusts the amplification gain of the amplifying means according to the level detection output, the first and second emitters are connected in common.
These first transistors 22 and 24
A constant current source 26 for supplying an operating current to the second transistor is installed on the emitter side of the first and second transistors, and receives the level detection output at the base of the first transistor. A differential amplifier receives a constant DC voltage at the base of the transistor, and the first or second transistor is conductive depending on the magnitude relationship between the DC voltage and the level detection voltage; When the first transistor is placed on the collector side of the transistor and becomes conductive,
a first current mirror circuit (diode 28 and transistor 30) that extracts the current flowing through the first transistor;
A second current mirror circuit (which includes a diode 32 and a transistor 3
4) and a first voltage source (resistor 38 and diode 40) which is supplied with the output current of the first current mirror circuit and generates a voltage according to the output current.
and a second current mirror circuit which is supplied with the output current of the second current mirror circuit and generates a voltage according to the output current.
a voltage source (resistor 44 and diode 46),
A voltage generated in the first voltage source is applied to the base, and a base current is supplied through the first current mirror circuit to conduct the output terminal 1.
a third transistor 3 which flows current through 4;
6, the voltage generated in the second voltage source is applied to the base, and the collector side is connected to the power supply, and the base current is supplied through the second current mirror circuit, making it conductive and passing the current through the output terminal. The fourth transistor 42 is connected to the output terminal and is charged by the current output from the third transistor, and is discharged by the current drawn into the fourth transistor, and the charging/discharging process is performed. The present invention is characterized by comprising a capacitor (filter capacitor 16) that generates a gain control voltage to be applied to the amplification means.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings.

FIG. 2 shows an embodiment of the automatic gain adjustment circuit of the present invention, and the same parts as those of the automatic gain adjustment circuit of FIG. 1 are given the same reference numerals.

The automatic gain adjustment amplifier 12 is composed of a current output type amplifier, and the front stage thereof includes first and second transistors 22 and 24 having a common emitter.
and a constant current source 26. That is, the transistors 22 and 24 constitute a differential amplifier and are installed as an output current conversion circuit that converts an amplitude detection (AM) output into a current.

An AM detection output as a level detection output obtained by an AM detector 8 as a level detection means is applied to the base of the transistor 22, and a bias voltage V _B as a reference voltage is applied to the base of the transistor 24. has been added, and AM
A current corresponding to the detection output flows through each transistor 22,
24 selectively.

A diode 28, a transistor 30, and a diode 3 are connected to the collector sides of the transistors 22 and 24 in order to take out the current flowing through each of them individually.
A current mirror circuit as an active load consisting of a transistor 2 and a transistor 34 is provided. That is, the diode 28 and the transistor 30 constitute a first current mirror circuit, the diode 32 and the transistor 34 constitute a second current mirror circuit, and the current flowing through the transistor 22 is reversed and flows through the transistor 30, and the The current flowing through transistor 24 is reversed and flows through transistor 34 .

Further, on the collector side of the transistor 30, a third transistor 36, a resistor 38, and a diode 40 are installed. That is, the transistor 36 constitutes an emitter follower circuit, and the resistor 3
8 and the diode 40 are installed as a first voltage source that generates a voltage by receiving current from the transistor 30, and constitute a bias voltage source for the transistor 36, and constitute a current mirror circuit together with the transistor 36. ing.

An output terminal 14 is formed on the emitter side of the transistor 36, and the transistor 30 forms a constant current source for charging via the transistor 36 for the capacitor 16 connected to the output terminal 14.

Further, on the collector side of the transistor 34, a fourth transistor 42, a resistor 44, and a diode 46 are installed. That is, the transistor 42 also constitutes an emitter follower circuit for the capacitor 16, and the resistor 44 and diode 46
is installed as a second voltage source that receives current from the transistor 34 and generates a voltage,
It constitutes a bias voltage source for the transistor 42, and together with the transistor 34 constitutes a current mirror circuit.

A drive power supply (not shown) is connected between the power supply terminal 48 and the ground point, and V _CC is the applied voltage.

The operation will be explained based on the above configuration.

If the AM detection output voltage is higher than the voltage V _B ,
Transistor 22 becomes conductive, and the current flowing through transistor 22 is reversed by diode 28 and transistor 30 and flows from transistor 36 to capacitor 16 as a charging current, and capacitor 16 is rapidly charged by the constant current.

On the other hand, when the AM detection output voltage is lower than the voltage V _B , the transistor 24 becomes conductive instead of the transistor 22, and the current flowing through the transistor 24 is reversed via the diode 32 and the transistor 34, and the The current flows into the transistor 42, and the transistor 42 becomes saturated with this current. That is, the transistor 42 is given a current sinking ability by the applied current, and causes the capacitor 16 to be discharged. Therefore, capacitor 16 is rapidly discharged.

Due to this rapid charging and discharging, the capacitor 16 is charged with a predetermined AGC that follows the AM detection output.
A voltage is formed and this AGC voltage is applied as an AGC input to the intermediate frequency amplifier 6 and mixer circuit 4.

Further, a diode 40 is installed on the base side of the transistor 36, and a diode 40 is installed on the base side of the transistor 36.
On the other hand, since the diode 46 is installed on the base side, the temperature characteristics between the elements are canceled out, charge and discharge characteristics independent of temperature are obtained, and stable and highly reliable AGC operation is obtained.

As explained above, according to the present invention, the third transistor that causes charging current to flow into the capacitor constitutes an emitter follower circuit, and the fourth transistor that draws discharge current from the capacitor performs constant current operation. The capacitor can be rapidly charged through the third transistor, and the capacitor can be slowly discharged through the fourth transistor to generate an AGC voltage in the capacitor, and this AGC voltage can be used to adjust the amplification gain of the amplification means. , it is possible to realize automatic gain adjustment with low distortion and good followability.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a general automatic gain adjustment circuit, and FIG. 2 is a circuit diagram showing an embodiment of the automatic gain adjustment circuit of the present invention. 4...Mixer circuit (amplification means), 6...Intermediate frequency amplifier (amplification means), 8...AM detector (level detection means), 12...Automatic gain adjustment amplifier, 1
4... Output terminal, 16... Filter capacitor,
22... First transistor, 24... Second transistor, 26... Constant current source, 28... Diode (first current mirror circuit), 30... Transistor (first current mirror circuit), 32 ... Diode (second current mirror circuit), 34 ... Transistor (second current mirror circuit), 36 ... Third transistor, 38 ... Resistor (first voltage source), 40 ... Diode ( first voltage source), 42
...Fourth transistor, 44...Resistor (second voltage source), 46...Diode (second voltage source).

Claims (1)

[Scope of Claims] 1. An automatic gain adjustment circuit that detects the signal level of an output signal of an amplification means for amplifying an input signal using a level detection means, and adjusts the amplification gain of the amplification means according to the level detection output, A constant current source is installed on the emitter side of the first and second transistors, and the emitters of the first and second transistors are connected together. The base of the first transistor receives the level detection output, and the base of the second transistor receives a constant DC voltage. a differential amplifier in which a transistor is conductive; and a first current installed on the collector side of the first transistor of the differential amplifier to extract a current flowing through the first transistor when the first transistor is conductive. a mirror circuit; a second current mirror circuit installed on the collector side of the second transistor of the differential amplifier and extracts a current flowing through the second transistor when the second transistor is conductive; a first voltage source to which the output current of the first current mirror circuit is supplied and generates a voltage according to the output current; and a first voltage source to which the output current of the second current mirror circuit is supplied and generates a voltage according to the output current. a second voltage source that generates a voltage, and the voltage generated in the first voltage source is applied to the base, and a base current is supplied through the first current mirror circuit to conduct the current, and conducts the current through the output terminal. The voltage generated in the second voltage source is applied to the base of the third transistor, and the collector side is connected to the power supply, and the base current is supplied through the second current mirror circuit to conduct the third transistor. a fourth transistor that draws current through an output terminal; and a fourth transistor that is connected to the output terminal and is charged by the current output from the third transistor and discharged by the current drawn into the fourth transistor. , and a capacitor that generates a gain control voltage to be applied to the amplification means by charging and discharging the capacitor.