JPS62140154A - Data holding system for memory device - Google Patents

Abstract

PURPOSE:To greatly shorten the saving and recovering time of data by using plural pairs of nonvolatile memory elements and transfer circuits to perform the parallel processing of data on the divided memory areas of a volatile semiconductor memory. CONSTITUTION:The memory area of a volatile semiconductor memory 4 of a semiconductor memory device 2 is divided into two areas A and B. The semiconductor memory/inter-disk transfer circuits 72 corresponding to both areas A and B are controlled by a microprocessor 3. The memory data in the areas A and B are stored in the corresponding compact magnetic disk devices 61 and 62 or taken out of these devices 61 and 62 in parallel with the transfer of those data to the area A and B respectively. As a result of said parallel processing, the saving/recovering time of data is shortened greatly and has no change despite the increase of the memory capacity by increasing the number of transmission lines and compact disk devices.

Description

[Detailed Description of the Invention] (Field of Application of the Invention) The present invention relates to a data retention method of a storage device, and particularly to a semiconductor storage device equipped with a backup device, in which data evacuation/recovery time and device reliability are problems. The present invention relates to a data retention method of a semiconductor memory device suitable for the case where the following is the case.

[Background of the invention]

When a volatile semiconductor storage device consisting of a semiconductor memory element etc. is used as an external storage device of an electronic computer system,
When the power supplied to the computer system is cut off, the data stored in the semiconductor memory becomes volatile. Therefore,
Conventional 1 For example, as described in Japanese Unexamined Patent Application Publication No. 59-82700, a single non-volatile storage medium is built into a semiconductor memory device, and data in the semiconductor memory is saved/backed up when the '11 power is turned off/on. Recovery is underway. However, in such conventional devices, due to the recent increase in the capacity of semiconductor memory devices and the reduction in prices, the capacity of non-volatile media to increase this capacity is insufficient, and the data Increased evacuation/recovery time became a problem.

[Purpose of the invention]

The purpose of the present invention is to improve such conventional problems, to shorten the time for saving and restoring data between the semiconductor memory and the non-volatile storage medium in semiconductor memory equipped with a backup device, and to improve the reliability of the device. It is an object of the present invention to provide a data retention method for a semiconductor memory device suitable for improving the performance of data.

[Summary of the invention]

In order to achieve the above objects, the present invention provides a volatile semiconductor memory device, a nonvolatile storage medium for making data stored in the memory device non-volatile, and a transfer circuit for transferring data between the first two tones. and a microprocessor for controlling the data transfer, the storage area of the volatile semiconductor memory is divided into N parts, and the non-volatile storage medium and the transfer circuit are provided in N parts. , is characterized in that it is transferred and restored in parallel by the microprocessor.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of a semiconductor memory device showing one embodiment of the present invention.

In the figure, 1 is a host device of the semiconductor storage device, 2 is a semiconductor storage device, 3 is a microprocessor that controls the semiconductor storage device 2, 4 is a semiconductor memory, 5 is a data transfer circuit with the host device 1, 61.62 71 and 72 are data transfer circuits between the semiconductor memory 4 and the disk drives 61 and 62, respectively.

First, when the semiconductor storage device 2 is powered on, the processor 3 instructs the data transfer circuits 71 and 72 to transfer data from the disks 61 and 62 to areas A and B of the semiconductor memory 4. Data transfer circuit 7 that received this instruction
1.72 independently transfers data on the disks 61 and 62 to areas A and B of the semiconductor memory 4 (hereinafter this operation is referred to as loading). When this loading is completed, the data transfer circuits 71 and 72 report the loading completion to the processor 3. Upon receiving the load completion report, the processor 3 makes the semiconductor storage device 2 usable by the host device 1.

When the use by the host device 1 is finished and an instruction is given to turn off the power, the processor 3 transfers the data in areas A and B of the semiconductor memory 4 to the data transfer circuit 71.72 to the disk 61.6.
Instruct to transfer to 2. The data transfer circuits 71 and 72 that have received this instruction perform data transfer in the same manner as at the time of loading (hereinafter, this operation is referred to as unloading). Upon completion of this unloading, the processor 3 turns off the power to the semiconductor storage device 2.

FIG. 2 is a configuration diagram when the capacity of the semiconductor memory 4 of FIG. 1 is doubled.

As the capacity of the semiconductor memory 4 is doubled, data transfer circuits 73, 74 and disks 63, 64 are added.

Under this configuration, the processor 3 includes a data transfer circuit 71
, 72, 73, and 74, and the data control circuits each operate independently and in parallel.

Therefore, even though the capacity has been doubled, the time required for loading/unloading is the same as in the case of FIG.

FIG. 3 shows a spare data transfer circuit 75 in the embodiment of FIG.
FIG. 2 is a configuration diagram of a semiconductor storage device to which a spare disk 65 is added.

This embodiment deals with the occurrence of a failure during unloading. That is, when a failure occurs in the data transfer circuit 72 or the disk 62 during unloading, and it becomes impossible to save the semiconductor memory 4.

The processor 3 detects the failure and transfers the backup data transfer circuit 7.
5 to transfer the data of area B to the disk 62 to the spare disk 65.

Upon receiving a report of the completion of transfer from the data transfer circuit 75, the processor 3 sends replacement information to the disk 62 indicating that the disk 65 is used as a replacement disk for the disk 62.
After writing to the specific area 8 of No. 5, the power to the semiconductor memory device 2 is turned off.

When the power is turned on, the processor 3 refers to the replacement information 8 written on the disk 65 and loads data corresponding to area B of the semiconductor memory 4 from the disk 65.
The data transfer circuit 75 is instructed.

In this manner, if a failure occurs during unloading, it is possible to automatically switch to the standby system and execute unloading according to instructions from the processor 3, thereby realizing a highly reliable semiconductor memory device.

〔Effect of the invention〕

As described above, according to the present invention, data transfer between a semiconductor memory and a plurality of nonvolatile storage media can be performed in parallel, so data saving/recovery time can be significantly shortened, and semiconductor memory Even if the capacity increases, the data evacuation/recovery time does not increase.

Furthermore, by providing a spare non-volatile storage medium and adopting a method of automatically switching over when a failure occurs, the reliability of the device can be improved.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a semiconductor memory device showing an embodiment of the present invention, FIG. 2 is a configuration diagram when the capacity of the semiconductor memory 4 in FIG. 1 is doubled, and FIG. 1 is a configuration diagram of a semiconductor storage device incorporating a storage medium; FIG. host device, 2: semiconductor storage device, 3: microprocessor, 4: semiconductor memory, 5: data transfer circuit between semiconductor memory/host device, 61, 62° 63.64: small magnetic disk device, 65 = small magnetic disk device, 71,7
2, 73, 74: semiconductor memory/disk data transfer circuit, 8: replacement information. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] (1) a volatile semiconductor memory element and a nonvolatile storage medium for making data stored in the memory element nonvolatile;
A semiconductor memory device comprising a transfer circuit that transfers data between the two, wherein the nonvolatile storage medium and the transfer circuit are each provided in a plurality, and the storage area of the volatile semiconductor memory is divided into a plurality of pieces. . A data retention system for a storage device, characterized in that each piece of information in the divided storage area is saved and restored in parallel by the plurality of transfer circuits.