JPS62137042A - Ultrasonic diagnostic apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an ultrasonic diagnostic apparatus that uses ultrasonic waves to obtain tomographic images of diagnostic parts of a subject, and in particular to finely changing the sampling period of image data. The present invention relates to an ultrasonic diagnostic device that can perform

Conventional technology Conventional ultrasound diagnostic equipment consists of a probe that transmits and receives ultrasound pulses, an ultrasound transmitter and receiver that outputs echo signals by scanning with the probe, and a system that digitizes the echo signals and stores them in an image memory. It includes a digital scan converter that writes and reads the data, and a display device that inputs the output signal from the digital scan converter and displays a tomographic image. Then, in order to reconstruct the image data obtained by sector scanning or convex scanning with the probe and displaying it on a television monitor as a display device,
The image data must be sampled by converting a data array expressed in a polar coordinate system based on a scanning angle and a scanning radius into a television scanning system that is an orthogonal coordinate system. Here, conventionally, the image memory of the digital scan converter is assigned addresses so as to correspond one-to-one with the screen of the television monitor, and has a wide flat surface area that corresponds one-to-one with the screen of the television monitor. was needed.

In response to this, in order to reduce the image memory in the digital scan converter, image data has been sampled in synchronization with the timing of television scanning in the orthogonal coordinate system.

In this case, in addition to the frequency and magnification of the ultrasound waves, the sampling period of the image data must be changed according to the scanning angle of the ultrasound waves. The sampling clock generation circuit that changes the sampling period has a complex combination of circuit elements such as flip-flops and multiplexers, as well as a counter and control memory.The basic pulse is used as the counter clock, and the output value of the counter is was controlled by control memory to generate the required sampling clock.

Problems to be Solved by the Invention However, in the sampling clock generation circuit in such an ultrasonic diagnostic apparatus, the sampling clock that can be generated for the basic pulse of period T shown in FIG. 4(a) is as follows. (b).

As shown in (c), all of the pulses had periods IT, 2T, 3T, . . . which were integral multiples of the basic pulse. Since the sampling period can only be changed at a period that is an integral multiple of the basic pulse, the sampling point of the image data and the display point by TV scanning do not necessarily match at all positions, and at a certain scanning angle. There were times when the timing of the TV scan was off. Therefore, an error occurs in the sampling of image data, making it impossible to obtain highly accurate image data, and the tomographic image displayed on a television monitor cannot be said to be good.

Therefore, an object of the present invention is to solve such problems.

Means for Solving the Problems The means of the present invention for solving the above problems is to transmit and receive ultrasonic pulses from a probe, input received signals from scanning of the probe, and transmit and receive ultrasonic waves. The echo signal is output at the section, the echo signal is digitized by the digital scan converter, the data is written to the image memory and read out, and the read out image data is D/A converted and displayed on the display device as a tomographic image. In ultrasound diagnostic equipment,
The sampling clock generation circuit that generates the sampling clock when writing image data to the image memory in the digital scan converter includes a delay circuit that generates a plurality of clock pulses delayed by a predetermined time with respect to the basic pulse, and this delay circuit. a selection circuit that selects and combines clock pulses from the above to change the cycle of the clock pulses; a control circuit that sends and controls the selection and combination signals to the selection circuit; and a control memory. This is achieved by comprising a frequency dividing circuit that divides the period of the clock pulse obtained by the selection circuit according to a control signal from the selection circuit.

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing an embodiment of an ultrasonic diagnostic apparatus according to the present invention. This ultrasound diagnostic device uses ultrasound to obtain tomographic images of the diagnostic area of the subject.
probe], an ultrasonic transceiver section 2, a digital scan converter (hereinafter abbreviated as "rDSC") 3, and a display device 4.

The probe 1 transmits and receives ultrasonic pulses by performing sector scanning or convex scanning, and although not shown, it includes a transducer that is a source of ultrasonic pulses and receives reflected waves. Built-in. The ultrasonic transmitter/receiver 2 controls the transmission and reception of ultrasonic pulses by the probe 1, inputs a received signal S1 resulting from scanning, and outputs an echo signal S2. It has a generator, a receiving amplifier, and their control circuits.

Further, the DSC 3 inputs and digitizes the echo signal S2 from the ultrasound transmitting/receiving section 2, and writes and reads the data of the ultrasound tomographic image into an internal storage section, and is connected to the central processing unit (CPU) 5. and the above echo signal S
2, and a sampling clock generation circuit 7 that generates a sampling clock at a timing corresponding to the scanning angle and depth (scanning radius) of the probe 1 based on the control signal S3 from the CPU 5. , a memory write address counter 8 that inputs the sampling clock CLK generated by the sampling clock generation circuit 7 to correct the address, and a memory read address that inputs the television synchronization signal S4 from the CPU 5 to designate the address. The image data is written by the address designation from the counter 9 and the memory write address counter 8, and the image data is read from the image memory 10 by the address designation from the memory read address counter 9. An interpolation forming circuit 11 that reconstructs a tomographic image according to the scanning method of the probe 1 by embedding blank areas occurring between scanning lines of ultrasound beams in image data, and this interpolation forming circuit 1
1, and a D/A converter 12 that converts output data from 1 into an analog signal.

In addition, the display device 4 receives the output signal S from the DSC 3 described in 1.
5 is input to display an ultrasonic tomographic image, for example, on a television monitor.

Here, in the present invention, the sampling clock generation circuit 7 that generates the sampling clocks CI and K when writing image data to the image memory 10 in the DSCa includes a delay circuit 13, a selection circuit 14, and a control memory. 15 and a frequency dividing circuit 16. The delay circuit] 3 receives the basic pulse Ps from the CPU 5, generates n clock pulses Pc delayed by a predetermined time Δt with respect to the basic pulse Ps, and
c is output in parallel. The selection circuit 14 is
n clock pulses Pc output from the delay circuit 13
are input in parallel, and by appropriately selecting and combining the above clock pulses Pc with the selection control signal S6 output from the control memory 15, the clock pulses Pc
This changes the period of . The above control memory 15
, which sends a selection control signal S6 to the selection circuit 14 and a frequency division control signal S7 to the frequency division circuit 16, is composed of, for example, a ROM (read-only memory), and the data stored in this ROM is The selection and combination of the clock pulses Pc is controlled according to the ultrasonic frequency, magnification, scanning angle, etc., and the division of the period of the obtained tarok pulse is controlled. The frequency divider circuit 16 divides the period of the clock pulse obtained by the selection circuit 14 using the frequency division control signal S7 from the control memory 15 to generate sampling clocks CLK of various desired periods. be.

Next, the operation of the ultrasonic diagnostic apparatus of the present invention configured as described above will be explained with reference to FIGS. 2 and 3. First, in FIG. 1, ultrasonic pulses are transmitted and received from a probe 1 to a diagnostic site of a subject.

Then, the received signal S1 resulting from the scanning of the probe 1 is input, and the echo signal S2 is output from the ultrasonic transmitting/receiving section 2 to the DSC 3. The DSC 3 inputs the echo signal S2, converts it into a digital signal with an A/D converter 6, and writes this data into the image memory 10.

A sampling clock for writing the image data into the image memory 10 is generated by the sampling clock generation circuit 7. That is, the basic pulse Ps of period T output from the CPU 5 (see FIG. 2(a)) is
The signal is input to the delay circuit 13 of the sampling clock generation circuit 7. Then, this delay circuit 13 generates n clock pulses Pc delayed by a predetermined time Δt with respect to the basic pulse Ps. For example, as shown in FIG. 2(b), a first delayed clock pulse Pc with a period T that rises with a delay of time Δt from the rise of the basic pulse Ps
m, a second delayed clock pulse Pc2 with a period T that rises with a delay of time 2Δt from the rise of the basic pulse Ps, as shown in FIG. And these delayed clock pulses P C1, HP Q21・
... are input to the selection circuit 14 in parallel. This selection circuit 1
4, the selection control signal S6 is inputted from the control memory 15.

Here, the two-part control memory 15 determines which of the n delayed clock pulses output in parallel from the delay circuit 13, depending on the ultrasonic frequency, magnification, scanning angle, etc. stored therein. It is determined whether to select and combine them and outputs the selection control signal S6. Now, as shown in FIG. 2, the contents of the selection control signal S6 are a first delayed clock pulse Pc1 delayed by a time Δt from the basic pulse Ps, and a second delayed clock pulse delayed by a time 2Δt from the basic pulse Ps. If the pulses Pc2 and Pc2 are selected and combined in this order, the selection circuit 14 outputs a combined lock pulse P as shown in FIG. 2(d). That is, first, the first delayed clock pulse Pc is started up, and in the middle of that, it is switched to and combined with the second delayed clock pulse Pc2, which is delayed by Δt from the above Pc1.
As shown in FIG. 2(d), the period is (T) from the rising edge of the first delayed clock pulse Pc1 to the rising edge of the second pulse of the second delayed clock pulse Pc2.
+Δt). Therefore, in this case, the selection circuit 1
4, the period of the clock pulse is changed to (T+Δt). Further, as shown in FIG. 3, the selection control signal S6 includes a second delayed clock pulse PC2 delayed by a time 2Δt from the basic pulse Ps, and a first delayed clock pulse PC2 delayed by a time Δt from the basic pulse Ps. If we select and combine them in this order, the two-part selection circuit 14
Then, a composite lock pulse P as shown in FIG. 3(d) is generated.
' is output. That is, first, it is started with the second delayed clock pulse PC2, and on the way, Δ is increased from the above Pc2.
Since the first delayed clock pulse Pc is switched to and combined with the first delayed clock pulse Pc, which is advanced by t, the period is from the rising edge of the second clock pulse Pc to the first delayed clock pulse Pcm, as shown in FIG. 3(d). (T-Δt) up to the rise of the second pulse. Therefore, in this case, the selection circuit 14 selects the period of the clock pulse (
T-8t). In this way, the above selection,
By appropriately changing the clock pulses Pc to be combined, clock pulses with various periods can be obtained. The synthesized lock pulses p and p' obtained in this way are applied to the frequency dividing circuit 1.
Enter into 6. This frequency dividing circuit 16 includes a control memory 1
A frequency division control signal S7 is input from 5, and according to this frequency division control signal S7, for example, 1/m (m=1°2.3.
...). As a result, the time accuracy is m×Δt
Sampling clocks CLK of various periods are generated and outputted from the sampling clock generation circuit 7.

Next, the sampling clock CLK output from the sampling clock generation circuit 7 is input to the memory write address counter 8, and its address is corrected.

Then, by address designation from the memory write address counter 8, the image data output from the A/D converter 6 is written into the image memory 10. Next, the image data thus written is sequentially read out from the image memory 10 by address designation of the memory read address counter 9 whose address is generated under the control of the television synchronization signal S4 from the CPU 5. This read image data is
The input signal is input to the interpolation forming circuit 11, and this circuit fills in the blank space that occurs between the scanning lines of the ultrasound beam, and the probe 1
A tomographic image is reconstructed according to the scanning method. Then, the output data from the interpolation forming circuit 11 is D/A
The signal is converted into an analog signal by the converter 1-2, and is input to the display device 4 and displayed as a tomographic image.

Effects of the Invention As described in the following, the present invention combines the sampling clock generation circuit 7 that generates the sampling clock when writing image data into the image memory 10 in the DSC 3 with the delay circuit 1; 3 and the selection circuit 14. , control memory 15,
Since the clock pulses Pc outputted from the two-part delay circuit 13 and delayed by a predetermined time (△t) are appropriately selected and combined in the selection circuit J4, various types of clock pulses can be generated. period sampling clock C
You can make LK. Here, "two-part delay circuit 13
The delay time Δt is sufficiently small compared to the period T of the basic pulse Ps, so the frequency dividing circuit 16 provides a time accuracy of
Sampling clocks CLK having various cycles with fine precision (m=1.2, 3, . . . ) are output.

Therefore, in the conventional device, the sampling period could only be changed with periods IT, 2T, 3T, etc., which are integral multiples of the basic pulse, whereas in the present invention, image data can be changed with a fine precision of m×△. The sampling period can be changed. From this, it is possible to match the sampling point of image data with the display point by television scanning in most positions, and it is possible to reduce errors in sampling image data due to complex sector scanning or convex scanning. can. Therefore, highly accurate image data is obtained, and a good tomographic image is displayed on the display device 4.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the ultrasonic diagnostic apparatus according to the present invention, FIGS. 2 and 3 are timing diagrams showing sampling clock generation in the sampling clock generation circuit, and FIG. 4 is a conventional sampling clock. FIG. 3 is a timing diagram showing the generation of a sampling clock in a generation circuit. ■...Probe 2...Ultrasonic transmitter/receiver 3...Digital scan converter 4...Display device 7...Sampling clock generation circuit 10...Image memory 12...D/Δ conversion Device 13... Delay circuit 14... Selection circuit 15... Control memory 16... Frequency divider circuit Ps... Basic pulse

Claims (1)

[Claims] The ultrasonic pulse is transmitted and received from the probe, the received signal from the scanning of this probe is input, the ultrasonic transmitter and receiver outputs an echo signal, and this echo signal is digitized by a digital scan converter and stored in the image memory. In an ultrasonic diagnostic apparatus that writes and reads the data, converts the read image data from analog to analog, and displays it on a display device as a tomographic image, a sampling clock is used when writing the image data to the image memory in the digital scan converter. The sampling clock generation circuit that generates the clock pulse includes a delay circuit that generates a plurality of clock pulses delayed by a predetermined time with respect to the basic pulse, and selects and combines clock pulses from this delay circuit to change the period of the clock pulse. A selection circuit, a control memory that sends and controls the selection and combination signals to the selection circuit, and a control signal from the control memory that divides the period of the clock pulse obtained by the selection circuit. An ultrasonic diagnostic device characterized by comprising a frequency dividing circuit.