JPS62133733A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To obtain a density and large scale semiconductor integrated circuit device having a groove-isolated structure by a method wherein two or more kinds of different dielectric materials are filled up in the groove located on the surface of a semiconductor substrate. CONSTITUTION:A groove 4 having a prescribed pattern is provided on the surface of a semiconductor substrate 1. The groove 4 is filled up with two or more kinds of different dielectric materials such as a first dielectric 5 and a silicon dioxide film 6 having a melting property, for example. As a result, a high density and large scale semiconductor integrated circuit device having groove-isolated structure can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and particularly to an isolation structure between elements of a semiconductor integrated circuit device.

(] Conventional technology'') In the S (metal-oxide-semiconductor) type semiconductor integrated circuit device, four parts are formed in the element isolation region on the surface of the semiconductor substrate as an element separation method, instead of the conventional selective oxidation method. A so-called trench isolation method, in which the inside of the recess is filled with a silicon film or an insulating film, is being considered.

('Problem to be solved by the invention 1) In the trench separation method described above, it is important to completely bury the formed groove and to ensure surface flatness after burying. Conventionally, chemical vapor deposition (r' v r) was used to deposit a silicon film or S, 0□ film, etc. to fill the lecture hall. In general, element isolation regions formed in semiconductor integrated circuit devices are simply It is difficult to form the groove using only one width.For this reason, when using the above materials, the shape after embedding is determined by the wide part and narrow part of the groove, as shown in No. 3N. However, in order to obtain surface flatness, it is necessary to add a complicated process such as masking the wide groove portion 4aJ2 with a photoresist film or the like.As a method to improve this point, As a material to fill the groove, phosphorus glass (FI S G) film, poron phosphorus glass (
It is conceivable to use a meltable insulating film such as a B P S G ) film. However, in this case, there was a possibility that impurities contained in the meltable insulating film buried in the trench could become a source of contamination during the heat process after forming the isolation structure, causing deterioration of device characteristics. .

An object of the present invention is to prevent impurity contamination from a meltable insulating film buried in the trench in a trench isolation method for semiconductor integrated circuit devices having shapes with different trench widths without adding a special foliar roughening step. It is an object of the present invention to provide a high-density, large-scale semiconductor integrated circuit device having a groove isolation structure with no trench isolation structure.

1) Means for Solving the Problems 1) The semiconductor integrated circuit device of the present invention has a predetermined turn groove on the surface of a semiconductor substrate, and two or more different dielectrics are injected into the groove. It has a groove isolation structure that is filled with body material.

Note that as the dielectric material to be filled in the trench, a first dielectric material having meltability is first buried in the trench, the first dielectric material is left only in the trench below the surface of the semiconductor substrate, and then a second dielectric material is buried in the trench.
A preferable structure can be obtained by embedding a silicon dioxide film as a dielectric material.

1 Example 1 Next, an example of the present invention will be described with reference to the drawings. FIGS. 2(a) to 2(g) are cross-sectional views of a semiconductor integrated circuit element shown in order of steps to explain a manufacturing method according to an embodiment of the present invention.

First, as shown in FIG. 2(a), a silicon substrate 1 is thermally oxidized to form a 5102 film 2 on the surface of the substrate, and then a film 1 to a resist layer 1 to 3 is formed by normal lithography.
pattern.

Next, as shown in FIG. 2(1), the 5102 film 2 is removed by ordinary reactive ion etching (R, T E ) using the resist pattern 3 as a mask. Next, after removing the photoresist film, a trench 11 is formed on the surface of the silicon substrate using the S,02 film 2 as a mask.

Next, as shown in FIG. 2(c), after removing the Slf)2 film 2 used as a mask, thermal oxidation is performed again.
After forming the 5IO2 film 2 on the substrate surface and the substrate surface, the groove 1 is
A meltable insulating film 5 is deposited on the inside of the substrate 1 and on the surface of the substrate by the CVD method, and heat treatment is performed to melt the insulating film 5 so that the surface of the substrate becomes substantially flat.

Next, as shown in FIG. 2(d), the insulating film 5 is selectively etched and removed so that the surface of the insulating film 5 is lower than the surface of the silicon substrate and remains in the groove. The difference between the surface of the silicon substrate and the buried insulating film must be large enough to prevent contamination by impurities from clumping the meltable insulating film 5 with the second dielectric that will be deposited later.

Next, as shown in FIG. 2 ((t), C, V
The SIO□ film 6 is deposited by method D. When scolded = 5
- Since most of the layers having different widths are buried in the fusible insulating film 5, the surface of the S,0□ film is approximately flat.

Next, as shown in 21'll (f), the normal R
By IE etc., the c V l) s, n21 pattern 6 was exposed on the silicon substrate surface, and (' V D 5
Remove the I02 film so that it remains.

Next, as shown in FIG. 2 (g>), a gate electrode 7, a diffusion layer 8, etc. are formed in a normal process, and finally a semiconductor integrated circuit device as shown in FIG. 1 is formed. [Effects of the Invention, 1] As explained above, the present invention has the following advantages in the miniaturization of element isolation regions required in semiconductor integrated circuit devices:
Even when the groove has a shape with a different width, it is possible to fill the inside of the groove with two or more different dielectric materials. A groove isolation structure without impurity contamination of the meltable insulating film buried in the groove can be obtained, and a high-density, large-scale semiconductor integrated circuit device can be provided.

1 A Brief explanation of one song No. 11 A A 1 is a cross-sectional view of an embodiment of the present invention, and FIGS. In order to
The figure is a cross-sectional view of an example of a 7M separation lateral force east of b°C.

Toshiri: 1 piece board, 2...-acid 1 arsenic 1 model, 3...
・) 41~tosyst, /1.4a, 41-+ ・Separation groove, 5... Melted f1'' insulating film, 6・(: VI)S
, +12 film, 7... polycrystalline silicon film, 8... diffusion layer,
0...Interlayer film, 10.Ae.

Attorney: 1 patent attorney, Oto Hara Erase f diagram Figure 3 Yu2 Ward

Claims (2)

[Claims] (1) A semiconductor integrated circuit device having a predetermined pattern of grooves on the surface of a semiconductor substrate, the grooves being filled with two or more different dielectric materials. (2) As a dielectric material to be filled in the groove, a first dielectric having meltability is first buried in the groove, and then a silicon dioxide film is buried as a second dielectric. ) The semiconductor integrated circuit device described in item 2.