JPS6213070U - - Google Patents
Info
- Publication number
- JPS6213070U JPS6213070U JP10574986U JP10574986U JPS6213070U JP S6213070 U JPS6213070 U JP S6213070U JP 10574986 U JP10574986 U JP 10574986U JP 10574986 U JP10574986 U JP 10574986U JP S6213070 U JPS6213070 U JP S6213070U
- Authority
- JP
- Japan
- Prior art keywords
- data
- character
- circuit
- input
- generation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 230000005055 memory storage Effects 0.000 claims 3
- 238000001514 detection method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Description
図は本考案による実施例のブロツク図である。
図中、１は直並列変換回路、２は比較回路、３
はゲート回路、４は文字発生回路、５はメモリ制
御回路、６は画メモリである。
The figure is a block diagram of an embodiment according to the present invention. In the figure, 1 is a serial/parallel conversion circuit, 2 is a comparison circuit, and 3
4 is a gate circuit, 4 is a character generation circuit, 5 is a memory control circuit, and 6 is an image memory.
Claims (1)
列データに変換する直並列変換回路と、上記受領
したデータから所定の制御文字を検出するための
比較回路と、該比較回路からの出力信号により上
記受領データの転送先を制御するゲート回路と、
上記受領データに対応するドツトデータを発生す
る文字発生回路と、ドツトデータを記憶する画メ
モリと、上記ゲート回路の出力および上記文字発
生回路の出力に接続されドツトデータの形式で入
力されるデータにおいて、上記画メモリへの格納
を制御するメモリ格納制御回路とを有し、上記比
較回路により他装置から入力されたデータの中か
ら上記所定の制御文字を検出したとき、当該制御
文字に続くデータをドツトデータとみなし、上記
文字発生回路を経由せず直接上記メモリ格納制御
回路を介して上記画メモリへ格納し、一方、上記
比較回路により制御文字検出動作の結果、キヤラ
クタデータとみなされる入力データについては上
記文字発生回路によりドツトデータに変換した上
で上記メモリ格納制御回路を介して、上記画メモ
リへ格納するよう構成したことを特徴とするフア
クシミリ通信装置。 A serial-to-parallel conversion circuit converts data input serially from another device into parallel data, a comparison circuit detects a predetermined control character from the received data, and an output signal from the comparison circuit converts the received data into parallel data. A gate circuit that controls the data transfer destination,
A character generation circuit that generates dot data corresponding to the received data, an image memory that stores the dot data, and a character generation circuit that is connected to the output of the gate circuit and the output of the character generation circuit, and is connected to the input data in the form of dot data. and a memory storage control circuit that controls storage in the image memory, and when the comparison circuit detects the predetermined control character from among data input from another device, the data following the control character is Input data that is regarded as dot data and stored directly in the image memory via the memory storage control circuit without going through the character generation circuit, and on the other hand, input data that is regarded as character data as a result of the control character detection operation by the comparison circuit. A facsimile communication device characterized in that the character data is converted into dot data by the character generation circuit and then stored in the image memory via the memory storage control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10574986U JPS6213070U (en) | 1986-07-10 | 1986-07-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10574986U JPS6213070U (en) | 1986-07-10 | 1986-07-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6213070U true JPS6213070U (en) | 1987-01-26 |
Family
ID=30980468
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10574986U Pending JPS6213070U (en) | 1986-07-10 | 1986-07-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6213070U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51107709A (en) * | 1975-03-18 | 1976-09-24 | Nippon Telegraph & Telephone | |
| JPS53139433A (en) * | 1977-05-11 | 1978-12-05 | Sharp Corp | Display unit |
-
1986
- 1986-07-10 JP JP10574986U patent/JPS6213070U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51107709A (en) * | 1975-03-18 | 1976-09-24 | Nippon Telegraph & Telephone | |
| JPS53139433A (en) * | 1977-05-11 | 1978-12-05 | Sharp Corp | Display unit |
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