JPS6213020Y2 - - Google Patents

Info

Publication number
JPS6213020Y2
JPS6213020Y2 JP11386279U JP11386279U JPS6213020Y2 JP S6213020 Y2 JPS6213020 Y2 JP S6213020Y2 JP 11386279 U JP11386279 U JP 11386279U JP 11386279 U JP11386279 U JP 11386279U JP S6213020 Y2 JPS6213020 Y2 JP S6213020Y2
Authority
JP
Japan
Prior art keywords
voltage
resistor
comparator
power
compared
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11386279U
Other languages
Japanese (ja)
Other versions
JPS5631365U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11386279U priority Critical patent/JPS6213020Y2/ja
Publication of JPS5631365U publication Critical patent/JPS5631365U/ja
Application granted granted Critical
Publication of JPS6213020Y2 publication Critical patent/JPS6213020Y2/ja
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 本考案は、電子機器の電圧比較回路に関するも
のである。
[Detailed Description of the Invention] The present invention relates to a voltage comparison circuit for electronic equipment.

従来、電圧比較回路として第1図に示すものが
使われてきた。第1図の電源投入時の波形が第2
図であるが、電源投入時、被比較電圧V2が不安
定なレベルになる時点でV2<VREFとなり、電圧
比較器3の出力が反転してしまうことがあつた。
Conventionally, the voltage comparison circuit shown in FIG. 1 has been used. The waveform at power-on in Figure 1 is the second waveform.
As shown in the figure, when the power is turned on, when the voltage to be compared V 2 reaches an unstable level, V 2 <V REF , and the output of the voltage comparator 3 is sometimes inverted.

本考案の目的は、上記した欠点をなくし、電源
投入時に基準電圧をある時間抑えることで、被比
較電圧が不安定な時期に電圧比較器の出力が反転
することがないようにすることである。
The purpose of this invention is to eliminate the above-mentioned drawbacks and to suppress the reference voltage for a certain period of time when the power is turned on, thereby preventing the output of the voltage comparator from inverting when the voltage to be compared is unstable. .

電源投入時、定電圧素子を利用し基準電圧VRE
を一定時間抑え、比較される電圧が安定してか
ら基準電圧VREFを立ち上げ、電圧比較器の反転
を防止する。
When the power is turned on, the reference voltage V RE is set using a constant voltage element.
F is suppressed for a certain period of time and the reference voltage V REF is raised after the voltage to be compared is stabilized to prevent the voltage comparator from inverting.

本考案の一実施例を第3図に、またその各電圧
の電源投入時の波形を第4図に示す。基準電圧V
REFは、V1電源が定電圧素子4の電圧Vzに達する
まで抑えられ、V1>Vzとなると立ち上りはじめ
る。そのため、V2電圧のレベルが不安定な時期
がすぎてからVREFを立ち上げることができるた
め電圧比較器3の出力が反転することを防ぐこと
ができる。
An embodiment of the present invention is shown in FIG. 3, and the waveforms of the respective voltages when the power is turned on are shown in FIG. Reference voltage V
REF is suppressed until the V 1 power supply reaches the voltage Vz of the constant voltage element 4, and starts rising when V 1 >Vz. Therefore, V REF can be raised after the period when the level of the V 2 voltage is unstable has passed, so that the output of the voltage comparator 3 can be prevented from being inverted.

本考案によれば、電圧比較回路の基準電圧の立
ち上りを電源投入後の一定時間抑えることができ
るので、比較される電圧が電源投入時不安定にな
つても、電圧比較の出力が反転することがなくな
る。
According to the present invention, the rise of the reference voltage of the voltage comparator circuit can be suppressed for a certain period of time after the power is turned on, so even if the voltage to be compared becomes unstable when the power is turned on, the output of the voltage comparison circuit will not be reversed. disappears.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電圧比較回路を示す回路図、第
2図は第1図における電源投入時の各電圧の立ち
上りを示す波形図、第3図は本考案の一実施例を
示す回路図、第4図はその各電圧の立ち上りを示
す波形図である。 図において、1,2は分圧抵抗、3は比較器、
4は定電圧素子、5は電流制限用抵抗である。
FIG. 1 is a circuit diagram showing a conventional voltage comparison circuit, FIG. 2 is a waveform diagram showing the rise of each voltage when the power is turned on in FIG. 1, and FIG. 3 is a circuit diagram showing an embodiment of the present invention. FIG. 4 is a waveform diagram showing the rise of each voltage. In the figure, 1 and 2 are voltage dividing resistors, 3 is a comparator,
4 is a constant voltage element, and 5 is a current limiting resistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基準電源V1から定電圧素子と抵抗を直列に接
続して抵抗の他端を接地し、該定電圧素子と抵抗
の接続点の電圧を基準とし、その基準電圧と被比
較電源V2の電圧とを電圧比較器により比較する
回路において、被比較電圧があるレベルに達する
まで基準電圧を抑えておくことを特徴とする電圧
比較回路。
A constant voltage element and a resistor are connected in series from the reference power supply V1 , the other end of the resistor is grounded, and the voltage at the connection point of the constant voltage element and the resistor is used as the reference voltage and the voltage of the compared power supply V2 . What is claimed is: 1. A voltage comparator circuit that compares a reference voltage with a voltage comparator using a voltage comparator, and is characterized in that a reference voltage is suppressed until a voltage to be compared reaches a certain level.
JP11386279U 1979-08-18 1979-08-18 Expired JPS6213020Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11386279U JPS6213020Y2 (en) 1979-08-18 1979-08-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11386279U JPS6213020Y2 (en) 1979-08-18 1979-08-18

Publications (2)

Publication Number Publication Date
JPS5631365U JPS5631365U (en) 1981-03-26
JPS6213020Y2 true JPS6213020Y2 (en) 1987-04-03

Family

ID=29346134

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11386279U Expired JPS6213020Y2 (en) 1979-08-18 1979-08-18

Country Status (1)

Country Link
JP (1) JPS6213020Y2 (en)

Also Published As

Publication number Publication date
JPS5631365U (en) 1981-03-26

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