JPS62129648U - - Google Patents

Info

Publication number
JPS62129648U
JPS62129648U JP1501886U JP1501886U JPS62129648U JP S62129648 U JPS62129648 U JP S62129648U JP 1501886 U JP1501886 U JP 1501886U JP 1501886 U JP1501886 U JP 1501886U JP S62129648 U JPS62129648 U JP S62129648U
Authority
JP
Japan
Prior art keywords
processor
counter
signal
analog
converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1501886U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1501886U priority Critical patent/JPS62129648U/ja
Publication of JPS62129648U publication Critical patent/JPS62129648U/ja
Pending legal-status Critical Current

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  • Multi Processors (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案装置の一実施例のブロツク図、
第2図は従来装置のブロツク図である。 A/D……アナログ・デイジタル変換器、CO
U……カウンタ、CPU……メインプロセツサ、
CPUa……第2のプロセツサ。
FIG. 1 is a block diagram of an embodiment of the device of the present invention.
FIG. 2 is a block diagram of a conventional device. A/D...Analog-digital converter, CO
U...Counter, CPU...Main processor,
CPUa...second processor.

Claims (1)

【実用新案登録請求の範囲】 入力信号をアナログ・デイジタル変換器により
デイジタル信号に変換しそのデイジタル信号をカ
ウンタにより計数した後、プロセツサに加えて信
号処理をするようにした装置において、 前記アナログ・デイジタル変換器におけるオー
ト・キヤリブレーシヨンを含む変換動作の制御を
前記カウンタの出力を通じて行う第2のプロセツ
サを設け、この第2のプロセツサを前記アナログ
・デイジタル変換器及びカウンタと共に1チツプ
化してなる信号処理装置。
[Scope of Claim for Utility Model Registration] In a device that converts an input signal into a digital signal by an analog-to-digital converter, counts the digital signal by a counter, and then processes the signal in addition to a processor, A second processor is provided for controlling conversion operations including auto-calibration in the converter through the output of the counter, and the second processor is integrated into one chip together with the analog-to-digital converter and the counter. Device.
JP1501886U 1986-02-04 1986-02-04 Pending JPS62129648U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1501886U JPS62129648U (en) 1986-02-04 1986-02-04

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1501886U JPS62129648U (en) 1986-02-04 1986-02-04

Publications (1)

Publication Number Publication Date
JPS62129648U true JPS62129648U (en) 1987-08-17

Family

ID=30805555

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1501886U Pending JPS62129648U (en) 1986-02-04 1986-02-04

Country Status (1)

Country Link
JP (1) JPS62129648U (en)

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