JPS6212855B2 - - Google Patents

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Publication number
JPS6212855B2
JPS6212855B2 JP13841778A JP13841778A JPS6212855B2 JP S6212855 B2 JPS6212855 B2 JP S6212855B2 JP 13841778 A JP13841778 A JP 13841778A JP 13841778 A JP13841778 A JP 13841778A JP S6212855 B2 JPS6212855 B2 JP S6212855B2
Authority
JP
Japan
Prior art keywords
oxide film
distribution
light
insulator
trap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13841778A
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Japanese (ja)
Other versions
JPS5565144A (en
Inventor
Koichiro Ootori
Taiji Oku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP13841778A priority Critical patent/JPS5565144A/en
Publication of JPS5565144A publication Critical patent/JPS5565144A/en
Publication of JPS6212855B2 publication Critical patent/JPS6212855B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 この発明は、金属−酸化膜−シリコン
(MOS)構造におけるシリコン酸化膜に代表され
るごとき導体電極と半導体にはさまれた絶縁体中
の電荷捕獲中心(以下トラツプと称する)の分布
測定方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to charge trapping centers (hereinafter referred to as traps) in an insulator sandwiched between a conductive electrode and a semiconductor, such as a silicon oxide film in a metal-oxide-silicon (MOS) structure. The present invention relates to a method for measuring the distribution of

集積回路の高密度化がLSIから超LSIへと進展
するにつれ、それに使用されるMOSトランジス
タのチヤネル長も短縮されつつあるが、それに伴
いソース・ドレイン電界が強くなるためにチヤネ
ル中の電荷担体が高エネルギーを得て衝突電離の
確率が増大する。この衝突電離により増殖した電
荷担体がチヤネル表面近傍のシリコン酸化膜中に
注入されトラツプに捕獲されると、固定電荷とし
てMOSトランジスタのしきい値電圧の変動をき
たし、MOS・LSIおよび超LSIの不安定性の原因
となる。このため、シリコン酸化膜中における前
記トラツプの分布その他の諸特性を知ることが工
業上重要な測定、評価方法となつている。
As the density of integrated circuits progresses from LSI to VLSI, the channel length of the MOS transistors used in them is also becoming shorter, but as the source-drain electric field becomes stronger, charge carriers in the channel are Obtaining high energy increases the probability of impact ionization. When the charge carriers multiplied by this impact ionization are injected into the silicon oxide film near the channel surface and captured in a trap, they act as fixed charges and cause fluctuations in the threshold voltage of MOS transistors, making MOS/LSI and VLSI unstable. Causes qualitative problems. Therefore, knowing the distribution and other characteristics of the traps in the silicon oxide film has become an industrially important measurement and evaluation method.

シリコン酸化膜中のトラツプの密度分布を非破
壊的に測定する方法として従来提案されているの
は分布の重心xを求める方法で、デイー・ジエ
ー・デイマリヤ(D.J.DiMaria)の「ジヤーナ
ル・オブ・アプライド・フイジクス」(Journal
of Applied Physics)誌47巻9号(1976年9
月)、4073ページから4077ページに所載の論文に
よつて既知である。
The conventionally proposed method for nondestructively measuring the trap density distribution in a silicon oxide film is to find the center of gravity x of the distribution, as described in DJ DiMaria's ``Journal of Applied Physics” (Journal
of Applied Physics), Vol. 47, No. 9 (September 1976)
It is known from the paper published on pages 4073 to 4077.

ここに重心xは、第1図のごとくシリコン酸化
膜の表面に原点をとり表面に垂直な方向に酸化
膜・シリコン界面に向つてx座標をとつた場合、 x=∫ xNt(x)dx/∫ Nt(x)dx………(1) によつて表わされる。Nt(x)はトラツプの体
積密度分布、Lは酸化膜の厚さであり、第(1)式の
分母∫ Nt(x)dxはトラツプの面密度Qtであつ
て、上記の論文に記述された光電流−電圧法によ
りxと共に求められる量である。しかしながら、
トラツプ分布Nt(x)の様子を知るには、xを
求めるだけでは不十分である。すなわち、この方
法のみではトラツプが酸化膜の厚み方向にどの位
の範囲に拡がつているかを知ることができない。
厚み方向のトラツプ分布を測定する方法として従
来提案されているのは、酸化膜を少しずつエツチ
ングで取除きながら膜中の電荷量を測定する方法
であるが、これは破壊検査であるうえ、時間がか
かり、試料の汚染等をもたらす危険も大きい。
Here, the center of gravity x is as shown in Figure 1, when the origin is set at the surface of the silicon oxide film and the x coordinate is taken in the direction perpendicular to the surface toward the oxide film/silicon interface, x = ∫ L O xNt (x) It is expressed as dx/∫ L O Nt(x)dx (1). Nt(x) is the trap volume density distribution, L is the thickness of the oxide film, and the denominator of equation (1) ∫ L O Nt(x)dx is the trap areal density Qt. This is the quantity determined together with x by the photocurrent-voltage method described. however,
In order to know the state of the trap distribution Nt(x), it is not enough to simply find x. In other words, with this method alone, it is not possible to know how far the trap has spread in the thickness direction of the oxide film.
The conventionally proposed method for measuring the trap distribution in the thickness direction is to remove the oxide film little by little by etching and measure the amount of charge in the film, but this is a destructive test and is time consuming. There is also a great risk of sample contamination.

これに対しこの発明は、トラツプ分布の拡がり
に関する知見を非破壊的手段によつて得るために
下記第(2)式 σ=〔∫ (x−x)2Nt(x)dx/Qt〕〓
………(2) で表わされるトラツプ分布の標準偏差σを求める
ものである。第(2)式は、 σ=∫ x2Nt(x)dx/Qt−(x)
………(3) と書き換えられるので、上記論文の方法によりx
とQtが既知であれば、積分∫ x2Nt(x)dxを知
ることによつてσが求められる。ここで、上記第
(3)式の成立根拠について説明する。
On the other hand, the present invention uses the following equation (2) σ=[∫ L O (x-x) 2 Nt(x)dx/Qt] in order to obtain knowledge regarding the spread of the trap distribution by non-destructive means. 〓
This is to find the standard deviation σ of the trap distribution expressed by (2). Equation (2) is σ 2 =∫ L O x 2 Nt(x)dx/Qt−(x) 2
......(3), so using the method in the above paper, x
If and Qt are known, σ can be found by knowing the integral ∫ L O x 2 Nt(x)dx. Here, the above
The basis for the establishment of equation (3) will be explained.

シリコン酸化膜中のトラツプの体積密度分布
Nt(x)の重心xは、前記したように第(1)式で
表わすことができるが、これをシリコン酸化膜の
膜面の単位面積当りの面(積)密度Qtで表わす
と、 Qt=∫ Nt(x)dx ………(1a) である。また、重心は、 x=∫ xNt(x)dx/Qt ………(1b) とも表わすことができる。
Volume density distribution of traps in silicon oxide film
The center of gravity x of Nt(x) can be expressed by equation (1) as described above, but if this is expressed as the area (area) density Qt per unit area of the film surface of the silicon oxide film, Qt= ∫ L O Nt(x)dx ......(1a). Moreover, the center of gravity can also be expressed as x=∫ L O xNt (x) dx/Qt (1b).

ところで、Nt(x)が変数xによる分布関数
である場合、統計学的な定義により、分散σ
(σは標準偏差)は、 σ=∫ (x−x)2Nt(x)dx /∫ Nt(x)dx =∫ (x−x)2Nt(x)dx/Qt
………(1c) この第(1c)式は第(2)式と同等である。第
(1c)式から次のようにして第(3)式が誘導さ
れる。
By the way, when Nt(x) is a distribution function based on variable x, by statistical definition, the variance σ 2
(σ is the standard deviation) is σ 2 =∫ L O (x-x) 2 Nt(x)dx /∫ L O Nt(x)dx =∫ L O (x-x) 2 Nt(x)dx/ Qt
......(1c) This equation (1c) is equivalent to equation (2). Equation (3) is derived from Equation (1c) as follows.

σ=∫ (x−x)2Nt(x)dx/Qt =∫ x2Nt(x)dx/Qt −∫ 2x・xNt(x)dx/Qt +∫ (x)2Nt(x)dx/Qt =∫ (x)2Nt(x)dx/Qt −2x∫ xNt(x)dx/Qt +(x) Nt(x)dx/Qt =∫ x2Nt(x)dx/Qt−2xx +(x) Nt(x)dx/Qt =∫ x2Nt(x)dx/Qt−2xx+(x) =∫ x2Nt(x)dx/Qt−(x) 以下、第2図に従つてこの発明の実施例を説明
する。
σ 2 =∫ L O (x-x) 2 Nt(x)dx/Qt =∫ L O x 2 Nt(x)dx/Qt −∫ L O 2x・xNt(x)dx/Qt +∫ L O ( x) 2 Nt(x)dx/Qt =∫ L O (x) 2 Nt(x)dx/Qt −2x∫ L O xNt(x)dx/Qt +(x) 2L O Nt(x)dx /Qt =∫ L O x 2 Nt (x) dx / Qt - 2xx + (x) 2L O Nt (x) dx / Qt = ∫ L O x 2 Nt (x) dx / Qt - 2xx + (x) 2 =∫ L O x 2 Nt(x) dx/Qt-(x) 2 Hereinafter, embodiments of the present invention will be described with reference to FIG.

測定試料はシリコン基板1の表面に酸化膜2を
成長させたもので、さらに酸化膜2の表面にゲー
ト電極3が設けられている。後述する理由によ
り、ゲート電極3は導電性の反射防止膜3aと導
電体3bとから成つており、シリコン基板1のゲ
ート電極3に対向する部分は光が容易に透過でき
るように薄くしてある。4は定電流パルス電源、
5は容量−電圧特性測定装置、6は直流電源、7
は照射光、8は切換スイツチである。以下、酸化
膜2中のトラツプが電子トラツプである場合を例
にとつて測定の手順を説明する。
The measurement sample has an oxide film 2 grown on the surface of a silicon substrate 1, and a gate electrode 3 is further provided on the surface of the oxide film 2. For reasons to be described later, the gate electrode 3 is composed of a conductive antireflection film 3a and a conductor 3b, and the portion of the silicon substrate 1 facing the gate electrode 3 is made thin so that light can easily pass through. . 4 is a constant current pulse power supply,
5 is a capacitance-voltage characteristic measuring device, 6 is a DC power supply, 7 is
8 is the irradiation light, and 8 is the changeover switch. The measurement procedure will be described below, taking as an example the case where the traps in the oxide film 2 are electron traps.

まず、初期の状態において、ゲート電極3、酸
化膜2、シリコン基板1より成るMOSダイオー
ドのフラツトバンド電圧を容量−電圧特性測定装
置5を用いて測定し、これを(VFBとする。
次に、酸化膜2中のトラツプに一様に電子を捕獲
させる。その方法は定電流パルス電源4によるな
だれ注入を用いてもよく、あるいは光もしくは電
離放射線の照射による内部光電子放出効果による
注入を用いてもよい。この操作によりすべてのト
ラツプに電子が捕獲されたとすると、操作後に再
びフラツトバンド電圧を測定したとき、その値
(VFBは(VFBを基準点として測ると、 (VFB=q/Co∫ xNt(x)dx ………(4) なる式によつて表わされる値をとる。ここにCo
は酸化膜2の単位面積あたりの容量、qは電子電
荷である。次いで、シリコン基板1を通して酸化
膜2に照射光7を照射する。この照射光7は、ト
ラツプから電子を放出させるのに十分な光子エネ
ルギーを持ち、かつ、酸化膜2中でのその吸収係
数をαとするとき、αL≪1の条件を満足するよ
うな波長のものを選ぶ。具体的には酸化膜2のバ
ンド・ギヤツプよりわずかに小さい光子エネルギ
ーの光が適当で、例えば、光子エネルギー8.3eV
(波長1500Å)の場合α=103cm-1であるから、L
=0.1μmとすると、αL=10-2であり、上記の
条件を満足する。なお、この波長の光に対するシ
リコンの吸収係数は6.9×105cm-1であるから、シ
リコン基板1のゲート直下の部分の厚さを500Å
とすれば、入射光の3%がシリコン基板1を通過
できる。この照射の間、酸化膜2中での光の強度
分布I(x)は、 I(x)=I0e-(L-x) ………(5) と表わされるが、αx≪1であるからこれは近似
的に、 I(x)≒I0e-L(1+αx) ………(6) と表わされ、第1図の一点鎖線で示されるとおり
になる。ここにI0は酸化膜2に入射する際の光強
度である。この光によつてトラツプから電子が放
出され、この割合は光の強度に比例する。また、
シリコン酸化膜においては1個のトラツプが1個
の電子を捕獲することが確かめられているので、
電子を放出したトラツプの分布はβI(x)Nt
(x)と表わされる。ここにβは単位強度の光に
よつて放出される電子数である。従つて、光照射
後に容量−電圧特性測定装置5によつて測定され
るフラツトバンド電圧(VFBは、 (VFB =q/Co∫ x{Nt(x)−βI(x)Nt(x
)} dx …(7) の形になるので、照射前後のフラツトバンド電圧
の変化分をΔVFBとすると、第(4),(6),(7)式によ
りΔVFBは、 ΔVFB=βI0e-L〔(VFB +αq/Co∫ x2Nt(x)dx〕 …(8) と表わされる。I0,αは光の強度測定によつて求
められ、またβは光強度もしくは波長をわずかに
変えて2個あるいはそれ以上の測定を行つて定め
ることができる。このようにしてΔVFBの測定値
から第(8)式によつて∫ x2Nt(x)dxが求められ
るから、別に求めたx,Qtとこれを用いて、第
(3)式によりトラツプ分布の標準偏差σが得られ
る。以上の説明は捕獲される電荷担体が正孔であ
る場合にも同様に当てはまるものである。
First, in an initial state, the flat band voltage of the MOS diode consisting of the gate electrode 3, oxide film 2, and silicon substrate 1 is measured using the capacitance-voltage characteristic measuring device 5, and this is set as (V FB ) 0 .
Next, electrons are uniformly captured by traps in the oxide film 2. The method may use avalanche injection using a constant current pulse power source 4, or may use injection using an internal photoelectron emission effect by irradiation with light or ionizing radiation. Assuming that electrons are captured in all traps by this operation, when the flat band voltage is measured again after the operation, its value (V FB ) 1 will be (V FB ) 1 when measured with (V FB ) 0 as the reference point, (V FB ) 1 = q/Co∫ L O xNt(x)dx (4) Takes the value expressed by the equation. Co here
is the capacitance per unit area of the oxide film 2, and q is the electronic charge. Next, irradiation light 7 is irradiated onto the oxide film 2 through the silicon substrate 1 . This irradiation light 7 has sufficient photon energy to emit electrons from the trap, and has a wavelength that satisfies the condition αL<<1, where α is the absorption coefficient in the oxide film 2. choose something. Specifically, light with a photon energy slightly smaller than the band gap of the oxide film 2 is suitable, for example, a photon energy of 8.3 eV.
(wavelength 1500 Å), α = 10 3 cm -1 , so L
= 0.1 μm, αL = 10 -2 , which satisfies the above condition. Note that the absorption coefficient of silicon for light at this wavelength is 6.9×10 5 cm -1 , so the thickness of the portion of silicon substrate 1 directly below the gate is 500 Å.
Then, 3% of the incident light can pass through the silicon substrate 1. During this irradiation, the light intensity distribution I(x) in the oxide film 2 is expressed as I(x)=I 0 e -(Lx) ......(5) where αx≪1 Therefore, this can be approximately expressed as I(x)≒I 0 e -L (1+αx) (6), as shown by the dashed line in Figure 1. Here, I 0 is the intensity of light when it enters the oxide film 2. This light causes electrons to be emitted from the trap at a rate proportional to the intensity of the light. Also,
It has been confirmed that one trap captures one electron in a silicon oxide film, so
The distribution of traps that emitted electrons is βI(x)Nt
It is expressed as (x). Here, β is the number of electrons emitted by light of unit intensity. Therefore, the flat band voltage (V FB ) 2 measured by the capacitance-voltage characteristic measuring device 5 after light irradiation is (V FB ) 2 = q/Co∫ L O x{Nt(x)−βI(x )Nt(x
)} dx ...(7) Therefore, if the change in flat band voltage before and after irradiation is ΔV FB , then ΔV FB is calculated by equations (4), (6), and (7) as follows: ΔV FB = βI 0 It is expressed as e -L [(V FB ) 1 + αq/Co∫ L O x 2 Nt(x) dx]...(8). I 0 and α are determined by measuring the light intensity, and β can be determined by performing two or more measurements with slightly different light intensities or wavelengths. In this way, ∫ L O x 2 Nt (x) dx can be found from the measured value of ΔV FB using equation (8), so using x and Qt, which were found separately,
The standard deviation σ of the trap distribution can be obtained from equation (3). The above explanation applies equally to the case where the charge carriers to be captured are holes.

次に、この発明の実施に当つて注意すべき点を
述べる。この発明の測定方法では、酸化膜2中で
の照射光7の強度分布が第1図の一点鎖線のよう
になつていることが必要で、酸化膜2とゲート電
極3との界面で照射光7の反射があると測定は困
難になる。これを避けるためにゲート電極3の導
電体3bと酸化膜2との間に反射防止膜3aが設
けられている。具体的には導電体3bとして多結
晶シリコン(屈折率3.5)を用いる場合、反射防
止膜3aとしては適当な組成を有する酸化インジ
ウムIn2O3で屈折率2.3程度となるものを用い、光
の波長が1500Åである場合にはその膜厚を160Å
程度としておけば、酸化膜2とゲート電極3との
界面における反射はほとんど無視できる。次に、
照射光7の照射の最中にシリコン基板1もしくは
ゲート電極3から励起された電子が酸化膜2中に
注入されたり、または酸化膜2中でその価電子帯
から伝導帯に励起された電子があつてこれらがト
ラツプに捕獲されると誤差の原因となるおそれが
あるが、前者は直流電源6によるバイアスもしく
は帯電したトラツプによつて酸化膜2中に作られ
る電界によつて押し戻すことができ、また、後者
は酸化膜2のバンドギヤツプよりやや小さい光子
エネルギーの照射光7を使用し、自由電子を伴わ
ないエキシトン等の励起を主として行わしめるこ
とによつて抑制することができる。なお、上述の
酸化膜2中の電界は、トラツプから励起された電
子をすみやかにシリコン基板1およびゲート電極
3の方へ追いやるので、これらの電子が再びトラ
ツプに捕獲されて誤差の原因となることも少な
い。
Next, points to be noted when implementing this invention will be described. In the measurement method of the present invention, it is necessary that the intensity distribution of the irradiated light 7 in the oxide film 2 is like the one-dot chain line in FIG. 7 reflections make measurement difficult. In order to avoid this, an antireflection film 3a is provided between the conductor 3b of the gate electrode 3 and the oxide film 2. Specifically, when polycrystalline silicon (refractive index 3.5) is used as the conductor 3b, indium oxide In 2 O 3 with an appropriate composition and a refractive index of about 2.3 is used as the anti-reflection film 3a to prevent light If the wavelength is 1500 Å, the film thickness should be 160 Å.
To a certain degree, the reflection at the interface between the oxide film 2 and the gate electrode 3 can be almost ignored. next,
During the irradiation with the irradiation light 7, electrons excited from the silicon substrate 1 or the gate electrode 3 are injected into the oxide film 2, or electrons excited from the valence band to the conduction band in the oxide film 2 are If these are captured by the trap, it may cause an error, but the former can be pushed back by the electric field created in the oxide film 2 by the bias from the DC power supply 6 or the charged trap. Furthermore, the latter can be suppressed by using the irradiation light 7 having a photon energy slightly smaller than the bandgap of the oxide film 2, and by mainly exciting excitons or the like that do not involve free electrons. Note that the electric field in the oxide film 2 described above quickly drives electrons excited from the traps toward the silicon substrate 1 and the gate electrode 3, so these electrons may be captured by the traps again and cause errors. There are also few.

なお、この発明の方法は、シリコンおよびその
酸化膜に限らず、一般に半導体と絶縁性薄膜との
組合わせを有する構造物に適用可能である。
Note that the method of the present invention is applicable not only to silicon and its oxide film, but also to structures that generally have a combination of a semiconductor and an insulating thin film.

以上説明したように、この発明は絶縁体をこの
絶縁体中を通過距離にほぼ比例して減衰しつつ通
過する光または電離放射線で照射し、これによつ
て生ずる電荷捕獲中心の帯電の変化を測定し、こ
れから前記絶縁体中における前記電荷捕獲中心の
厚み方向分布の重心からの標準偏差を得るもので
あるので、絶縁体中の厚み方向のトラツプ分布が
非破壊的に比較的短時間に行うことができる利点
を有し、工業上重要な価値を有するものである。
As explained above, the present invention irradiates an insulator with light or ionizing radiation that passes through the insulator while attenuating approximately in proportion to the distance passed through the insulator, and changes the charge at the charge trapping center caused by this. Since the standard deviation from the center of gravity of the distribution of the charge trapping center in the thickness direction in the insulator is obtained from the measurement, the trap distribution in the thickness direction in the insulator can be measured non-destructively and in a relatively short time. It has the advantage of being able to do a lot of things, and has important industrial value.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はシリコン酸化膜中におけるトラツプ分
布Nt、光強度分布I等に関連する諸量を説明す
るための概念図、第2図はこの発明の一実施例を
示す被測定試料および測定回路の概略図である。 図中、1はシリコン基板、2は酸化膜、3はゲ
ート電極、3aは反射防止膜、3bは導電体、4
は定電流パルス電源、5は容量−電圧特性測定装
置、6は直流電源、7は照射光、8は切換スイツ
チである。
FIG. 1 is a conceptual diagram for explaining various quantities related to trap distribution Nt, light intensity distribution I, etc. in a silicon oxide film, and FIG. It is a schematic diagram. In the figure, 1 is a silicon substrate, 2 is an oxide film, 3 is a gate electrode, 3a is an antireflection film, 3b is a conductor, and 4
5 is a constant current pulse power supply, 5 is a capacitance-voltage characteristic measuring device, 6 is a DC power supply, 7 is an irradiation light, and 8 is a changeover switch.

Claims (1)

【特許請求の範囲】[Claims] 1 導体電極と半導体とにはさまれた絶縁体中の
電荷捕獲中心の分布測定に際し、前記絶縁体をこ
の絶縁体中を通過距離にほゞ比例して減衰しつゝ
通過する光または電離放射線で照射し、これによ
つて生ずる前記電荷捕獲中心の帯電の変化を測定
し、これから前記絶縁体中における前記電荷捕獲
中心の厚み方向分布の重心からの標準偏差を得る
ことを特徴とする絶縁体中の電荷捕獲中心の分布
測定方法。
1. When measuring the distribution of charge trapping centers in an insulator sandwiched between a conductor electrode and a semiconductor, light or ionizing radiation that passes through the insulator is attenuated approximately in proportion to the distance it passes through the insulator. The insulator is characterized in that the change in charge of the charge trapping center caused by this is measured, and the standard deviation from the center of gravity of the distribution of the charge trapping center in the thickness direction in the insulator is obtained from this. A method for measuring the distribution of charge trapping centers inside.
JP13841778A 1978-11-11 1978-11-11 Measuring method of distribution of charge trap center in insulator Granted JPS5565144A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13841778A JPS5565144A (en) 1978-11-11 1978-11-11 Measuring method of distribution of charge trap center in insulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13841778A JPS5565144A (en) 1978-11-11 1978-11-11 Measuring method of distribution of charge trap center in insulator

Publications (2)

Publication Number Publication Date
JPS5565144A JPS5565144A (en) 1980-05-16
JPS6212855B2 true JPS6212855B2 (en) 1987-03-20

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP13841778A Granted JPS5565144A (en) 1978-11-11 1978-11-11 Measuring method of distribution of charge trap center in insulator

Country Status (1)

Country Link
JP (1) JPS5565144A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5559359A (en) * 1994-07-29 1996-09-24 Reyes; Adolfo C. Microwave integrated circuit passive element structure and method for reducing signal propagation losses

Also Published As

Publication number Publication date
JPS5565144A (en) 1980-05-16

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