JPS6148656B2 - - Google Patents
Info
- Publication number
- JPS6148656B2 JPS6148656B2 JP53138418A JP13841878A JPS6148656B2 JP S6148656 B2 JPS6148656 B2 JP S6148656B2 JP 53138418 A JP53138418 A JP 53138418A JP 13841878 A JP13841878 A JP 13841878A JP S6148656 B2 JPS6148656 B2 JP S6148656B2
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- insulator
- charge
- electrons
- electron beam
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000012212 insulator Substances 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims 3
- 239000002800 charge carrier Substances 0.000 claims 2
- 230000005865 ionizing radiation Effects 0.000 claims 1
- 230000005855 radiation Effects 0.000 claims 1
- 239000010408 film Substances 0.000 description 21
- 238000010894 electron beam technology Methods 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 239000000969 carrier Substances 0.000 description 6
- 238000002347 injection Methods 0.000 description 6
- 239000007924 injection Substances 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 5
- 238000000691 measurement method Methods 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 239000000758 substrate Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000010893 electron trap Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 239000003570 air Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000005524 hole trap Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
【発明の詳細な説明】
この発明は、金属一酸化膜−シリコン
（MOS）構造におけるシリコン酸化膜に代表され
るごとき導体電極と半導体にはさまれた絶縁体中
の電荷捕獲中心（以下トラツプと称する）の特性
測定方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to a charge trapping center (hereinafter referred to as a trap) in an insulator sandwiched between a conductive electrode and a semiconductor, such as a silicon oxide film in a metal monoxide film-silicon (MOS) structure. The present invention relates to a method for measuring the characteristics of
集積回路の高密度化がLSIから超LSIへと進展
するにつれ、それに使用されるMOSトランジス
タのチヤネル長も短縮されつつあるが、それに伴
いソース・ドレイン電界が強くなるためにチヤネ
ル中の電荷担体（以下キヤリヤと称する）が高エ
ネルギーを得て衝突電離の確率が増大する。この
衝突電離により増殖したキヤリヤがチヤネル表面
近傍のシリコン酸化膜中に注入されトラツプに捕
獲されると、固定電荷としてMOSトランジスタ
のしきい値電圧の変動をきたし、MOS・LSIおよ
び超LSIの不安定性の要因となる。このため、シ
リコン酸化膜中における前記トラツプの捕獲断面
積その他の諸特性を知ることが工業上重要な測
定、評価方法となつている。 As the density of integrated circuits progresses from LSI to VLSI, the channel length of the MOS transistors used in these circuits is also becoming shorter. (hereinafter referred to as carrier) obtains high energy and the probability of impact ionization increases. When carriers multiplied by this impact ionization are injected into the silicon oxide film near the channel surface and captured in a trap, they act as fixed charges and cause fluctuations in the threshold voltage of MOS transistors, causing instability in MOS/LSI and VLSI. becomes a factor. Therefore, knowing the capture cross section and other characteristics of the trap in the silicon oxide film has become an industrially important measurement and evaluation method.
トラツプの捕獲断面積測定法として従来用いら
れている方法は、MOSダイオードを用いて何ら
かの方法でシリコン酸化膜中にキヤリヤを注入
し、それらのキヤリヤのうち酸化膜中のトラツプ
に捕獲された量を容量−電圧特性によつて測定す
る方法があり、キヤリヤの注入法としては、
MOSダイオードにパルス電圧を加え、シリコン
基板の少数キヤリヤを酸化膜中になだれ注入する
方法、MOSダイオードに２〜5eVの光子エネル
ギーの光を照射することによつてゲート電極もし
くはシリコンから酸化膜中にキヤリヤを注入する
方法、MOSダイオードに10〜17eVの光子エネ
ルギーの光を照射して酸化膜中に電子−正孔対を
生成させる方法等がある。 The conventional method for measuring the trap capture cross section uses a MOS diode to inject carriers into the silicon oxide film, and then calculates the amount of carriers captured by the traps in the oxide film. There is a method to measure by capacitance-voltage characteristics, and the carrier injection method is as follows:
A pulse voltage is applied to the MOS diode, and minority carriers from the silicon substrate are avalanche-injected into the oxide film.The MOS diode is irradiated with light with a photon energy of 2 to 5 eV to inject the minority carriers from the gate electrode or silicon into the oxide film. There are methods such as injecting a carrier, and irradiating a MOS diode with light having a photon energy of 10 to 17 eV to generate electron-hole pairs in the oxide film.
しかし、においてはシリコン基板がｎ形のと
きに正孔、ｐ形のときに電子の注入しか行えない
こと、においては光を透過させるような半透明
のゲート電極を設ける必要があり、また、正孔の
注入が難しいこと、においてはよりもさらに
薄い半透明ゲート電極を要し、また、ガラス，石
英，空気中での吸収の著しい波長領域の光を用い
るので取扱いが面倒なこと等の難点がある。この
他にMOS電界効果トランジスタに類似した構造
によつて、キヤリヤの注入を行う方法もあるが、
試料の構造やバイアス電圧の加え方が複雑になる
欠点がある。 However, in this case, only holes can be injected when the silicon substrate is n-type, and electrons can only be injected when it is p-type, and it is necessary to provide a semi-transparent gate electrode that allows light to pass through. It is difficult to inject holes, requires a thinner translucent gate electrode, and is difficult to handle because it uses light in a wavelength range that is significantly absorbed by glass, quartz, and air. be. There is also a method of carrier injection using a structure similar to a MOS field effect transistor.
The drawback is that the structure of the sample and how to apply bias voltage are complicated.
この発明はこのような従来法の欠点を取除くた
めになされたもので、通常のMOSダイオードを
用いて電子および正孔の双方に対するトラツプの
捕獲断面積の測定を可能とするものである。以下
第１図および第２図に従つてこの発明の一実施例
を説明する。 The present invention was made to eliminate these drawbacks of the conventional method, and makes it possible to measure the trapping cross section for both electrons and holes using an ordinary MOS diode. An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.
第１図はこの発明の測定方法における試料の構
造および測定回路の例であつて、MOSダイオー
ド１のゲートとなる金属電極１ｃにこの金属電極
１ｃを透過して酸化膜１ｂの表面からわずかに入
つたところまで達する程度のエネルギーをもつた
電子ビーム２を照射して、酸化膜１ｂの表面近傍
のみに電子−正孔対を発生せしめ、直流電源４に
より抵抗体６、切換スイツチ３を介して金属電極
１ｃに正または負の電圧を印加することによつて
正孔または電子の所望のキヤリヤを酸化膜内部に
到達させる。この際の電圧は従来法のようになだ
れ注入を起すほど大きい必要はない。MOSダイ
オードを流れる試料電流は従来法における注入電
流にあたるもので、シリコン基板１ａに接続した
電流計５によつて測定される。次に、電子ビーム
の照射を止め、Ｃ−Ｖメータ７によつてこの
MOSダイオードの容量−電圧特性を測定し、フ
ラツト・バンド電圧ＶFBを求める。トラツプによ
るキヤリヤの捕獲とこのＶFBとの関係式は、なだ
れ注入等を用いた従来法と同一であつて、例え
ば、ジエー・エム・エイツケン（J.M.Aitken）
とデイー・アール・ヤング（D.R.Young）による
「ジヤーナル・オブ・アプライド・フイジクス」
（Journal of Applied Physics）誌47巻３号
（1976年３月）、1196ページから1198ページに所載
の論文に示されている。 FIG. 1 shows an example of the structure of a sample and a measuring circuit in the measuring method of the present invention. An electron beam 2 having enough energy to reach the oxide film 1b is irradiated to generate electron-hole pairs only in the vicinity of the surface of the oxide film 1b. By applying a positive or negative voltage to the electrode 1c, desired carriers of holes or electrons are allowed to reach the interior of the oxide film. The voltage at this time does not need to be so large as to cause avalanche injection as in the conventional method. The sample current flowing through the MOS diode corresponds to the injection current in the conventional method, and is measured by an ammeter 5 connected to the silicon substrate 1a. Next, the electron beam irradiation is stopped, and the CV meter 7
Measure the capacitance-voltage characteristics of the MOS diode and find the flat band voltage VFB . The relational expression between the capture of a carrier by a trap and this V FB is the same as the conventional method using avalanche injection, etc.
"Journal of Applied Physics" by DR Young
(Journal of Applied Physics) Vol. 47, No. 3 (March 1976), pages 1196 to 1198.
第２図ａ，ｂはこの関係を示すグラフである
が、ｔなる延べ時間のあいだ電子ビームを照射し
た後のＶFBの変化分ΔＶFBは電子トラツプの場
合、
ΔＶFB（ｔ）＝ΔＶFB（∞）
〔１−exp（−Ｊσｔ／ｑ）〕 …(1)
と表わされ第２図ａに示すような曲線になる。こ
こにσはトラツプの捕獲断面積，Ｊは注入電流密
度、ｑは電子電荷であり、ΔＶFB（∞）はｔが十
分大きいとき（ほとんどすべてのトラツプが電子
を捕獲したとき）のΔＶFBの値である。従つて、
1n〔ΔＶFB（∞）−ΔＶFB（ｔ）〕をｔに対して
プロツトすると第２図ｂに示すごとく直線にな
り、その勾配から捕獲断面積σが求められる。 Figures 2a and b are graphs showing this relationship. In the case of an electron trap, the change in V FB after electron beam irradiation for a total time t is ΔV FB ( t) = ΔV FB It is expressed as (∞) [1-exp(-Jσt/q)]...(1) and becomes a curve as shown in Figure 2a. Here, σ is the capture cross section of the trap, J is the injection current density, q is the electron charge, and ΔV FB (∞) is the value of ΔV FB when t is sufficiently large (when almost all traps capture electrons). It is a value. Therefore,
When 1n [ΔV FB (∞) - ΔV FB (t)] is plotted against t, it becomes a straight line as shown in FIG. 2b, and the trapping cross section σ can be determined from its slope.
この発明の実施に当つて注意すべき点は、電子
ビーム２の照射によつて酸化膜１ｂ中に新たに照
射損傷によるトラツプを生じないようにすること
である。そのためには電子ビーム２のエネルギー
を小さくすればよい。これは、電子ビーム２の酸
化膜１ｂ中への侵入距離をなるべく小さくしたい
という要請とも一致するものである。一例をあげ
れば、金属電極１ｃとして厚さ2500Åのアルミニ
ウムを用いた場合、電子ビーム２の加速電圧を
5KVとすると、電子ビーム２は酸化膜１ｂの表面
から44Åまでしか侵入せず、酸化膜１ｂの表面で
の電子ビーム２の平均エネルギーは50eVであ
る。このエネルギーは酸化膜１ｂ中に衝突電離に
よつて一組の電子・正孔対を定常的に作り出すの
に必要なエネルギー約27eVよりは大きく、か
つ、酸化膜１ｂ中に照射損傷を生じない程度に小
さい値である。なお、電子ビーム２の電流量は、
第１図および第２図の電流計５で測られる試料電
流が、10-9A程度となるように設定するのが適当
である。この試料電流が照射中にトラツプの帯電
に伴つて変動する場合には、電流計５の読みを直
流電源４もしくは抵抗体６にフイードバツクする
ことによつて、試料電流をあらかじめ設定した一
定値に保つことも可能である。 In carrying out the present invention, care must be taken to avoid creating new traps in the oxide film 1b due to irradiation damage due to the irradiation with the electron beam 2. For this purpose, the energy of the electron beam 2 may be reduced. This is consistent with the request to reduce the penetration distance of the electron beam 2 into the oxide film 1b as much as possible. For example, when aluminum with a thickness of 2500 Å is used as the metal electrode 1c, the acceleration voltage of the electron beam 2 is
At 5 KV, the electron beam 2 penetrates only up to 44 Å from the surface of the oxide film 1b, and the average energy of the electron beam 2 at the surface of the oxide film 1b is 50 eV. This energy is larger than the energy of about 27 eV required to constantly create a pair of electrons and holes in the oxide film 1b by impact ionization, and is at a level that does not cause irradiation damage in the oxide film 1b. is a small value. Note that the amount of current of the electron beam 2 is
It is appropriate to set the sample current so that the sample current measured by the ammeter 5 in FIGS. 1 and 2 is about 10 -9 A. If this sample current fluctuates as the trap is charged during irradiation, the sample current is kept at a preset constant value by feeding back the reading of the ammeter 5 to the DC power supply 4 or resistor 6. It is also possible.
また、この発明の測定方法を実施するための装
置は、走査形電子顕微鏡をわずかに改造するだけ
で実現可能であり、照射電子ビームの寸法設定や
試料上の測定個所の選択、操作者による確認など
は走査形電子顕微鏡の通常の機能を利用して行う
ことができる。 Furthermore, an apparatus for carrying out the measurement method of the present invention can be realized by only slightly modifying a scanning electron microscope, and it is possible to set the dimensions of the irradiated electron beam, select the measurement point on the sample, and confirm it by the operator. These can be performed using the normal functions of a scanning electron microscope.
なお、この発明の測定方法は、シリコンとその
酸化膜に限らず、一般に半導体と絶縁性薄膜との
組合わせをもつた構造物に適用可能である。 Note that the measurement method of the present invention is applicable not only to silicon and its oxide film, but also to structures that generally have a combination of a semiconductor and an insulating thin film.
以上説明したようにこの発明の測定方法は、シ
リコン酸化膜等の絶縁体中のトラツプの諸特性に
関する従来の測定方法の欠点を除き、電子トラツ
プ，正孔トラツプの双方の測定に適用できるので
実用上有用な価値を有するものである。 As explained above, the measurement method of the present invention eliminates the drawbacks of conventional measurement methods regarding various characteristics of traps in insulators such as silicon oxide films, and can be applied to the measurement of both electron traps and hole traps. It has useful value.
第１図はこの発明の一実施例を説明するための
酸化膜中のトラツプの捕獲断面積測定回路図、第
２図は測定されたフラツトバンド電圧の時間変化
から捕獲断面積を算出する方法を示す説明図であ
る。
図中、１はMOSダイオード、１ａはシリコン
基板、１ｂは酸化膜、１ｃは金属電極、２は電子
ビーム、３は切換スイツチ、４は直流電源、５は
電流計、６は抵抗体、７はＣ−Ｖメータである。
Fig. 1 is a circuit diagram for measuring the capture cross section of traps in an oxide film to explain an embodiment of the present invention, and Fig. 2 shows a method for calculating the trap cross section from the time change of the measured flat band voltage. It is an explanatory diagram. In the figure, 1 is a MOS diode, 1a is a silicon substrate, 1b is an oxide film, 1c is a metal electrode, 2 is an electron beam, 3 is a changeover switch, 4 is a DC power supply, 5 is an ammeter, 6 is a resistor, and 7 is a resistor. It is a CV meter.
Claims (1)
電荷捕獲中心の捕獲断面積の測定に際し、前記導
体電極を通過しかつ前記絶縁体の表面近傍のみに
侵入しうる程度のエネルギーをもつ電子線もしく
は電離放射線を照射して前記絶縁体中に電子およ
び正孔を発生せしめ、これら電子および正孔のい
ずれか一方の電荷担体を前記導体電極に直流電圧
を印加して前記絶縁体内部に到達せしめ、前記電
荷担体のうち電荷捕獲中心に捕獲された数を前記
絶縁体の帯電量の変化として測定し、この値から
前記電荷捕獲中心の捕獲断面積を得ることを特微
とする絶縁体中の電荷捕獲中心の特性測定方法。1. When measuring the trapping cross section of a charge trapping center in an insulator sandwiched between a conductor electrode and a semiconductor, electrons with enough energy to pass through the conductor electrode and enter only near the surface of the insulator Electrons and holes are generated in the insulator by irradiation with radiation or ionizing radiation, and charge carriers of either the electrons or holes reach the inside of the insulator by applying a DC voltage to the conductor electrode. In the insulator, the number of charge carriers captured at the charge trapping center is measured as a change in the amount of charge on the insulator, and the trapping cross section of the charge trapping center is obtained from this value. A method for measuring the characteristics of charge trapping centers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13841878A JPS5565145A (en) | 1978-11-11 | 1978-11-11 | Characteristic measuring method for charge trap center in insulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13841878A JPS5565145A (en) | 1978-11-11 | 1978-11-11 | Characteristic measuring method for charge trap center in insulator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5565145A JPS5565145A (en) | 1980-05-16 |
| JPS6148656B2 true JPS6148656B2 (en) | 1986-10-25 |
Family
ID=15221493
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13841878A Granted JPS5565145A (en) | 1978-11-11 | 1978-11-11 | Characteristic measuring method for charge trap center in insulator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5565145A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5559359A (en) * | 1994-07-29 | 1996-09-24 | Reyes; Adolfo C. | Microwave integrated circuit passive element structure and method for reducing signal propagation losses |
| JPH08102481A (en) * | 1994-09-30 | 1996-04-16 | Shin Etsu Handotai Co Ltd | Estimation method of mis semiconductor device |
| CN111261708B (en) * | 2020-02-11 | 2022-09-23 | 捷捷微电(上海)科技有限公司 | Semiconductor power device structure |
| CN111855705B (en) * | 2020-07-28 | 2023-03-28 | 哈尔滨工业大学 | Method for detecting radiation-induced defects in oxide layer of electronic device |
-
1978
- 1978-11-11 JP JP13841878A patent/JPS5565145A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5565145A (en) | 1980-05-16 |
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