JPS62126777U - - Google Patents

Info

Publication number
JPS62126777U
JPS62126777U JP512286U JP512286U JPS62126777U JP S62126777 U JPS62126777 U JP S62126777U JP 512286 U JP512286 U JP 512286U JP 512286 U JP512286 U JP 512286U JP S62126777 U JPS62126777 U JP S62126777U
Authority
JP
Japan
Prior art keywords
component
output
peak detection
separated
amplified
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP512286U
Other languages
Japanese (ja)
Other versions
JPH0611482Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP512286U priority Critical patent/JPH0611482Y2/en
Publication of JPS62126777U publication Critical patent/JPS62126777U/ja
Application granted granted Critical
Publication of JPH0611482Y2 publication Critical patent/JPH0611482Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

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  • Measurement Of Current Or Voltage (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の回路図。第2図は
本考案の一実施例の作用説明に供する線図。第3
図は従来例の回路図。 5……バツフア増幅器、6,8および14……
コンデンサ、7……増幅器、10……ダイオード
、11……コンデンサ、12および13……分圧
抵抗。
FIG. 1 is a circuit diagram of an embodiment of the present invention. FIG. 2 is a diagram for explaining the operation of an embodiment of the present invention. Third
The figure is a circuit diagram of a conventional example. 5... Buffer amplifier, 6, 8 and 14...
Capacitor, 7...Amplifier, 10...Diode, 11...Capacitor, 12 and 13...Voltage dividing resistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号を直流分と交流分とに分離し、分離し
た交流分を増幅し、この増幅出力のピークを検波
し、このピーク検波出力を前記増幅の増幅率分の
一に減衰させ、減衰されたピーク検波出力と前記
直流成分とを重畳して出力するようにしたことを
特徴とするピーク検波回路。
The input signal is separated into a DC component and an AC component, the separated AC component is amplified, the peak of this amplified output is detected, and this peak detection output is attenuated to one part of the amplification factor of the amplification. A peak detection circuit characterized in that a peak detection output and the DC component are superimposed and output.
JP512286U 1986-01-20 1986-01-20 Peak detection circuit Expired - Lifetime JPH0611482Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP512286U JPH0611482Y2 (en) 1986-01-20 1986-01-20 Peak detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP512286U JPH0611482Y2 (en) 1986-01-20 1986-01-20 Peak detection circuit

Publications (2)

Publication Number Publication Date
JPS62126777U true JPS62126777U (en) 1987-08-11
JPH0611482Y2 JPH0611482Y2 (en) 1994-03-23

Family

ID=30786414

Family Applications (1)

Application Number Title Priority Date Filing Date
JP512286U Expired - Lifetime JPH0611482Y2 (en) 1986-01-20 1986-01-20 Peak detection circuit

Country Status (1)

Country Link
JP (1) JPH0611482Y2 (en)

Also Published As

Publication number Publication date
JPH0611482Y2 (en) 1994-03-23

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