JPH0611482Y2 - Peak detection circuit - Google Patents
Peak detection circuitInfo
- Publication number
- JPH0611482Y2 JPH0611482Y2 JP512286U JP512286U JPH0611482Y2 JP H0611482 Y2 JPH0611482 Y2 JP H0611482Y2 JP 512286 U JP512286 U JP 512286U JP 512286 U JP512286 U JP 512286U JP H0611482 Y2 JPH0611482 Y2 JP H0611482Y2
- Authority
- JP
- Japan
- Prior art keywords
- peak
- signal
- current component
- amplifier
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Measurement Of Current Or Voltage (AREA)
Description
【考案の詳細な説明】 （産業上の利用分野） 本考案は、信号波形のピーク値を検出するのに好適なピ
ーク検波回路に関する。DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a peak detection circuit suitable for detecting the peak value of a signal waveform.
（従来技術） 従来のピーク検波回路は、たとえば第３図に示す如く、
ダイオード１を介して入力端子ＩＮに供給された信号を
コンデンサ２に供給して充電し、コンデンサ２の両端の
電圧をピーク値として取り出していた。(Prior Art) A conventional peak detection circuit is, for example, as shown in FIG.
The signal supplied to the input terminal IN via the diode 1 is supplied to the capacitor 2 for charging, and the voltage across the capacitor 2 is taken out as a peak value.
（考案が解決すべき問題点） しかし上記した従来のピーク検波回路によるときは、検
出ピーク値と入力信号のピーク値との間には最小限、ダ
イオード１の順方向電圧降下の差が生ずる。この差は入
力信号レベルが小さい場合には無視できず、順方向電圧
降下ＶＦ分が入力信号レベルに対して大きな割合を占
め、正確なピーク値の検出ができない問題点があった。(Problems to be solved by the device) However, when the above-described conventional peak detection circuit is used, a minimum difference in forward voltage drop of the diode 1 occurs between the detected peak value and the peak value of the input signal. This difference cannot be ignored when the input signal level is small, and the forward voltage drop V F occupies a large proportion of the input signal level, and there is a problem that an accurate peak value cannot be detected.
本考案は上記の問題を解決してダイオードの順方向電圧
降下値の影響を無くしたピーク検波回路を提供すること
を目的とする。An object of the present invention is to solve the above problems and provide a peak detection circuit in which the influence of the forward voltage drop value of a diode is eliminated.
（問題点を解決するための手段） 本考案は上記の問題点を解決するために次の如く構成し
た。(Means for Solving Problems) The present invention has the following structure in order to solve the above problems.
入力信号を直流成分と交流成分とに分離する分離手段
と、該分離手段によって分離された交流成分を増幅する
増幅器と、該増幅器によって増幅された交流成分と前記
直流成分との重畳信号をピーク検波するピーク検波器
と、該ピーク検波器により検波されたピーク検波出力を
前記増幅器の増幅率分の一に減衰する減衰器と、該減衰
器の出力と前記分離手段によって分離された直流成分と
を重畳する重畳手段とを備え、重畳手段の出力をピーク
検波出力とした。Separation means for separating the input signal into a direct current component and an alternating current component, an amplifier for amplifying the alternating current component separated by the separation means, and peak detection of a superimposed signal of the alternating current component amplified by the amplifier and the direct current component. A peak detector, an attenuator that attenuates the peak detection output detected by the peak detector by a factor of the amplification factor of the amplifier, and an output of the attenuator and a DC component separated by the separating means. The superimposing means for superimposing is provided, and the output of the superimposing means is the peak detection output.
（作用） 本考案は上記の如く構成されたため、ピーク検波の前に
入力信号の交流成分は増幅され、増幅された交流分のピ
ークが検波され、この検波出力は前記増幅の増幅率分の
一に減衰される。したがってピーク検波のためにダイオ
ード順方向電圧降下は前記増幅率分の一になされたと等
価となって、入力信号に対する前記順方向電圧降下の値
の割合は実質的に小さくなったことになる。(Operation) Since the present invention is configured as described above, the AC component of the input signal is amplified before the peak detection, and the peak of the amplified AC component is detected, and the detection output is a fraction of the amplification factor of the amplification. Is attenuated to. Therefore, the diode forward voltage drop is equivalent to the amplification factor divided by 1 due to the peak detection, and the ratio of the value of the forward voltage drop to the input signal is substantially reduced.
したがって入力信号が小さい場合においても前記順方向
電圧降下の値の影響は殆んど無くなることになる。Therefore, even when the input signal is small, the influence of the value of the forward voltage drop is almost eliminated.
（考案の実施例） 以下、本考案を実施例により説明する。(Embodiment of the Invention) Hereinafter, the present invention will be described with reference to an embodiment.
第１図は本考案の一実施例の構成を示す回路図である。FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention.
入力端子ＩＮに供給された入力信号Ｖ１はバッファ増幅
器５に供給して増幅し、バッファ増幅器５の出力信号Ｖ
２はコンデンサ６に供給して直流分を阻止し、交流分の
みを抽出して増幅器７で増幅する。増幅器７の出力はコ
ンデンサ８を介して直流分を除去して出力し、抵抗９を
通してバッファ増幅器５の出力信号と加算し、コンデン
サ８の出力端に信号Ｖ３を得る。信号Ｖ３はダイオード
１０とコンデンサ１１とによってピーク検波する。ピー
ク検波出力Ｖ４と信号Ｖ２との差を減衰器を構成する抵
抗１２と１３とによって増幅器７で増幅した割合だけ減
衰し、この減衰出力に信号Ｖ２の直流分を重畳して出力
信号Ｖ５を得る。なお、第１図においてコンデンサ１４
は出力信号平滑化のためのコンデンサである。The input signal V 1 supplied to the input terminal IN is supplied to and amplified by the buffer amplifier 5, and the output signal V 1 of the buffer amplifier 5 is outputted.
2 supplies to the capacitor 6 to block the direct current component, extracts only the alternating current component, and amplifies it by the amplifier 7. The output of the amplifier 7 is output after removing the DC component via the capacitor 8, and is added to the output signal of the buffer amplifier 5 through the resistor 9 to obtain the signal V 3 at the output end of the capacitor 8. The signal V 3 is peak-detected by the diode 10 and the capacitor 11. The difference between the peak detection output V 4 and the signal V 2 is attenuated by the ratio amplified by the amplifier 7 by the resistors 12 and 13 forming the attenuator, and the DC component of the signal V 2 is superimposed on the attenuated output to output the signal. Obtain V 5 . Incidentally, in FIG.
Is a capacitor for smoothing the output signal.
上記の如く構成された本実施例において、入力信号Ｖ１
はバッファ増幅器５の出力信号Ｖ２である。いま入力信
号Ｖ１を仮にＶ１＝Ｅ＋Asinωｔとする。入力信号Ｖ１
＝バッファ増幅器５の出力電圧であり、第２図(a)に示
す如くである。この出力電圧Ｖ２の交流分Asinωｔは増
幅器７で増幅される。増幅器７の利得をＧとすれば、抵
抗９を介して信号Ｖ２と加算された信号Ｖ３は、入力信
号Ｖ１の直流成分に変化はなく、 Ｖ３＝Ｅ＋（Ｇ＋１）Ａsinωｔ となり、第２図(b)に示す如き波形となる。In the present embodiment configured as described above, the input signal V 1
Is the output signal V 2 of the buffer amplifier 5. Now, assume that the input signal V 1 is V 1 = E + Asinωt. Input signal V 1
= Output voltage of the buffer amplifier 5, as shown in FIG. 2 (a). The AC component Asinωt of the output voltage V 2 is amplified by the amplifier 7. If the gain of the amplifier 7 is G, the signal V 3 added to the signal V 2 via the resistor 9 has no change in the DC component of the input signal V 1 and V 3 = E + (G + 1) A sinωt The waveform is as shown in Fig. 2 (b).
第２図(b)に示した信号Ｖ３はダイオード１０およびコ
ンデンサ１１でピーク検波され、ピーク検波された信号
Ｖ４は、Ｖ４＝Ｖ３−ＶＦ＝〔Ｅ＋（Ｇ＋１）Ａ−
ＶＦ〕となり、第２図(c)に示す如くである。信号Ｖ４
と信号Ｖ２との差は抵抗１２と１３とで1/Gに分圧さ
れ、かつ信号Ｖ２が加算されたうえ、コンデンサ１４に
よって平滑化される。したがって出力信号Ｖ５は、 となる。The signal V 3 shown in FIG. 2 (b) is peak-detected by the diode 10 and the capacitor 11, and the peak-detected signal V 4 is V 4 = V 3 −V F = [E + (G + 1) A−
V F ], as shown in FIG. 2 (c). Signal V 4
And the signal V 2 are divided into 1 / G by the resistors 12 and 13, and the signal V 2 is added and smoothed by the capacitor 14. Therefore, the output signal V 5 is Becomes
上記からも明らかな如く、ダイオード１０の順方向電圧
降下ＶＦは1/Gとなり、増幅器７の利得を増加させると
（ＶＦ／Ｇ）は無視できることになり、出力信号Ｖ５は
第２図(d)の破線に示した如くになる。As is apparent from the above, the forward voltage drop V F of the diode 10 becomes 1 / G, and when the gain of the amplifier 7 is increased, (V F / G) becomes negligible, and the output signal V 5 of FIG. It becomes as shown by the broken line in (d).
（考案の効果） 以上説明した如く本考案によれば、入力信号を直流成分
と交流成分とに分離し、前記交流成分を増幅し、その増
幅出力信号と前記直流成分と重畳してそのピークをピー
ク検波し、このピーク検波出力を前記増幅の増幅率分の
一に減衰して、前記直流成分と重畳するようにしたた
め、ピーク検波のためのとダイオードによる順方向電圧
降下の出力信号中における比率は前記増幅率分の一に低
下することになる。(Effect of the Invention) As described above, according to the present invention, the input signal is separated into the DC component and the AC component, the AC component is amplified, and the amplified output signal and the DC component are superposed to obtain the peak. The peak detection is performed, and the peak detection output is attenuated to one of the amplification factor of the amplification so as to be superimposed on the DC component. Therefore, the ratio of the forward voltage drop due to the diode in the output signal for the peak detection is detected. Will be reduced to a fraction of the amplification factor.
したがって入力信号のピーク値が小さい場合にも正確な
ピーク値を検出することができる。Therefore, an accurate peak value can be detected even when the peak value of the input signal is small.
第１図は本考案の一実施例の回路図。 第２図は本考案の一実施例の作用説明に供する線図。 第３図は従来例の回路図。 ５…バッファ増幅器、６，８…および１４…コンデン
サ、７…増幅器、１０…ダイオード、１１…コンデン
サ、１２および１３…分圧抵抗。FIG. 1 is a circuit diagram of an embodiment of the present invention. FIG. 2 is a diagram for explaining the operation of one embodiment of the present invention. FIG. 3 is a circuit diagram of a conventional example. 5 ... Buffer amplifier, 6, 8 ... and 14 ... Capacitor, 7 ... Amplifier, 10 ... Diode, 11 ... Capacitor, 12 and 13 ... Dividing resistor.
Claims (1)
る分離手段と、該分離手段によって分離された交流成分
を増幅する増幅器と、該増幅器によって増幅された交流
成分と前記直流成分との重畳信号をピーク検波するピー
ク検波器と、該ピーク検波器により検波されたピーク検
波出力を前記増幅器の増幅率分の一に減衰する減衰器
と、該減衰器の出力と前記分離手段によって分離された
直流成分とを重畳する重畳手段とを備えたことを特徴と
するピーク検波回路。1. A separating means for separating an input signal into a direct current component and an alternating current component, an amplifier for amplifying the alternating current component separated by the separating means, an alternating current component amplified by the amplifier and the direct current component. A peak detector for peak-detecting the superimposed signal, an attenuator for attenuating the peak detection output detected by the peak detector by a factor of the amplification factor of the amplifier, and an output of the attenuator and separated by the separating means. And a superimposing means for superimposing a direct current component on the peak detecting circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP512286U JPH0611482Y2 (en) | 1986-01-20 | 1986-01-20 | Peak detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP512286U JPH0611482Y2 (en) | 1986-01-20 | 1986-01-20 | Peak detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62126777U JPS62126777U (en) | 1987-08-11 |
| JPH0611482Y2 true JPH0611482Y2 (en) | 1994-03-23 |
Family
ID=30786414
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP512286U Expired - Lifetime JPH0611482Y2 (en) | 1986-01-20 | 1986-01-20 | Peak detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0611482Y2 (en) |
-
1986
- 1986-01-20 JP JP512286U patent/JPH0611482Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62126777U (en) | 1987-08-11 |
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